nppdefs.h

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 #ifndef NV_NPPIDEFS_H


 #define NV_NPPIDEFS_H


 


 #include <stdlib.h>


 #include <cuda_runtime.h>


 

 #ifdef __cplusplus


 extern "C" {

 #endif


 


         // If this is a 32-bit Windows compile, don't align to 16-byte at all


         // and use a "union-trick" to create 8-byte alignment.


 #if defined(_WIN32) && !defined(_WIN64)


 


             // On 32-bit Windows platforms, do not force 8-byte alignment.


             //   This is a consequence of a limitation of that platform.


     #define NPP_ALIGN_8


             // On 32-bit Windows platforms, do not force 16-byte alignment.


             //   This is a consequence of a limitation of that platform.


     #define NPP_ALIGN_16


 


 #else /* _WIN32 && !_WIN64 */


 


     #define NPP_ALIGN_8     __align__(8)


     #define NPP_ALIGN_16    __align__(16)


 


 #endif /* !__CUDACC__ && _WIN32 && !_WIN64 */


 


 

 typedef enum 

 {

     NPPI_INTER_UNDEFINED         = 0,

     NPPI_INTER_NN                = 1,        

     NPPI_INTER_LINEAR            = 2,        

     NPPI_INTER_CUBIC             = 4,        

     NPPI_INTER_CUBIC2P_BSPLINE,              

     NPPI_INTER_CUBIC2P_CATMULLROM,           

     NPPI_INTER_CUBIC2P_B05C03,               

     NPPI_INTER_SUPER             = 8,        

     NPPI_INTER_LANCZOS           = 16,       

     NPPI_INTER_LANCZOS3_ADVANCED = 17,       

     NPPI_SMOOTH_EDGE             = (1 << 31) 

 } NppiInterpolationMode; 

 

 typedef enum 

 {

     NPPI_BAYER_BGGR         = 0,             

     NPPI_BAYER_RGGB         = 1,

     NPPI_BAYER_GBRG         = 2,

     NPPI_BAYER_GRBG         = 3

 } NppiBayerGridPosition; 

 

 typedef enum


 {

     NPP_MASK_SIZE_1_X_3,

     NPP_MASK_SIZE_1_X_5,

     NPP_MASK_SIZE_3_X_1 = 100, // leaving space for more 1 X N type enum values 


     NPP_MASK_SIZE_5_X_1,

     NPP_MASK_SIZE_3_X_3 = 200, // leaving space for more N X 1 type enum values


     NPP_MASK_SIZE_5_X_5,

     NPP_MASK_SIZE_7_X_7 = 400,

     NPP_MASK_SIZE_9_X_9 = 500,

     NPP_MASK_SIZE_11_X_11 = 600,

     NPP_MASK_SIZE_13_X_13 = 700,

     NPP_MASK_SIZE_15_X_15 = 800

 } NppiMaskSize;

 

 typedef enum


 {

     NPP_FILTER_SOBEL,

     NPP_FILTER_SCHARR,

 } NppiDifferentialKernel;

 

 typedef enum 

 {

     /* negative return-codes indicate errors */


     NPP_NOT_SUPPORTED_MODE_ERROR            = -9999,  

     

     NPP_INVALID_HOST_POINTER_ERROR          = -1032,

     NPP_INVALID_DEVICE_POINTER_ERROR        = -1031,

     NPP_LUT_PALETTE_BITSIZE_ERROR           = -1030,

     NPP_ZC_MODE_NOT_SUPPORTED_ERROR         = -1028,      

     NPP_NOT_SUFFICIENT_COMPUTE_CAPABILITY   = -1027,

     NPP_TEXTURE_BIND_ERROR                  = -1024,

     NPP_WRONG_INTERSECTION_ROI_ERROR        = -1020,

     NPP_HAAR_CLASSIFIER_PIXEL_MATCH_ERROR   = -1006,

     NPP_MEMFREE_ERROR                       = -1005,

     NPP_MEMSET_ERROR                        = -1004,

     NPP_MEMCPY_ERROR                        = -1003,

     NPP_ALIGNMENT_ERROR                     = -1002,

     NPP_CUDA_KERNEL_EXECUTION_ERROR         = -1000,

 

     NPP_ROUND_MODE_NOT_SUPPORTED_ERROR      = -213,     

     NPP_QUALITY_INDEX_ERROR                 = -210,     

     NPP_RESIZE_NO_OPERATION_ERROR           = -201,     

     NPP_OVERFLOW_ERROR                      = -109,     

     NPP_NOT_EVEN_STEP_ERROR                 = -108,     

     NPP_HISTOGRAM_NUMBER_OF_LEVELS_ERROR    = -107,     

     NPP_LUT_NUMBER_OF_LEVELS_ERROR          = -106,     

     NPP_CORRUPTED_DATA_ERROR                = -61,      

     NPP_CHANNEL_ORDER_ERROR                 = -60,      

     NPP_ZERO_MASK_VALUE_ERROR               = -59,      

     NPP_QUADRANGLE_ERROR                    = -58,      

     NPP_RECTANGLE_ERROR                     = -57,      

     NPP_COEFFICIENT_ERROR                   = -56,      

     NPP_NUMBER_OF_CHANNELS_ERROR            = -53,      

     NPP_COI_ERROR                           = -52,      

     NPP_DIVISOR_ERROR                       = -51,      

     NPP_CHANNEL_ERROR                       = -47,      

     NPP_STRIDE_ERROR                        = -37,      

     NPP_ANCHOR_ERROR                        = -34,      

     NPP_MASK_SIZE_ERROR                     = -33,      

     NPP_RESIZE_FACTOR_ERROR                 = -23,

     NPP_INTERPOLATION_ERROR                 = -22,

     NPP_MIRROR_FLIP_ERROR                   = -21,

     NPP_MOMENT_00_ZERO_ERROR                = -20,

     NPP_THRESHOLD_NEGATIVE_LEVEL_ERROR      = -19,

     NPP_THRESHOLD_ERROR                     = -18,

     NPP_CONTEXT_MATCH_ERROR                 = -17,

     NPP_FFT_FLAG_ERROR                      = -16,

     NPP_FFT_ORDER_ERROR                     = -15,

     NPP_STEP_ERROR                          = -14,       

     NPP_SCALE_RANGE_ERROR                   = -13,

     NPP_DATA_TYPE_ERROR                     = -12,

     NPP_OUT_OFF_RANGE_ERROR                 = -11,

     NPP_DIVIDE_BY_ZERO_ERROR                = -10,

     NPP_MEMORY_ALLOCATION_ERR               = -9,

     NPP_NULL_POINTER_ERROR                  = -8,

     NPP_RANGE_ERROR                         = -7,

     NPP_SIZE_ERROR                          = -6,

     NPP_BAD_ARGUMENT_ERROR                  = -5,

     NPP_NO_MEMORY_ERROR                     = -4,

     NPP_NOT_IMPLEMENTED_ERROR               = -3,

     NPP_ERROR                               = -2,

     NPP_ERROR_RESERVED                      = -1,

     

     /* success */


     NPP_NO_ERROR                            = 0,        

     NPP_SUCCESS = NPP_NO_ERROR,                         

     /* positive return-codes indicate warnings */


     NPP_NO_OPERATION_WARNING                = 1,        

     NPP_DIVIDE_BY_ZERO_WARNING              = 6,        

     NPP_AFFINE_QUAD_INCORRECT_WARNING       = 28,       

     NPP_WRONG_INTERSECTION_ROI_WARNING      = 29,       

     NPP_WRONG_INTERSECTION_QUAD_WARNING     = 30,       

     NPP_DOUBLE_SIZE_WARNING                 = 35,       

     NPP_MISALIGNED_DST_ROI_WARNING          = 10000,    

 } NppStatus;

 

 typedef enum


 {

     NPP_CUDA_UNKNOWN_VERSION = -1,  

     NPP_CUDA_NOT_CAPABLE     = 0,   

     NPP_CUDA_1_0             = 100, 

     NPP_CUDA_1_1             = 110, 

     NPP_CUDA_1_2             = 120, 

     NPP_CUDA_1_3             = 130, 

     NPP_CUDA_2_0             = 200, 

     NPP_CUDA_2_1             = 210, 

     NPP_CUDA_3_0             = 300, 

     NPP_CUDA_3_2             = 320, 

     NPP_CUDA_3_5             = 350, 

     NPP_CUDA_3_7             = 370, 

     NPP_CUDA_5_0             = 500, 

     NPP_CUDA_5_2             = 520, 

     NPP_CUDA_5_3             = 530, 

     NPP_CUDA_6_0             = 600, 

     NPP_CUDA_6_1             = 610, 

     NPP_CUDA_6_2             = 620, 

     NPP_CUDA_6_3             = 630, 

     NPP_CUDA_7_0             = 700, 

     NPP_CUDA_7_2             = 720, 

     NPP_CUDA_7_3             = 730, 

     NPP_CUDA_7_5             = 750  

 } NppGpuComputeCapability;

 

 typedef struct 


 {

     int    major;   

     int    minor;   

     int    build;   

 } NppLibraryVersion;

 

 typedef unsigned char       Npp8u;     

 typedef signed char         Npp8s;     

 typedef unsigned short      Npp16u;    

 typedef short               Npp16s;    

 typedef unsigned int        Npp32u;    

 typedef int                 Npp32s;    

 typedef unsigned long long  Npp64u;    

 typedef long long           Npp64s;    

 typedef float               Npp32f;    

 typedef double              Npp64f;    

 typedef struct __align__(2)

 {

     Npp8u  re;     

     Npp8u  im;     

 } Npp8uc;

 

 typedef struct __align__(4)

 {

     Npp16u  re;     

     Npp16u  im;     

 } Npp16uc;

 

 typedef struct __align__(4)

 {

     Npp16s  re;     

     Npp16s  im;     

 } Npp16sc;

 

 typedef struct NPP_ALIGN_8


 {

     Npp32u  re;     

     Npp32u  im;     

 } Npp32uc;

 

 typedef struct NPP_ALIGN_8


 {

     Npp32s  re;     

     Npp32s  im;     

 } Npp32sc;

 

 typedef struct NPP_ALIGN_8


 {

     Npp32f  re;     

     Npp32f  im;     

 } Npp32fc;

 

 typedef struct NPP_ALIGN_16


 {

     Npp64s  re;     

     Npp64s  im;     

 } Npp64sc;

 

 typedef struct NPP_ALIGN_16


 {

     Npp64f  re;     

     Npp64f  im;     

 } Npp64fc;

 

 #define NPP_MIN_8U      ( 0 )                        


 #define NPP_MAX_8U      ( 255 )                      


 #define NPP_MIN_16U     ( 0 )                        


 #define NPP_MAX_16U     ( 65535 )                    


 #define NPP_MIN_32U     ( 0 )                        


 #define NPP_MAX_32U     ( 4294967295U )              


 #define NPP_MIN_64U     ( 0 )                        


 #define NPP_MAX_64U     ( 18446744073709551615ULL )  


 #define NPP_MIN_8S      (-127 - 1 )                  


 #define NPP_MAX_8S      ( 127 )                      


 #define NPP_MIN_16S     (-32767 - 1 )                


 #define NPP_MAX_16S     ( 32767 )                    


 #define NPP_MIN_32S     (-2147483647 - 1 )           


 #define NPP_MAX_32S     ( 2147483647 )               


 #define NPP_MAX_64S     ( 9223372036854775807LL )    


 #define NPP_MIN_64S     (-9223372036854775807LL - 1) 


 #define NPP_MINABS_32F  ( 1.175494351e-38f )         


 #define NPP_MAXABS_32F  ( 3.402823466e+38f )         


 #define NPP_MINABS_64F  ( 2.2250738585072014e-308 )  


 #define NPP_MAXABS_64F  ( 1.7976931348623158e+308 )  


 typedef struct 


 {

     int x;      

     int y;      

 } NppiPoint;

 

 typedef struct {

     Npp32f rho;

     Npp32f theta;

 } NppPointPolar;

 

 typedef struct 


 {

     int width;  

     int height; 

 } NppiSize;

 

 typedef struct


 {

     int x;          

     int y;          

     int width;      

     int height;     

 } NppiRect;

 

 typedef enum 

 {

     NPP_HORIZONTAL_AXIS,

     NPP_VERTICAL_AXIS,

     NPP_BOTH_AXIS


 } NppiAxis;

 

 typedef enum 

 {

     NPP_CMP_LESS,

     NPP_CMP_LESS_EQ,

     NPP_CMP_EQ,

     NPP_CMP_GREATER_EQ,

     NPP_CMP_GREATER


 } NppCmpOp;

 

 typedef enum 

 {

     NPP_RND_NEAR,

     NPP_ROUND_NEAREST_TIES_TO_EVEN = NPP_RND_NEAR, 

 

     NPP_RND_FINANCIAL,

     NPP_ROUND_NEAREST_TIES_AWAY_FROM_ZERO = NPP_RND_FINANCIAL, 

 

     NPP_RND_ZERO,

     NPP_ROUND_TOWARD_ZERO = NPP_RND_ZERO, 

     

     /*


      * Other rounding modes supported by IEEE-754 (2008) floating-point standard:


      *


      * - NPP_ROUND_TOWARD_INFINITY // ceiling


      * - NPP_ROUND_TOWARD_NEGATIVE_INFINITY // floor


      *


      */


 } NppRoundMode;

 

 typedef enum  

 {

     NPP_BORDER_UNDEFINED        = 0,

     NPP_BORDER_NONE             = NPP_BORDER_UNDEFINED, 

     NPP_BORDER_CONSTANT         = 1,

     NPP_BORDER_REPLICATE        = 2,

     NPP_BORDER_WRAP             = 3,

     NPP_BORDER_MIRROR           = 4

 } NppiBorderType;

 

 

 typedef enum {

     NPP_ALG_HINT_NONE,

     NPP_ALG_HINT_FAST,

     NPP_ALG_HINT_ACCURATE


 } NppHintAlgorithm;

 

 /* 


  * Alpha composition controls. 


  */


 

 typedef enum {

     NPPI_OP_ALPHA_OVER,

     NPPI_OP_ALPHA_IN,

     NPPI_OP_ALPHA_OUT,

     NPPI_OP_ALPHA_ATOP,

     NPPI_OP_ALPHA_XOR,

     NPPI_OP_ALPHA_PLUS,

     NPPI_OP_ALPHA_OVER_PREMUL,

     NPPI_OP_ALPHA_IN_PREMUL,

     NPPI_OP_ALPHA_OUT_PREMUL,

     NPPI_OP_ALPHA_ATOP_PREMUL,

     NPPI_OP_ALPHA_XOR_PREMUL,

     NPPI_OP_ALPHA_PLUS_PREMUL,

     NPPI_OP_ALPHA_PREMUL


 } NppiAlphaOp;

 

 

 typedef struct 


 {

     int      cellSize;             

     int      histogramBlockSize;   

     int      nHistogramBins;       

     NppiSize detectionWindowSize;  

 } NppiHOGConfig;

 

 #define NPP_HOG_MAX_CELL_SIZE                          (16) 


 #define NPP_HOG_MAX_BLOCK_SIZE                         (64) 


 #define NPP_HOG_MAX_BINS_PER_CELL                      (16) 


 #define NPP_HOG_MAX_CELLS_PER_DESCRIPTOR              (256) 


 #define NPP_HOG_MAX_OVERLAPPING_BLOCKS_PER_DESCRIPTOR (256) 


 #define NPP_HOG_MAX_DESCRIPTOR_LOCATIONS_PER_CALL     (128) 


 typedef struct


 {

     int      numClassifiers;    

     Npp32s * classifiers;       

     size_t   classifierStep;

     NppiSize classifierSize;

     Npp32s * counterDevice;

 } NppiHaarClassifier_32f;

 

 typedef struct


 {

     int      haarBufferSize;    

     Npp32s * haarBuffer;        

 } NppiHaarBuffer;

 

 typedef enum {

     nppZCR,    

     nppZCXor,  

     nppZCC     

 } NppsZCType;

 

 typedef enum {

     nppiDCTable,    

     nppiACTable,    

 } NppiHuffmanTableType;

 

 typedef enum {

     nppiNormInf = 0, 

     nppiNormL1 = 1,  

     nppiNormL2 = 2   

 } NppiNorm;

 

 

 #ifdef __cplusplus


 } /* extern "C" */


 #endif


 


 #endif /* NV_NPPIDEFS_H */