# cuDSS Data Types [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudss-data-types "Link to this heading")

## Opaque Data Structures [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#opaque-data-structures "Link to this heading")

### `cudssHandle_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudsshandle-t "Link to this heading")

structcudssHandle\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssHandle_t "Link to this definition")

The structure holds the cuDSS library context (device properties, system information, execution controls like cudaStream\_t, etc.).

The handle must be initialized prior to calling any other cuDSS API with [`cudssCreate()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssCreate "cudssCreate") or [`cudssCreateMg()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssCreateMg "cudssCreateMg").
The handle must be destroyed to free up resources after using cuDSS with [`cudssDestroy()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDestroy "cudssDestroy").

### `cudssMatrix_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssmatrix-t "Link to this heading")

structcudssMatrix\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrix_t "Link to this definition")

The structure is a lightweight wrapper around standard dense/sparse matrix parameters and does not own any data arrays.
Matrix objects are used to pass matrix of the linear system, as well as solution and right-hand side (even if these are in fact vectors).
Currently, cuDSS matrix objects can have either one of the two underlying matrix formats: dense and 3-array CSR (sparse). Additionally,
they can represent non-uniform batches of matrices or distributed (in the MGMN mode).

Matrix objects should be created via [`cudssMatrixCreateDn()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssMatrixCreateDn "cudssMatrixCreateDn") (for dense matrices) or
[`cudssMatrixCreateBatchDn()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html#c.cudssMatrixCreateBatchDn "cudssMatrixCreateBatchDn") (for a batch of dense matrices) or
[`cudssMatrixCreateCsr()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssMatrixCreateCsr "cudssMatrixCreateCsr") (for sparse matrices in CSR format) or
[`cudssMatrixCreateBatchCsr()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html#c.cudssMatrixCreateBatchCsr "cudssMatrixCreateBatchCsr") (for a batch of sparse matrices in CSR format). After use, matrix objects should be destroyed
via [`cudssMatrixDestroy()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssMatrixDestroy "cudssMatrixDestroy"). For distributed matrices, one can additionally call [`cudssMatrixSetDistributionRow1d()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssMatrixSetDistributionRow1d "cudssMatrixSetDistributionRow1d") to define how the matrix is distributed.

Matrix objects can be modified after creation via [`cudssMatrixSetValues()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html#c.cudssMatrixSetValues "cudssMatrixSetValues") and [`cudssMatrixSetCsrPointers()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssMatrixSetCsrPointers "cudssMatrixSetCsrPointers") (and similar APIs for batches).

Information can be retrieved from a matrix object by calling [`cudssMatrixGetFormat()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssMatrixGetFormat "cudssMatrixGetFormat") followed by either [`cudssMatrixGetDn()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html#c.cudssMatrixGetDn "cudssMatrixGetDn") or [`cudssMatrixGetCsr()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html#c.cudssMatrixGetCsr "cudssMatrixGetCsr") depending on the format returned.

### `cudssData_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssdata-t "Link to this heading")

structcudssData\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssData_t "Link to this definition")

The structure holds internal data (e.g., factors related data structures) as well as pointers to user-provided data.
A single object of this type should be associated with solving a specific linear system.
If multiple systems with the same datatype(!) are solved consecutively the object can be re-used (all necessary internal buffers will be re-created per necessity).

Note: by default, the library allocates device memory required for performing LU factorization and storing the LU factors internally. All data buffers are of this kind are kept inside the data object.
To change this default behavior, one can set a [`cudssDeviceMemHandler_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDeviceMemHandler_t "cudssDeviceMemHandler_t") which will then be used for allocating device memory inside the solver.

The object should be created via [`cudssDataCreate()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html#c.cudssDataCreate "cudssDataCreate") and destroyed via [`cudssDataDestroy()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataDestroy "cudssDataDestroy").

During execution of any of the stages [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute"), configuration settings of the solver are read from `cudssConfig_t` and thus affect the execution and internal data stored in the `cudssData_t` object.

Data parameters can be updated or retrieved by calling [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet") or [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") respectively.

### `cudssConfig_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssconfig-t "Link to this heading")

structcudssConfig\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfig_t "Link to this definition")

The structure stores configuration settings for the solver. This object is a lightweight (host-side) wrapper around common solver settings. While it can be re-used for solving different linear systems, it is recommended to have one per linear system.

The object should be created via [`cudssConfigCreate()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssConfigCreate "cudssConfigCreate") and destroyed via [`cudssConfigDestroy()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssConfigDestroy "cudssConfigDestroy").

During execution of any of the stages [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute"), configuration settings of the solver are read from `cudssConfig_t` and thus affect the execution.

Configuration settings can be updated or retrieved by calling [`cudssConfigSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssConfigSet "cudssConfigSet") or [`cudssConfigGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssConfigGet "cudssConfigGet") respectively.
Note: certain settings need to be set before a corresponding solver stage is executed (e.g., reordering algorithm must be set prior to the phase `CUDSS_PHASE_ANALYSIS`).

## Non-opaque Data Structures [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#non-opaque-data-structures "Link to this heading")

### `cudssDeviceMemHandler_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssdevicememhandler-t "Link to this heading")

structcudssDeviceMemHandler\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDeviceMemHandler_t "Link to this definition")

This structure holds information about the user-provided, stream-ordered device memory pool (mempool).

The object can be created by setting the struct members described below.

Once created, a device memory handler can be set for the cuDSS library handle via `cudssSetDeviceMemhandler()`.

Once set for the cuDSS library handle, information about the set device memory handler can be retrieved via `cudssGetDeviceMemhandler()`.

void\*ctx [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDeviceMemHandler_t.ctx "Link to this definition")

A pointer to the user-owned mempool/context object.

intdevice\_alloc(_void\*ctx_,_void\*\*ptr_,_size\_tsize_,_cudaStream\_tstream_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDeviceMemHandler_t.device_alloc "Link to this definition")

A function pointer to the user-provided routine for allocating device memory of size on `stream`.

The allocated memory should be made accessible to the current device (or more precisely, to the current CUDA context bound to the library handle).

This interface supports any stream-ordered memory allocator `ctx`. Upon success, the allocated memory can be immediately used on the given stream by any operations enqueued/ordered on the same stream after this call.

It is the caller’s responsibility to ensure a proper stream order is established.

The allocated memory should be at least 256-byte aligned.

Param ctx:

\[in\] A pointer to the user-owned mempool object.

Param ptr:

\[out\] On success, a pointer to the allocated buffer.

Param size:

\[in\] The amount of memory in bytes to be allocated.

Param stream:

\[in\] The CUDA stream on which the memory is allocated (and the stream order is established)

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intdevice\_free(_void\*ctx_,_void\*ptr_,_size\_tsize_,_cudaStream\_tstream_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDeviceMemHandler_t.device_free "Link to this definition")

A function pointer to the user-provided routine for deallocating device memory of `size` on `stream`.

This interface supports any stream-ordered memory allocator. Upon success, any subsequent accesses (of the memory pointed to by the pointer `ptr`)
ordered after this call are undefined behaviors.

It is the caller’s responsibility to ensure a proper stream order is established.

If the arguments `ctx` and `size` are not the same as those passed to `device_alloc` to allocate the memory pointed to by `ptr`, the behavior is undefined.

The argument `stream` need not be identical to the one used for allocating `ptr`, as long as the stream order is correctly established. The behavior is undefined if this assumption is not held.

Param ctx:

\[in\] A pointer to the user-owned mempool object.

Param ptr:

\[in\] The pointer to the allocated buffer.

Param size:

\[in\] The size of the allocated memory.

Param stream:

\[in\] The CUDA stream on which the memory is deallocated (and the stream order is established).

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

`char name[CUDSS_ALLOCATOR_NAME_LEN]`

The name of the provided mempool (must not exceed 64 characters).

## Enumerators [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#enumerators "Link to this heading")

### `cudssStatus_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssstatus-t "Link to this heading")

enumcudssStatus\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssStatus_t "Link to this definition")

> The enumerator specifies possible status values (on the host) which can be returned from calls to cuDSS routines.
>
> Note: device side failures are returned via [`CUDSS_DATA_INFO`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_INFO "CUDSS_DATA_INFO") from [`cudssDataParam_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t "cudssDataParam_t").

enumeratorCUDSS\_STATUS\_SUCCESS [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssStatus_t.CUDSS_STATUS_SUCCESS "Link to this definition")

The operation completed successfully.

enumeratorCUDSS\_STATUS\_NOT\_INITIALIZED [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssStatus_t.CUDSS_STATUS_NOT_INITIALIZED "Link to this definition")

One of the input operands was not properly initialized prior to the call to a cuDSS routine. This can usually be one of the opaque objects like [`cudssHandle_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssHandle_t "cudssHandle_t"), [`cudssData_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssData_t "cudssData_t") or others.

enumeratorCUDSS\_STATUS\_ALLOC\_FAILED [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssStatus_t.CUDSS_STATUS_ALLOC_FAILED "Link to this definition")

Resource allocation failed inside the cuDSS library. This is usually caused by a device memory allocation (cudaMalloc()) or by a host memory allocation failure

enumeratorCUDSS\_STATUS\_INVALID\_VALUE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssStatus_t.CUDSS_STATUS_INVALID_VALUE "Link to this definition")

An incorrect value or parameter was passed to the function (a negative vector size, or a a NULL pointer for a must-have buffer,for example)

enumeratorCUDSS\_STATUS\_NOT\_SUPPORTED [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssStatus_t.CUDSS_STATUS_NOT_SUPPORTED "Link to this definition")

An unsupported (but otherwise reasonable parameter was passed to the function

enumeratorCUDSS\_STATUS\_EXECUTION\_FAILED [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssStatus_t.CUDSS_STATUS_EXECUTION_FAILED "Link to this definition")

The GPU program failed to execute. This is often caused by a launch failure of the kernel on the GPU, which can be caused by multiple reasons

enumeratorCUDSS\_STATUS\_INTERNAL\_ERROR [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssStatus_t.CUDSS_STATUS_INTERNAL_ERROR "Link to this definition")

An internal cuDSS operation failed

### `cudssConfigParam_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssconfigparam-t "Link to this heading")

enumcudssConfigParam\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t "Link to this definition")

> The enumerator specifies possible names of solver configuration settings. For each setting there is a matching type to be used in [`cudssConfigSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssConfigSet "cudssConfigSet") or [`cudssConfigGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssConfigGet "cudssConfigGet").

enumeratorCUDSS\_CONFIG\_REORDERING\_ALG [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_REORDERING_ALG "Link to this definition")

Algorithm for the reordering phase Supported options are:

- `CUDSS_ALG_DEFAULT` \- a customized nested dissection algorithm based on METIS.

- `CUDSS_ALG_1` \- a custom combination of block triangular reordering and COLAMD algorithms which can be used together with global pivoting to increase solution pivots.
When this option is used for reordering, cuDSS uses an appropriate custom factorization algorithm (without the need to change the factorization setting [`CUDSS_CONFIG_FACTORIZATION_ALG`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_FACTORIZATION_ALG "CUDSS_CONFIG_FACTORIZATION_ALG")).

- `CUDSS_ALG_2` \- similar to `CUDSS_ALG_1` that it implies using a special factorization algorithm which is tailored for a block-triangular representation but, unlike `CUDSS_ALG_1`, this option uses a trivial block structure.

- `CUDSS_ALG_3` \- an approximate minimum degree (AMD) reordering.


Note: `CUDSS_ALG_1` and `CUDSS_ALG_2` are only supported for general (non-symmetric or non-hermitian) matrices.

Note: `CUDSS_ALG_1` uses an upper bound on the number of non-zero entries in the factors factors.
If this bound appears to be not sufficient during the factorization phase, a runtime device error is returned (which can be checked by synchronizing the stream and calling `cudssDataGet()` with [`CUDSS_DATA_INFO`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_INFO "CUDSS_DATA_INFO") which will output the device error).
In order to set a non-default upper bound, one should call `cudssConfigSet()` with [`CUDSS_CONFIG_MAX_LU_NNZ`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_MAX_LU_NNZ "CUDSS_CONFIG_MAX_LU_NNZ") setting.

Note: `CUDSS_ALG_3` does not support the matrix index type `int64_t`.

Associated parameter type: [`cudssAlgType_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t "cudssAlgType_t")

Default value: `CUDSS_ALG_DEFAULT`

enumeratorCUDSS\_CONFIG\_FACTORIZATION\_ALG [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_FACTORIZATION_ALG "Link to this definition")

Algorithm for the factorization phase Supported options are:

- `CUDSS_ALG_DEFAULT` \- the default factorization algorithm.
this option chooses the best fitting factorization algorithm based on the choice of the reordering algorithm and sparsity structure produced by it.
It is not recommended to use other options.

- `CUDSS_ALG_1` \- a modification of the default algorithm.


Associated parameter type: [`cudssAlgType_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t "cudssAlgType_t")

Default value: `CUDSS_ALG_DEFAULT`

enumeratorCUDSS\_CONFIG\_SOLVE\_ALG [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_SOLVE_ALG "Link to this definition")

Algorithm for the solving phase Supported options are:

- `CUDSS_ALG_DEFAULT` \- the default solve algorithm.


Other options are not supported.

Associated parameter type: [`cudssAlgType_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t "cudssAlgType_t")

Default value: `CUDSS_ALG_DEFAULT`

enumeratorCUDSS\_CONFIG\_PIVOT\_EPSILON\_ALG [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_PIVOT_EPSILON_ALG "Link to this definition")

Algorithm for the pivot epsilon calculation Supported options are:

- `CUDSS_ALG_DEFAULT` \- pivots with magnitude smaller than epsilon will be replaced by the appropriately signed epsilon.

- `CUDSS_ALG_1` \- pivots with magnitude smaller than epsilon will be replaced by the appropriately signed and scaled epsilon.
The scale will be computed as the maximum element in the corresponding row and column of the original matrix.


Note: `CUDSS_ALG_1` for `CUDSS_CONFIG_PIVOT_EPSILON_ALG` is not supported when [`CUDSS_CONFIG_REORDERING_ALG`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_REORDERING_ALG "CUDSS_CONFIG_REORDERING_ALG") is set to `CUDSS_ALG_1` or `CUDSS_ALG_2`

Associated parameter type: [`cudssAlgType_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t "cudssAlgType_t")

Default value: `CUDSS_ALG_DEFAULT`

enumeratorCUDSS\_CONFIG\_USE\_MATCHING [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_USE_MATCHING "Link to this definition")

Flag for enabling/disabling matching. Matching is as an optional preprocessing step which computes a (non-symmetric column) permutation to put larger values on the diagonal which often improves the accuracy of the solution.
This permutation is then combined with the permutation from the reordering.
While matching often reduces the number of perturbed pivots and improves accuracy of the solution
(especially for ill-conditioned and badly scaled matrices) there are no guarantees that the accuracy will improve.
Enabling matching brings an overhead during the analysis step and changes the non-zero pattern of the factors and therefore, can slow down factorization and solve.

Note: matching routines require their internal workspace size to fit into the limit of 32-bit integers. The workspace limit depend on the choice of the matching algorithm.
The biggest requirement among them is to have `10 * nrows + nnz` < `INT_MAX` (`nrows` and `nnz` for the input matrix without accounting for symmetry).

Associated parameter type: `int`

Default value: `0` (matching disabled)

enumeratorCUDSS\_CONFIG\_MATCHING\_ALG [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_MATCHING_ALG "Link to this definition")

Algorithm for matching Matching algorithm setting is only used if `CUDSS_CONFIG_USE_MATCHING` is not equal to `0`.

Supported options are:

- `CUDSS_ALG_DEFAULT` \- same as `CUDSS_ALG_5` (the most robust option).

- `CUDSS_ALG_1` \- this option is based on `job = 1` from MC64 algorithm (HSL).
Computes a column permutation of the matrix so that the permuted matrix has as many entries on its diagonal as possible. The values on the diagonal are of arbitrary size.
Note: this option does not use matrix values and thus can actually make the accuracy worse. It is not recommended to use this algorithm for matching unless there is a justified need.

- `CUDSS_ALG_2` \- this option is based on `job = 2` from MC64 algorithm (HSL). Computes a column permutation of the matrix so that the smallest value on the diagonal of the permuted matrix is maximized.

- `CUDSS_ALG_3` \- this option is based on `job = 3` from MC64 algorithm (HSL). Computes a column permutation of the matrix so that the smallest value on the diagonal of the permuted matrix is maximized.
This algorithm is different from the one used for `CUDSS_ALG_2`.

- `CUDSS_ALG_4` \- this option is based on `job = 4` from MC64 algorithm (HSL). Computes a column permutation of the matrix so that the sum of the diagonal entries of the permuted matrix is maximized.

- `CUDSS_ALG_5` \- this option is based on `job = 5` from MC64 algorithm (HSL). Computes a column permutation of the matrix so that the product of the diagonal entries of the permuted matrix is maximized.
In addition, this algorithm computes the row/col scaling vectors which can further improve accuracy of the solution.


Note: one of the options, `CUDSS_ALG_5`, computes scaling vectors in addition to the matching permutation. This option is considered to be the most impactful and it is recommended to use this option if accuracy of the solution needs to be improved.
However, this option requires matrix values to be present during the analysis step.

Note: matching is not supported for `CUDSS_ALG_1` and `CUDSS_ALG_2` reordering algorithms (which use global pivoting to make the solution more accurate) or distributed matrices.

Associated parameter type: [`cudssAlgType_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssAlgType_t "cudssAlgType_t")

Default value: `CUDSS_ALG_DEFAULT` (matching with scaling, requires matrix values)

enumeratorCUDSS\_CONFIG\_SOLVE\_MODE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_SOLVE_MODE "Link to this definition")

Potential modificator on the system matrix (e.g. transpose or conjugate transpose)

Associated parameter type: `int`

Default value: `0` (no modificator).

Other values are not supported.

enumeratorCUDSS\_CONFIG\_IR\_N\_STEPS [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_IR_N_STEPS "Link to this definition")

Number of steps during the iterative refinement

Associated parameter type: `int`

Default value: `0`

enumeratorCUDSS\_CONFIG\_IR\_TOL [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_IR_TOL "Link to this definition")

Iterative refinement tolerance

Associated parameter type: `double`

Currently it is ignored (exactly [`CUDSS_CONFIG_IR_N_STEPS`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_IR_N_STEPS "CUDSS_CONFIG_IR_N_STEPS") steps are made)

enumeratorCUDSS\_CONFIG\_PIVOT\_TYPE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_PIVOT_TYPE "Link to this definition")

Type of pivoting

The exact meaning of this parameter depends on the choice of the reordering algorithm which can be changed through [`CUDSS_CONFIG_REORDERING_ALG`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_REORDERING_ALG "CUDSS_CONFIG_REORDERING_ALG").
For `CUDSS_ALG_1` and `CUDSS_ALG_2` the parameter refers to the global pivoting, while for `CUDSS_ALG_DEFAULT` and others it refers to the partial 1x1 pivoting procedure.

Note that in the latter case, if the matrix type is symmetric but not positive-definite, then the pivoting is also symmetric and the pivot is searched for on the diagonal of the block, if only the pivot type is not equal to `CUDSS_PIVOT_NONE`.

For more details, see the description of the [pivoting strategies](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#pivoting-desc-label).

Associated parameter type: [`cudssPivotType_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPivotType_t "cudssPivotType_t")

Default value: `CUDSS_PIVOT_COL`.

enumeratorCUDSS\_CONFIG\_PIVOT\_THRESHOLD [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_PIVOT_THRESHOLD "Link to this definition")

Pivoting threshold pthreshold which is used to determine if diagonal element is subject to pivoting and will be swapped with the maximum element in the row (or column) depending on the [type of pivoting](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#cudsspivottype-t-label).
The diagonal element will be swapped if:
pthreshold⋅max(sub)roworcol\|aij\|≥\|aii\|

For more details, see the description of the [pivoting strategies](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#pivoting-desc-label).

Note: this parameter is only supported when reordering algorithm is set to [`CUDSS_ALG_1`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t.CUDSS_ALG_1 "CUDSS_ALG_1") or [`CUDSS_ALG_2`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t.CUDSS_ALG_2 "CUDSS_ALG_2").

Associated parameter type: `double`

Default value: `1.0f`.

enumeratorCUDSS\_CONFIG\_PIVOT\_EPSILON [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_PIVOT_EPSILON "Link to this definition")

Pivoting epsilon.

By default, this is the absolute value to test and replace small diagonal elements encountered during numerical factorization.

In case `CUDSS_CONFIG_EPSILON_ALG` is set to `CUDSS_ALG_1`, this value will be additionally scaled (see more details in the description of `CUDSS_CONFIG_EPSILON_ALG`).

Associated parameter type: `double`

Default value: `1e-5` for single precision and `1e-13` for double precision.

enumeratorCUDSS\_CONFIG\_MAX\_LU\_NNZ [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_MAX_LU_NNZ "Link to this definition")

Upper limit on the number of nonzero entries in LU factors. This is only relevant for non-symmetric matrices and reordering algorithm set to `CUDSS_ALG_1` or `CUDSS_ALG_2`.
If the number of non-zero entries in L and U exceeds the set limit, a runtime error happen. See also the note for `CUDSS_ALG_1` in the table entry for [`CUDSS_CONFIG_REORDERING_ALG`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_REORDERING_ALG "CUDSS_CONFIG_REORDERING_ALG").

Associated parameter type: `int64_t`

Default value: `-1` (then the parameter value is ignored and cuDSS uses an estimate of `100 nnz` where `nnz` is the number of non-zero entries in the input matrix).

enumeratorCUDSS\_CONFIG\_HYBRID\_MODE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_MODE "Link to this definition")

Memory mode: `0` (default = device-only) or `1` (hybrid = host/device).

Note: Hybrid memory mode should be enabled before the analysis phase ( [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute") with [`CUDSS_PHASE_ANALYSIS`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_ANALYSIS "CUDSS_PHASE_ANALYSIS")).
If the decision to use the hybrid mode is done after the analysis phase, the hybrid memory mode should be enabled and analysis phase must be re-done (which is sub-optimal).

Note: Unlike the hybrid execution mode (see [`CUDSS_CONFIG_HYBRID_EXECUTE_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_EXECUTE_MODE "CUDSS_CONFIG_HYBRID_EXECUTE_MODE")) which controls where compute kernels are executed, the hybrid memory mode
only allows cuDSS to keep part of the factor values (internal data) on the host and always uses GPU for factorization and solve.

For more details regarding the hybrid memory mode, see [Hybrid mode feature](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-mode-label).

Associated parameter type: `int`

Default value: `0` (disabled).

Currently not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` is used for reordering, or, when `CUDSS_ALG_1` is used for the factorization.

enumeratorCUDSS\_CONFIG\_HYBRID\_DEVICE\_MEMORY\_LIMIT [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_DEVICE_MEMORY_LIMIT "Link to this definition")

User-defined device memory limit (number of bytes) for the hybrid memory mode.

This setting only affects execution when the hybrid memory mode is enabled.
For more details regarding the hybrid memory mode, see [Hybrid mode feature](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-mode-label).

Note: In case of multiple devices ( [`cudssCreateMg()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssCreateMg "cudssCreateMg")) this value must be set for each device separately by calling `cudaSetDevice()` prior to [`cudssConfigSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssConfigSet "cudssConfigSet")

Associated parameter type: `int64_t`

Default value: `-1` (use the internal default heuristic).

enumeratorCUDSS\_CONFIG\_USE\_CUDA\_REGISTER\_MEMORY [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_USE_CUDA_REGISTER_MEMORY "Link to this definition")

A flag to enable or disable usage of `cudaHostRegister()` by cuDSS hybrid memory mode. Since the hybrid memory mode of cuDSS uses host memory to store the factors,
it can use `cudaHostRegister()` (if the HW supports it) to speedup associated host-to-device and device-to-host memory transfers.
However, registering host memory has limitations and in some cases might lead to slowdowns. it. If the flag is set to `0`, cuDSS will not attempt to use `cudaHostRegister()` even if the HW supports it.
This setting only affects execution when the hybrid memory mode is enabled. For more details regarding the hybrid memory mode, see [Hybrid mode feature](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-mode-label).

Associated parameter type: `int`

Default value: `1` (use `cudaHostRegister()` if the device supports it)

enumeratorCUDSS\_CONFIG\_HOST\_NTHREADS [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HOST_NTHREADS "Link to this definition")

Number of threads to be used by cuDSS in [MT mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mt-mode-label).
This setting only affects execution when the multi-threaded mode is enabled.

Associated parameter type: `int`

Default value: `-1` (use number of threads returned by `cudssGetMaxThreads()`)

enumeratorCUDSS\_CONFIG\_HYBRID\_EXECUTE\_MODE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_EXECUTE_MODE "Link to this definition")

Execute mode: `0` (default = device-only) or `1` (hybrid = host/device).
Hybrid execute mode allows cuDSS to perform calculations on both GPU and CPU.
Currently it is used to speed up execution parts with low parallelization capacity.

Note: Reordering part of the analysis step is performed on CPU regardless of execute mode value.

Note: Hybrid execute mode should be enabled before the analysis phase ( [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute") with `CUDSS_PHASE_ANALYSIS`).

Note: Unlike the hybrid execution mode which controls where compute kernels are executed
(and allows greater flexibility in placement of the input data), the hybrid memory mode [`CUDSS_CONFIG_HYBRID_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_MODE "CUDSS_CONFIG_HYBRID_MODE") only allows cuDSS to keep part of the factor values (internal data)
on the host while only GPU is used for factorization and solve.

Note: If hybrid execute mode is enabled input matrix, right hand side and solution can be host memory pointers.

For more details regarding the hybrid execute mode, see [Hybrid execute mode feature](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-execute-mode-label).

Associated parameter type: `int`

Default value: `0` (disabled). Currently not supported when `nrhs > 1`, or [`CUDSS_CONFIG_HYBRID_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_MODE "CUDSS_CONFIG_HYBRID_MODE") or `MGMN` mode is used, or, when `batchCount` is greater than 1.

enumeratorCUDSS\_CONFIG\_ND\_NLEVELS [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_ND_NLEVELS "Link to this definition")

Minimum number of levels for the nested dissection reordering. The value for this parameter should be a positive integer.
Additionally, for the [MGMN mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-mode-label) the number of levels will be automatically increased (if needed) to satisfy the requirement: 2nlevels−1≥nproc
where nproc is the number of processes in the communicator. This setting only works when reordering algorithm is `CUDSS_ALG_DEFAULT`.

Note: This is considered an advanced performance knob and it is recommended to use a non-default value only when optimizing for performance. Typical values to try should not be too far from the default value, e.g. from the range 8 - 11.

Associated parameter type: `int`

Default value: `10`.

enumeratorCUDSS\_CONFIG\_UBATCH\_SIZE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_UBATCH_SIZE "Link to this definition")

The number of matrices in a uniform batch of systems to be processed by cuDSS. Uniform batch of matrices is defined as a batch of matrices with the same non-zero pattern but potentially different values.
To create a uniform batch of matrices (unlike a non-uniform batch) one can simply use the usual [`cudssMatrixCreateCsr()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssMatrixCreateCsr "cudssMatrixCreateCsr") or [`cudssMatrixCreateDn()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssMatrixCreateDn "cudssMatrixCreateDn")
with the only change: as a pointer to the matrix values one should provide a buffer which holds values for all matrices in the batch.
Thus, it should have `nnz * CUDSS_CONFIG_UBATCH_SIZE` elements
for sparse matrices (`csr_values` only) and `nrows * ncols * CUDSS_CONFIG_UBATCH_SIZE` elements for dense matrices.

Note: a single system can be viewed as a uniform batch with `CUDSS_CONFIG_UBATCH_SIZE` set to 1.

There are two ways how cuDSS can process a uniform batch based on the value of the [`CUDSS_CONFIG_UBATCH_INDEX`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_UBATCH_INDEX "CUDSS_CONFIG_UBATCH_INDEX"): either factorizing (or solving) all matrices at once or just one at a time.

For details, see the description of `CUDSS_CONFIG_UBATCH_INDEX`.

Note: `CUDSS_CONFIG_UBATCH_SIZE` must be set before calling `CUDSS_PHASE_ANALYSIS`.

Associated parameter type: `int`

Default value: `1`.

> Currently not supported when either [`CUDSS_CONFIG_HYBRID_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_MODE "CUDSS_CONFIG_HYBRID_MODE") (see [here](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-mode-label)) or [`CUDSS_CONFIG_HYBRID_EXECUTE_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_EXECUTE_MODE "CUDSS_CONFIG_HYBRID_EXECUTE_MODE") (see [here](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-execute-mode-label))
> are enabled, or [MGMN mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-mode-label) is used, or, with `CUDSS_ALG_1` and `CUDSS_ALG_2` reordering algorithms.

enumeratorCUDSS\_CONFIG\_UBATCH\_INDEX [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_UBATCH_INDEX "Link to this definition")

`-1` or a 0-based index of matrix in a uniform batch which will be processed during factorization or solve phase.
Special value of `-1` can be used to tell cuDSS to process all matrices in the uniform batch at once.

Note: `CUDSS_CONFIG_UBATCH_INDEX` must be less than [`CUDSS_CONFIG_UBATCH_SIZE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_UBATCH_SIZE "CUDSS_CONFIG_UBATCH_SIZE").

Note: if `CUDSS_CONFIG_UBATCH_INDEX` is set then cuDSS will treat the input sparse matrix, right hand side and solution as regular matrices (with just one set of values).
Thus, it allows to process a uniform batch of matrices one by one while re-using the result of the analysis and keeping corresponding factors for all matrices in a single `cudssData_t` object.

Note: `CUDSS_CONFIG_UBATCH_INDEX` can be set after [`CUDSS_PHASE_FACTORIZATION`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_FACTORIZATION "CUDSS_PHASE_FACTORIZATION"), in that case one could solve only one specific system

Associated parameter type: `int`

Default value: `-1`

Currently not supported when either [`CUDSS_CONFIG_HYBRID_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_MODE "CUDSS_CONFIG_HYBRID_MODE") (see [here](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-mode-label)) or [`CUDSS_CONFIG_HYBRID_EXECUTE_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_EXECUTE_MODE "CUDSS_CONFIG_HYBRID_EXECUTE_MODE") (see [here](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-execute-mode-label))
are enabled, or [MGMN mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-mode-label) is used, or, with `CUDSS_ALG_1` and `CUDSS_ALG_2` reordering algorithms.

enumeratorCUDSS\_CONFIG\_USE\_SUPERPANELS [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_USE_SUPERPANELS "Link to this definition")

Use superpanel optimization: `1` (default = enabled) or `0` (disabled).

Note: superpanel optimization should be enabled before the analysis phase ( [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute") with [`CUDSS_PHASE_ANALYSIS`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_ANALYSIS "CUDSS_PHASE_ANALYSIS")).
If the decision to use the superpanel optimization mode is done after the analysis phase, the superpanel optimization should be enabled and analysis phase must be re-done which is sub-optimal).

Associated parameter type: `int`

Default value: `1` (enabled).

enumeratorCUDSS\_CONFIG\_DEVICE\_COUNT [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_DEVICE_COUNT "Link to this definition")

Device count in case of multiple device (see [`cudssCreateMg()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssCreateMg "cudssCreateMg"))

Note: Maximum supported device count is 16

Associated parameter type: `int`

Default value: `1`

enumeratorCUDSS\_CONFIG\_DEVICE\_INDICES [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_DEVICE_INDICES "Link to this definition")

A list of device indices as an integer array.

Note: The calling device must be equal to the first device index from `device_indices` or `0` (if `device_indices` were `NULL` in the required prior call to [`cudssCreateMg()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssCreateMg "cudssCreateMg"))

Associated parameter type: `int`

Default value: `NULL` (cuDSS will use devices from 0 to `device_count - 1`).

enumeratorCUDSS\_CONFIG\_SCHUR\_MODE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssConfigParam_t.CUDSS_CONFIG_SCHUR_MODE "Link to this definition")

Schur complement mode: `0` (default = disabled) or `1` (enabled).

For more details regarding the Schur complement feature, see [Schur complement feature](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#schur-complement-label).

Associated parameter type: `int`

Default value: `0` (disabled).

Currently not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` is used for reordering, when [MGMN mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-mode-label) or [multi-GPU mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mg-mode-label) is used,
or, when `CUDSS_ALG_1` is used for the factorization. It is also not supported when a user permutation is set, for uniform and non-uniform batches, or when matching is enabled.

enumeratorCUDSS\_CONFIG\_DETERMINISTIC\_MODE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_DETERMINISTIC_MODE "Link to this definition")

Enable deterministic mode.
In deterministic mode, cuDSS is guaranteed to provide the bit-wise identical result at every run when executed on GPUs with the same architecture
and the same number of SMs (assuming the input data and solver settings are also bit-wise identical).

Note: in deterministic mode cuDSS uses a different set of kernels which often might be slower than the kernels used in the default mode.

Associated parameter type: `int`

Default value: `0` (disabled).

Currently the feature is supported only for single-gpu, single rhs and with hybrid memory mode ( [`CUDSS_CONFIG_HYBRID_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_MODE "CUDSS_CONFIG_HYBRID_MODE")) and hybrid execute mode ( [`CUDSS_CONFIG_HYBRID_EXECUTE_MODE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_HYBRID_EXECUTE_MODE "CUDSS_CONFIG_HYBRID_EXECUTE_MODE")) disabled.

### `cudssDataParam_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssdataparam-t "Link to this heading")

enumcudssDataParam\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t "Link to this definition")

> The enumerator specifies possible parameter names which can set or get in the [`cudssData_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssData_t "cudssData_t") object. For each parameter name
> there is an associated type to be used in [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet") or [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet"). Each parameter
> name is marked with “in” or “out” depending on whether a parameter can be only set, get or be involved in both.

enumeratorCUDSS\_DATA\_INFO [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_INFO "Link to this definition")

By default, this parameter can be used to detect device-side asynchronous errors (primarily, during factorization and solve).
However, in the special case, when in [hybrid execute mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-execute-mode-label) factorization is done on the host at least partially,
this parameter can be used to retrieve host-side errors. In case execution is successful, the value is `0`.

Note: the error returned via `CUDSS_DATA_INFO` is independent from the host side status of type [`cudssStatus_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssStatus_t "cudssStatus_t") returned by all cuDSS routines, including [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute").
One of the noticeable use cases is when a matrix of the system is passed with an `mtype` for positive-definite matrices but it appears to have non-positive minors (at least numerically).
In this case, calling [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") with `CUDSS_DATA_INFO` after the factorization phase will return the 1-based index of the first encountered non-positive minor.
Then one can set the device error back to zero via [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet"), and either change the matrix type or adjust the matrix values (to make the matrix positive-definite) and call the factorization phase again.

Note that the returned index is 1-based and is for the reordered matrix.
To get the corresponding original index, it should be combined with (inverse) permutation which can be extracted via [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") for [`CUDSS_DATA_PERM_REORDER_ROW`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_REORDER_ROW "CUDSS_DATA_PERM_REORDER_ROW").

Direction: out

Memory: host

Associated parameter type: `int`

enumeratorCUDSS\_DATA\_LU\_NNZ [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssDataParam_t.CUDSS_DATA_LU_NNZ "Link to this definition")

Number of non-zero entries in LU factors.

Note: in case `batchCount` \> 1 (non-uniform batch) [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") returns accumulated number over all
matrices in the batch.

Direction: out

Memory: host

Associated parameter type: `int64_t`

enumeratorCUDSS\_DATA\_NPIVOTS [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssDataParam_t.CUDSS_DATA_NPIVOTS "Link to this definition")

Number of pivots encountered during factorization.

Direction: out

Memory: host

Associated parameter type: same as for the indices of the sparse matrix of the system

enumeratorCUDSS\_DATA\_INERTIA [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_INERTIA "Link to this definition")

Positive and negative indices of inertia for the system matrix `A` (two integer values). Valid only for symmetric/Hermitian non positive-definite matrix types.

Note: in case `batchCount` \> 1 (non-uniform batch) [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") returns the accumulated number over all
matrices in the batch.

Direction: out

Memory: host

Associated parameter type: same as for the indices of the sparse matrix of the system

enumeratorCUDSS\_DATA\_PERM\_REORDER\_ROW [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_REORDER_ROW "Link to this definition")

Row permutation `P` after reordering such that `A[P,Q]` is factorized.

Note: using this parameter in [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") in case `batchCount` \> 1 is not supported.

Direction: out

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system

enumeratorCUDSS\_DATA\_PERM\_REORDER\_COL [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_REORDER_COL "Link to this definition")

Column permutation `Q` after reordering such that `A[P,Q]` is factorized.

Note: using this parameter in [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") in case `batchCount` \> 1 is not supported.

Direction: out

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system

enumeratorCUDSS\_DATA\_PERM\_ROW [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssDataParam_t.CUDSS_DATA_PERM_ROW "Link to this definition")

Final row permutation P (includes effects of both reordering and pivoting) which is applied to the original right-hand side of the system in the form bnew=bold∘P

Note: using this parameter in [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") in case `batchCount` \> 1 is not supported.

Direction: out

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system

Currently supported only when `CUDSS_ALG_1` or `CUDSS_ALG_2` is used for reordering.

enumeratorCUDSS\_DATA\_PERM\_COL [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_COL "Link to this definition")

Final column permutation Q (includes effects of both reordering and pivoting) which is applied to transform the solution of the permuted system into the original solution xold=xnew∘Q−1

Note: using this parameter in [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") in case `batchCount` \> 1 is not supported.

Direction: out

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system

Currently supported only when `CUDSS_ALG_1` or `CUDSS_ALG_2` is used for reordering.

enumeratorCUDSS\_DATA\_PERM\_MATCHING [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_MATCHING "Link to this definition")

Matching (column) permutation `Q` such that `A[:,Q]` is reordered and then factorized.

Direction: out

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system

enumeratorCUDSS\_DATA\_DIAG [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_DIAG "Link to this definition")

Diagonal of the factorized matrix

Note: in case `batchCount` \> 1 (non-uniform batch) [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") returns the accumulated values over all
matrices in the batch.

Direction: out

Memory: host or device

Associated parameter type: same as for the values of the sparse matrix of the system

Currently supported only when `CUDSS_ALG_1` or `CUDSS_ALG_2` is used for reordering.

enumeratorCUDSS\_DATA\_SCALE\_ROW [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_SCALE_ROW "Link to this definition")

Row scaling the factorized matrix (corresponding to the rows of the original matrix)

Direction: out

Memory: host or device

Associated parameter type: floating point for the absolute values of the matrix of of the system (i.e., always real, either float or double)

Only supported when matching is enabled and matching algorithm computes the scaling.

enumeratorCUDSS\_DATA\_SCALE\_COL [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_SCALE_COL "Link to this definition")

Column scaling the factorized matrix (corresponding to the columns of the original matrix).

Direction: out

Memory: host or device

Associated parameter type: floating point for the absolute values of the matrix of of the system (i.e., always real, either float or double) Only supported when matching is enabled and matching algorithm computes the scaling.

enumeratorCUDSS\_DATA\_USER\_PERM [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssDataParam_t.CUDSS_DATA_USER_PERM "Link to this definition")

User permutation to be used instead of running the reordering algorithms.
The user permutation can be disabled by providing a `NULL` with zero size with [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet").
The provided buffer should be an integer array of size `n`, where `n` is the number of rows/columns of the system matrix.
The integer type must match the one used for the system matrix.
The values should represent a valid permutation vector for the set {indexbase,...,n−indexbase}

Note: after [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet") is called with `CUDSS_DATA_USER_PERM`, the data are copied into an internal buffer so that the user buffer can be deallocated or re-used.

Note: using this parameter in [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") in case `batchCount` \> 1 is not supported.

Direction: in

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system

Currently not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` is used for reordering.

enumeratorCUDSS\_DATA\_ELIMINATION\_TREE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_ELIMINATION_TREE "Link to this definition")

Elimination tree information, also known as separator sizes, which are computed during the reordering phase and used for improving parallelization.
The number of elements in this array is 2⋅nlevels−1=2⋅(log2(ND\_NLEVELS)−1)−1 with
ND\_NLEVELS from [`CUDSS_CONFIG_ND_NLEVELS`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t.CUDSS_CONFIG_ND_NLEVELS "CUDSS_CONFIG_ND_NLEVELS"). `CUDSS_USER_PERMUTATION` and [`CUDSS_DATA_USER_ELIMINATION_TREE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_USER_ELIMINATION_TREE "CUDSS_DATA_USER_ELIMINATION_TREE") for a matrix with the same sparsity structure.
This avoids regenerating the same reordering information while retaining the same performance for the factorization and solve phases.

See the [Elimination Tree](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#elimination-tree-label) section for more details.

Direction: out

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system

enumeratorCUDSS\_DATA\_USER\_ELIMINATION\_TREE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssDataParam_t.CUDSS_DATA_USER_ELIMINATION_TREE "Link to this definition")

User provided elimination tree information, which is used instead of running the reordering algorithm (therefore, saving runtime).
It must be used in combination with [`CUDSS_DATA_USER_PERM`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_USER_PERM "CUDSS_DATA_USER_PERM") to have an effect.

See [`CUDSS_DATA_ELIMINATION_TREE`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_ELIMINATION_TREE "CUDSS_DATA_ELIMINATION_TREE") for the size and usage information. The user elimination tree can be disabled by providing a `NULL` with zero size with [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet").

Note: While it is possible to construct this array outside cuDSS (e.g., extracting the so-called `sizes` array from METIS / ParMETIS), we recommend to only use this feature by extracting the elimination tree from cuDSS,
followed by passing it back in subsequent calls.

Direction: in

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system.

enumeratorCUDSS\_DATA\_MEMORY\_ESTIMATES [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_MEMORY_ESTIMATES "Link to this definition")

Memory estimates (in bytes) for host and device memory required for the chosen memory mode.
The chosen memory mode is defined as the memory mode detected during the last executed analysis phase for the current `cudssData_t` object and the state of the corresponding `cudssConfigParam_t` object during the call.

See [`cudssConfigParam_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssConfigParam_t "cudssConfigParam_t") for more details.

Note: the returned memory estimate depends not just on the settings from `cudssConfig_t` object but also on the input matrix and rhs (specifically, nrhs)
so if the objects (or the config) change after the analysis phase, memory estimates might be not accurate anymore.

Values returned in the output array at position:
\\* 0 - permanent device memory
\\* 1 - peak device memory
\\* 2 - permanent host memory
\\* 3 - peak host memory
\\* 4 - (if in hybrid memory mode) minimum device memory for the hybrid memory mode
\\* 5 - (if in hybrid memory mode) maximum host memory for the hybrid memory mode
\\* 6, … 15 - reserved for future use

This query must be done after the analysis phase and will return status `CUDSS_STATUS_NOT_SUPPORTED` if it cannot be processed.

Note: In case of multiple devices ( [`cudssCreateMg()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssCreateMg "cudssCreateMg")) memory estimate will be done for the calling device only.
Thus, `cudaSetDevice()` must be called prior to `cudssDataGet()` to get memory estimate on corresponded device

Direction: out

Memory: host

Associated parameter type: `int64_t[16]`

enumeratorCUDSS\_DATA\_HYBRID\_DEVICE\_MEMORY\_MIN [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_HYBRID_DEVICE_MEMORY_MIN "Link to this definition")

Minimal amount of device memory (number of bytes) required in the hybrid memory mode. This query must be done after the analysis phase and will return status `CUDSS_STATUS_NOT_SUPPORTED` if it cannot be processed.

Note: In case of multiple devices ( [`cudssCreateMg()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssCreateMg "cudssCreateMg")) minimal memory will be returned for the calling device only.
Thus, `cudaSetDevice()` must be called prior to `cudssDataGet()` to get minimal memory on corresponded device

Direction: out

Memory: host

Associated parameter type: `int64_t`

For more details regarding the hybrid memory mode, see [Hybrid mode feature](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#hybrid-mode-label).

enumeratorCUDSS\_DATA\_COMM [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssDataParam_t.CUDSS_DATA_COMM "Link to this definition")

Communicator for [MGMN mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-mode-label).
The actual type of the communicator must match the [communication layer](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-commlayer-label) which must be set via calling [`cudssSetCommLayer()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssSetCommLayer "cudssSetCommLayer")
for the cuDSS library handle via [`cudssSetCommLayer()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssSetCommLayer "cudssSetCommLayer").

Direction: in

Memory: host

Associated parameter type: `void*`

For more details regarding the MGMN mode, see [MGMN mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-mode-label).

enumeratorCUDSS\_DATA\_NSUPERPANELS [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_NSUPERPANELS "Link to this definition")

Number of superpanels in the matrix.

Direction: out

Memory: host

Associated parameter type: same as for the indices of the sparse matrix of the system

enumeratorCUDSS\_DATA\_USER\_SCHUR\_INDICES [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_USER_SCHUR_INDICES "Link to this definition")

User-provided Schur complement indices. The provided buffer should be an integer array of size `n`, where `n` is the number of rows (columns) of the system matrix,
and the integer type should match the one used for the system matrix.
The values should be equal to `1` for the rows/columns which are part of the Schur complement and `0` for the rest.

Note: after [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet") is called with `CUDSS_DATA_USER_SCHUR_INDICES`, the data are copied into an internal buffer so that the user buffer can be deallocated or re-used.

Direction: in

Memory: host or device

Associated parameter type: same as for the indices of the sparse matrix of the system

enumeratorCUDSS\_DATA\_SCHUR\_SHAPE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_SCHUR_SHAPE "Link to this definition")

Shape of the Schur complement matrix as a triplet `(nrows, ncols, sparse nnz)`. The last entry is only relevant when the Schur complement needs to be exported as a sparse matrix
By querying with [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet") with `CUDSS_DATA_SCHUR_SHAPE`, users can get the necessary allocation sizes for the Schur complement buffers
which can then be used to create a `cudssMatrix_t` object and passed back to cuDSS to fill in the Schur complement data via [`cudssDataSet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataSet "cudssDataSet") with [`CUDSS_DATA_SCHUR_MATRIX`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_SCHUR_MATRIX "CUDSS_DATA_SCHUR_MATRIX").

Direction: out

Memory: host

Associated parameter type: `int64_t[3]`

enumeratorCUDSS\_DATA\_SCHUR\_MATRIX [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssDataParam_t.CUDSS_DATA_SCHUR_MATRIX "Link to this definition")

Schur complement matrix as a `cudssMatrix_t` object.

Direction: in

Memory: host (with underlying buffers on host or device)

Associated parameter type: `cudssMatrix_t`

enumeratorCUDSS\_DATA\_USER\_HOST\_INTERRUPT [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_USER_HOST_INTERRUPT "Link to this definition")

User-provided host interrupt pointer. Setting this pointer to a non-`NULL` value enables user interruption of cuDSS routines on the host.
Specifically, in the calls to [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute") cuDSS will perform checks on the host for the value of the pointer.
If it is non-zero, execution stops and cuDSS returns early (before the phase execution completes) with the status [`CUDSS_STATUS_EXECUTION_FAILED`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssStatus_t.CUDSS_STATUS_EXECUTION_FAILED "CUDSS_STATUS_EXECUTION_FAILED").
In case the application needs to continue cuDSS execution after the interruption, users can simple set the pointer’s value to `0` and repeat the call.
To remove the (small) overhead of checking for the host interruption, the interruption can be completely disabled by setting `CUDSS_DATA_USER_HOST_INTERRUPT` to `NULL`.

Note: since most of device kernels inside cuDSS are launched asynchronously,
execution on the GPU may continue some time after the host execution has been interrupted.

Direction: in

Memory: host

Default value: `NULL` (user interruption disabled)

Associated parameter type: `int`

### `cudssPhase_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssphase-t "Link to this heading")

enumcudssPhase\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssPhase_t "Link to this definition")

> The enumerator specifies the solver phases to be performed in the main cuDSS routine [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute").
> Phases can be combined with the binary OR operator (`|`) to specify multiple phases at once: `CUDSS_PHASE_FACTORIZATION | CUDSS_PHASE_SOLVE`.

enumeratorCUDSS\_PHASE\_REORDERING [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssPhase_t.CUDSS_PHASE_REORDERING "Link to this definition")

Reordering

enumeratorCUDSS\_PHASE\_SYMBOLIC\_FACTORIZATION [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssPhase_t.CUDSS_PHASE_SYMBOLIC_FACTORIZATION "Link to this definition")

Symbolic factorization

Note: it is not allowed to call symbolic factorization twice without calling the reordering phase in-between.

enumeratorCUDSS\_PHASE\_ANALYSIS [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_ANALYSIS "Link to this definition")

Reordering and symbolic factorization combined

enumeratorCUDSS\_PHASE\_FACTORIZATION [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssPhase_t.CUDSS_PHASE_FACTORIZATION "Link to this definition")

Numerical factorization

enumeratorCUDSS\_PHASE\_REFACTORIZATION [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_REFACTORIZATION "Link to this definition")

Numerical re-factorization.

Note: For now it is only used if the reordering algorithm is set to `CUDSS_ALG_1` or `CUDSS_ALG_2`. Otherwise, it is the same as FACTORIZATION phase.

enumeratorCUDSS\_PHASE\_SOLVE\_FWD\_PERM [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_SOLVE_FWD_PERM "Link to this definition")

Applying reordering permutation to the right hand side before the forward solve (forward substitution).

Note: solve sub-phases are not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` are used for reordering.

enumeratorCUDSS\_PHASE\_SOLVE\_FWD [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_SOLVE_FWD "Link to this definition")

Forward substitution sub-step of the solving phase.

Note: this phase includes the local permutation due to the partial pivoting.
To remove this effect, if undesired, one can use a combination of reordering and final permutation (see [`CUDSS_DATA_PERM_REORDER_ROW`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_REORDER_ROW "CUDSS_DATA_PERM_REORDER_ROW") and [`CUDSS_DATA_PERM_ROW`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_ROW "CUDSS_DATA_PERM_ROW")).

Note: solve sub-phases are not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` are used for reordering.

enumeratorCUDSS\_PHASE\_SOLVE\_DIAG [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssPhase_t.CUDSS_PHASE_SOLVE_DIAG "Link to this definition")

Diagonal solve sub-step of the solving phase (only needed for symmetric/Hermitian matrix types).

Note: solve sub-phases are not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` are used for reordering.

enumeratorCUDSS\_PHASE\_SOLVE\_BWD [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_SOLVE_BWD "Link to this definition")

Backward substitution sub-step of the solving phase.

Note: this phase includes the local permutation due to the partial pivoting.
To remove this effect, if undesired, one can use a combination of reordering and final permutation (see [`CUDSS_DATA_PERM_REORDER_ROW`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_REORDER_ROW "CUDSS_DATA_PERM_REORDER_ROW") and [`CUDSS_DATA_PERM_ROW`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_PERM_ROW "CUDSS_DATA_PERM_ROW")).

Note: solve sub-phases are not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` are used for reordering.

enumeratorCUDSS\_PHASE\_SOLVE\_BWD\_PERM [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssPhase_t.CUDSS_PHASE_SOLVE_BWD_PERM "Link to this definition")

Applying inverse reordering permutation to the intermediate solution after the backward (backward substitution).
If matching (and scaling) is enabled, this phase also includes applying the inverse matching permutation and inverse scaling (as the matching permutation and scalings were used to modify the matrix before the factorization).

Note: solve sub-phases are not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` are used for reordering.

enumeratorCUDSS\_PHASE\_SOLVE\_REFINEMENT [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssPhase_t.CUDSS_PHASE_SOLVE_REFINEMENT "Link to this definition")

Iterative refinement (see configuration settings CUDSS\_CONFIG\_IR\_N\_STEPS and CUDSS\_CONFIG\_IR\_TOL).

Note: solve sub-phases are not supported when `CUDSS_ALG_1` or `CUDSS_ALG_2` are used for reordering.

enumeratorCUDSS\_PHASE\_SOLVE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPhase_t.CUDSS_PHASE_SOLVE "Link to this definition")

Full solving phase, combining all of the above (forward permutation + forward solve + diagonal solve + backward permutation + backward solve) and (optional) iterative refinement.

Note: combining the solve sub-phases should be preferred to calling sub-phases separately.

Note: Changing the sparse matrix for this phase is allowed but with restrictions, see limitations for [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute").

### `cudssMatrixFormat_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssmatrixformat-t "Link to this heading")

enumcudssMatrixFormat\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixFormat_t "Link to this definition")

> The enumerator specifies the underlying matrix formats inside a cuDSS matrix object.

enumeratorCUDSS\_MFORMAT\_DENSE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixFormat_t.CUDSS_MFORMAT_DENSE "Link to this definition")

Matrix is dense (applied to a single matrix and a batch equally)

enumeratorCUDSS\_MFORMAT\_CSR [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixFormat_t.CUDSS_MFORMAT_CSR "Link to this definition")

Matrix is in CSR format (applies to a single matrix and a batch equally)

Note: Only 3-array CSR is supported.

enumeratorCUDSS\_MFORMAT\_BATCH [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixFormat_t.CUDSS_MFORMAT_BATCH "Link to this definition")

> Matrix object represents a batch of matrices

Note: The format flags can be combined. E.g., creating a `cudssMatrix_t`
via [`cudssMatrixCreateBatchCsr()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html#c.cudssMatrixCreateBatchCsr "cudssMatrixCreateBatchCsr") would set both
`CUDSS_MFORMAT_CSR` and `CUDSS_MFORMAT_BATCH` flags. One can check for a mixture of flags via bit-wise operations, e.g.
`CUDSS_MFORMAT_CSR | CUDSS_MFORMAT_BATCH` for a batch of CSR matrices.

* * *

### `cudssMatrixType_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssmatrixtype-t "Link to this heading")

enumcudssMatrixType\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixType_t "Link to this definition")

> The enumerator specifies available matrix types for sparse matrices.
> Matrix type should be used to describe the properties of the underlying matrix storage.
> Matrix type affects the decision about what type of factorization is computed by the solver.
> E.g, when matrix type is one of the positive-definite types, checks for singular values on the diagonal is not done.

enumeratorCUDSS\_MTYPE\_GENERAL [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixType_t.CUDSS_MTYPE_GENERAL "Link to this definition")

General matrix \[default\] `LDU` factorization will be computed with optional local or global pivoting

enumeratorCUDSS\_MTYPE\_SYMMETRIC [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixType_t.CUDSS_MTYPE_SYMMETRIC "Link to this definition")

Real symmetric matrix. `LDL^T` factorization will be computed with optional local pivoting

enumeratorCUDSS\_MTYPE\_HERMITIAN [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixType_t.CUDSS_MTYPE_HERMITIAN "Link to this definition")

Complex Hermitian matrix. `LDL^H` factorization will be computed with optional local pivoting

enumeratorCUDSS\_MTYPE\_SPD [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixType_t.CUDSS_MTYPE_SPD "Link to this definition")

Symmetric positive-definite matrix Cholesky factorization will be computed with optional local pivoting

Note: if the matrix passed with this matrix type appears to have zero minors (at least numerically), one can get the 1-based index of the first encountered non-positive minor by
calling [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") with [`CUDSS_DATA_INFO`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_INFO "CUDSS_DATA_INFO"). As this would be a device-side error, the call to `cudssExecute()` may still return `CUDSS_STATUS_SUCCESS`.

enumeratorCUDSS\_MTYPE\_HPD [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixType_t.CUDSS_MTYPE_HPD "Link to this definition")

Hermitian positive-definite matrix Complex Cholesky factorization will be computed with optional local pivoting

Note: if the matrix passed with this matrix type appears to have zero minors (at least numerically), one can get the 1-based index of the first non-positive minor by
calling [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") with [`CUDSS_DATA_INFO`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDataParam_t.CUDSS_DATA_INFO "CUDSS_DATA_INFO"). As this would be a device-side error, the call to `cudssExecute()` may still return `CUDSS_STATUS_SUCCESS`.

### `cudssMatrixViewType_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssmatrixviewtype-t "Link to this heading")

enumcudssMatrixViewType\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixViewType_t "Link to this definition")

> The enumerator specifies available matrix view types for sparse matrices. Matrix view defines how the matrix is treated by
> the main cuDSS routine [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute"). E.g., to provide only upper-triangle data for a symmetric matrix
> one can use as [`CUDSS_MTYPE_SYMMETRIC`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssMatrixType_t.CUDSS_MTYPE_SYMMETRIC "CUDSS_MTYPE_SYMMETRIC") as matrix type combined with [`CUDSS_MVIEW_UPPER`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixViewType_t.CUDSS_MVIEW_UPPER "CUDSS_MVIEW_UPPER") as the matrix view.
> If the accompanying matrix type is `CUDSS_MTYPE_GENERAL`, the matrix view is ignored.

enumeratorCUDSS\_MVIEW\_FULL [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssMatrixViewType_t.CUDSS_MVIEW_FULL "Link to this definition")

Full matrix \[default\]

enumeratorCUDSS\_MVIEW\_LOWER [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssMatrixViewType_t.CUDSS_MVIEW_LOWER "Link to this definition")

Lower-triangular matrix (including the diagonal). All values above the main diagonal will be ignored.

enumeratorCUDSS\_MVIEW\_UPPER [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssMatrixViewType_t.CUDSS_MVIEW_UPPER "Link to this definition")

Upper-triangular matrix (including the diagonal). All values below the main diagonal will be ignored.

### `cudssIndexBase_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssindexbase-t "Link to this heading")

enumcudssIndexBase\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssIndexBase_t "Link to this definition")

> The enumerator specifies indexing base (0 or 1) for sparse matrix indices (row start/end offsets and column indices).
> Once set for a sparse matrix, [`cudssExecute()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssExecute "cudssExecute")
> will use the indexing base from the input sparse matrix for all index-related data (e.g. output from
> [`cudssDataGet()`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/functions.html.md#c.cudssDataGet "cudssDataGet") called with `CUDSS_DATA_PERM_REORDER`).

enumeratorCUDSS\_BASE\_ZERO [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssIndexBase_t.CUDSS_BASE_ZERO "Link to this definition")

Zero-based indexing \[default\]

enumeratorCUDSS\_BASE\_ONE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssIndexBase_t.CUDSS_BASE_ONE "Link to this definition")

One-based indexing

### `cudssLayout_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudsslayout-t "Link to this heading")

enumcudssLayout\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssLayout_t "Link to this definition")

> The enumerator specifies dense matrix layout.

enumeratorCUDSS\_LAYOUT\_COL\_MAJOR [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssLayout_t.CUDSS_LAYOUT_COL_MAJOR "Link to this definition")

Column-major layout \[default\]

enumeratorCUDSS\_LAYOUT\_ROW\_MAJOR [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssLayout_t.CUDSS_LAYOUT_ROW_MAJOR "Link to this definition")

Row-major layout. Currently not supported.

### `cudssAlgType_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssalgtype-t "Link to this heading")

enumcudssAlgType\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t "Link to this definition")

> The enumerator specifies algorithm choices to be made for different solver settings like reordering,
>
> factorization and other algorithms.

enumeratorCUDSS\_ALG\_DEFAULT [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssAlgType_t.CUDSS_ALG_DEFAULT "Link to this definition")

Default value \[default\] Uses the default algorithm (decided by cuDSS).

enumeratorCUDSS\_ALG\_1 [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t.CUDSS_ALG_1 "Link to this definition")

First algorithm See the description of the specific configuration setting (algorithm for reordering, factorization, etc.)

enumeratorCUDSS\_ALG\_2 [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t.CUDSS_ALG_2 "Link to this definition")

Second algorithm See the description of the specific configuration setting (algorithm for reordering, factorization, etc.)

enumeratorCUDSS\_ALG\_3 [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssAlgType_t.CUDSS_ALG_3 "Link to this definition")

Third algorithm See the description of the specific configuration setting (algorithm for reordering, factorization, etc.)

enumeratorCUDSS\_ALG\_4 [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssAlgType_t.CUDSS_ALG_4 "Link to this definition")

Fourth algorithm See the description of the specific configuration setting (algorithm for reordering, factorization, etc.)

enumeratorCUDSS\_ALG\_5 [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssAlgType_t.CUDSS_ALG_5 "Link to this definition")

> Fifth algorithm See the description of the specific configuration setting (algorithm for reordering, factorization, etc.)

Different values represent different algorithms (for reordering, factorization, etc.) and can lead to significant differences in accuracy and performance.
It is currently recommended to use `CUDSS_ALG_DEFAULT` and only in case accuracy or performance are not sufficient, one can experiment with other values.

### `cudssPivotType_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudsspivottype-t "Link to this heading")

enumcudssPivotType\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPivotType_t "Link to this definition")

> The enumerator specifies type of pivoting to be performed.

enumeratorCUDSS\_PIVOT\_COL [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssPivotType_t.CUDSS_PIVOT_COL "Link to this definition")

Column-based pivoting \[default\]

enumeratorCUDSS\_PIVOT\_ROW [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPivotType_t.CUDSS_PIVOT_ROW "Link to this definition")

Row-based pivoting

enumeratorCUDSS\_PIVOT\_NONE [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssPivotType_t.CUDSS_PIVOT_NONE "Link to this definition")

No pivoting

## Communication Layer (Distributed Interface) Types [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#communication-layer-distributed-interface-types "Link to this heading")

### `cudssDistributedInterface_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssdistributedinterface-t "Link to this heading")

structcudssDistributedInterface\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t "Link to this definition")

> This struct defines all communication primitives which need to be implemented
>
> in (any) implementation of cuDSS communication layer, see for more details
>
> [communication layer](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-commlayer-label) and [MGMN mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mgmn-mode-label).
>
> Note: all communication layer API functions below take an argument of type `void *` for `comm`.
>
> This parameter should be interpreted in the implementation based on the underlying communication
>
> backend to be used with the particular communication layer. E.g., for OpenMPI, `comm` should be
>
> treated as the OpenMPI communicator.
>
> Note: most of the APIs below take an argument called `stream` of type
>
> `cudaStream_t` and must be stream-ordered. For GPU-aware communication backends like OpenMPI,
>
> this implies the need to do explicit `cudaStreamSynchronize()` in the communication layer implementation.

intcudssCommRank( _void\*comm_, _int\*rank_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssCommRank "Link to this definition")

A function pointer to a routine which returns the rank of the process in a communicator.

Param comm:

\[in\] A pointer to the communicator.

Param rank:

\[out\] Rank of the calling process in the communicator.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssCommSize( _void\*comm_, _int\*size_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssCommSize "Link to this definition")

A function pointer to a routine which returns number of processes in a communicator.

Param comm:

\[in\] A pointer to the communicator.

Param size:

\[out\] Number of processes in the communicator.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssSend(_constvoid\*buffer_,_intcount_,_cudaDataType\_tdatatype_,_intdest_,_inttag_,_void\*comm_,_cudaStream\_tstream_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssSend "Link to this definition")

A function pointer to a routine which performs a blocking send.

Param buffer:

\[in\] Initial address of the send device buffer.

Param count:

\[in\] Number of elements (of type `datatype`) to be sent.

Param datatype:

\[in\] CUDA datatype of elements to be sent.

Param dest:

\[in\] Rank of the receiving process (destination).

Param tag:

\[in\] Message tag.

Param comm:

\[in\] A pointer to the communicator.

Param stream:

\[in\] CUDA stream.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssRecv(_void\*buffer_,_intcount_,_cudaDataType\_tdatatype_,_intsource_,_inttag_,_void\*comm_,_cudaStream\_tstream_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssRecv "Link to this definition")

A function pointer to a routine which performs a blocking receive for a message.

Param buffer:

\[out\] Initial address of the receive device buffer.

Param count:

\[in\] Number of elements (of type `datatype`) to be received.

Param datatype:

\[in\] CUDA datatype of elements to be received.

Param source:

\[in\] Rank of the sending process (source).

Param tag:

\[in\] Message tag.

Param comm:

\[in\] A pointer to the communicator.

Param stream:

\[in\] CUDA stream.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssBcast(_void\*buffer_,_intcount_,_cudaDataType\_tdatatype_,_introot_,_void\*comm_,_cudaStream\_tstream_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssBcast "Link to this definition")

A function pointer to a routine which performs a broadcast for a message from the `root` process

to all other processes of the communicator.

Param buffer:

\[in\] Number of elements (of type `datatype`) to be received.

Param datatype:

\[in\] CUDA datatype of elements to be received.

Param root:

\[in\] Rank of the sending process (source).

Param comm:

\[in\] A pointer to the communicator.

Param stream:

\[in\] CUDA stream.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssReduce(_constvoid\*sendbuf_,_void\*recvbuf_,_intcount_,_cudaDataType\_tdatatype_,_[cudssOpType\_t](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssOpType_t "cudssOpType_t") op_,_introot_,_void\*comm_,_cudaStream\_tstream_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssReduce "Link to this definition")

Param sendbuf:

\[in\] CUDA datatype of elements to be sent.

Param recvbuf:

\[in\] Rank of the receiving process (destination).

Param count:

\[in\] Number of elements (of type `datatype`) to be received.

Param datatype:

\[in\] CUDA datatype of elements to be received.

Param op:

\[in\] Type of the reduction operation to be performed, see [`cudssOpType_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssOpType_t "cudssOpType_t") for supported values.

Param root:

\[in\] Rank of the root process (source).

Param comm:

\[in\] A pointer to the communicator.

Param stream:

\[in\] CUDA stream.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssAllreduce(_constvoid\*sendbuf_,_void\*recvbuf_,_intcount_,_cudaDataType\_tdatatype_,_[cudssOpType\_t](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssOpType_t "cudssOpType_t") op_,_void\*comm_,_cudaStream\_tstream_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssAllreduce "Link to this definition")

A function pointer to a routine which performs a reduction of values on all processes to a single value and

distributes the result back to all processes.

Param sendbuf:

\[in\] Address of the send buffer.

Param recvbuf:

\[out\] Address of the receive buffer.

Param count:

\[in\] Number of elements (of type `datatype`) to be received.

Param datatype:

\[in\] CUDA datatype of elements to be received.

Param op:

\[in\] Type of the reduction operation to be performed, see [`cudssOpType_t`](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssOpType_t "cudssOpType_t") for supported values.

Param comm:

\[in\] A pointer to the communicator.

Param stream:

\[in\] CUDA stream.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssScatterv(_constvoid\*sendbuf_,_constint\*sendcounts_,_constint\*displs_,_cudaDataType\_tsendtype_,_void\*recvbuf_,_intrecvcount_,_cudaDataType\_trecvtype_,_introot_,_void\*comm_,_cudaStream\_tstream_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssScatterv "Link to this definition")

A function pointer to a routine which performs a scatter operation on a buffer in parts to all processes in a communicator.

Param sendbuf:

\[in\] Address of the send buffer.

Param sendcounts:

\[in\] Non-negative integer array (of length communicator size) specifying the number of elements to send to each rank.

Param displs:

\[in\] An array of integers of length communicator size. Entry i specifies the displacement (relative to `sendbuf`) from which to take the outgoing data to process i.

Param sendtype:

\[in\] CUDA datatype of elements to be sent.

Param recvbuf:

\[out\] Address of the receive buffer.

Param recvcount:

\[in\] Number of elements in receive buffer (non-negative integer).

Param recvtype:

\[in\] CUDA datatype of elements to be received.

Param root:

\[in\] Rank of the sending process (source).

Param comm:

\[in\] A pointer to the communicator.

Param stream:

\[in\] CUDA stream.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssCommSplit(_constvoid\*comm_,_intcolor_,_intkey_,_void\*new\_comm_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssCommSplit "Link to this definition")

A function pointer to a routine which creates new communicators based on colors and keys.

Param comm:

\[in\] A pointer to the communicator to be split.

Param color:

\[in\] Control of the subset assignment. Processes with the same color are grouped together.

Param key:

\[in\] Control of the rank assignment. Processes in the new communicator are ordered based on the keys.

Param new\_comm:

\[out\] A pointer to the new communicator defined w.r.t to colors.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

intcudssCommFree( _void\*comm_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssDistributedInterface_t.cudssCommFree "Link to this definition")

A function pointer to a routine which deallocates resources of a communicator.

Param comm:

\[in\] A pointer to the communicator to be freed.

Returns:

\[out\] The error status (as `int`) of the invocation. Must return 0 on success and any nonzero integer otherwise.

### `cudssOpType_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssoptype-t "Link to this heading")

enumcudssOpType\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssOpType_t "Link to this definition")

> The enumerator specifies reduction operation to be used when calling
>
> communication layer APIs `cudssReduce()` or `cudssAllreduce()`.

enumeratorCUDSS\_SUM [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssOpType_t.CUDSS_SUM "Link to this definition")

Reduced elements are added together.

enumeratorCUDSS\_MAX [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssOpType_t.CUDSS_MAX "Link to this definition")

Maximum element is found among the reduced elements.

enumeratorCUDSS\_MIN [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssOpType_t.CUDSS_MIN "Link to this definition")

Minimum element is found among the reduced elements.

## Threading Layer Types [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#threading-layer-types "Link to this heading")

### `cudssThreadingInterface_t` [\#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html\#cudssthreadinginterface-t "Link to this heading")

structcudssThreadingInterface\_t [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssThreadingInterface_t "Link to this definition")

> This struct defines all threading primitives which need to be implemented
>
> in (any) implementation of cuDSS threading layer, see for more details
>
> [threading layer](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html#mt-mtlayer-label) and [MT mode](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/advanced_features.html.md#mt-mode-label).

intcudssGetMaxThreads() [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssThreadingInterface_t.cudssGetMaxThreads "Link to this definition")

A function pointer to a routine which returns the maximum number of threads on the CPU
that can be used by cuDSS for parallel execution.

Returns:

\[out\] The maximum number of threads on the CPU that can be used by cuDSS for parallel execution.

voidcudssParallelFor(_intnthr\_requested_,_intntasks_,_void\*ctx_,_[cudss\_thr\_func\_t](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssThreadingInterface_t.cudss_thr_func_t "cudss_thr_func_t") f_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html#c.cudssThreadingInterface_t.cudssParallelFor "Link to this definition")

A function pointer to a routine which opens a `parallel for` section with the requested number of
threads and call cudss\_thr\_func\_t (see `cudss_threading_interface.h` for details) `f` in
the for loop with ntasks number of iterations.

Param nthr\_requested:

\[in\] Requested number of threads for the parallel section.

Param ntasks:

\[in\] Number of tasks in the parallel for loop.

Param ctx:

\[in\] A pointer to the input data for cudss\_thr\_func\_t `f`

which defines parallel units of work, also called tasks:

voidcudss\_thr\_func\_t( _inttask_, _void\*ctx_) [#](https://docs.nvidia.com/cuda/archive/13.1.1/cudss/doc_output/types.html.md#c.cudssThreadingInterface_t.cudss_thr_func_t "Link to this definition")

Parameters:

- **task** – \[in\] The task number (or iteration count of the parallel loop).

- **ctx** – \[in\] A pointer to the input data.