NVIDIA Performance Primitives (NPP)  Version 9.2
nppdefs.h
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48 #ifndef NV_NPPIDEFS_H
49 #define NV_NPPIDEFS_H
50 
51 #include <stdlib.h>
52 #include <host_defines.h>
53 
60 #ifdef __cplusplus
61 extern "C" {
62 #endif
63 
64  // If this is a 32-bit Windows compile, don't align to 16-byte at all
65  // and use a "union-trick" to create 8-byte alignment.
66 #if defined(_WIN32) && !defined(_WIN64)
67 
68  // On 32-bit Windows platforms, do not force 8-byte alignment.
69  // This is a consequence of a limitation of that platform.
70  #define NPP_ALIGN_8
71  // On 32-bit Windows platforms, do not force 16-byte alignment.
72  // This is a consequence of a limitation of that platform.
73  #define NPP_ALIGN_16
74 
75 #else /* _WIN32 && !_WIN64 */
76 
77  #define NPP_ALIGN_8 __align__(8)
78  #define NPP_ALIGN_16 __align__(16)
79 
80 #endif /* !__CUDACC__ && _WIN32 && !_WIN64 */
81 
82 
90 typedef enum
91 {
102  NPPI_SMOOTH_EDGE = (1 << 31)
104 
108 typedef enum
109 {
115 
119 typedef enum
120 {
123  NPP_MASK_SIZE_3_X_1 = 100, // leaving space for more 1 X N type enum values
125  NPP_MASK_SIZE_3_X_3 = 200, // leaving space for more N X 1 type enum values
132 } NppiMaskSize;
133 
138 typedef enum
139 {
143 
152 typedef enum
153 {
154  /* negative return-codes indicate errors */
156 
170 
220  NPP_ERROR = -2,
222 
223  /* success */
227  /* positive return-codes indicate warnings */
237 } NppStatus;
238 
239 typedef enum
240 {
243  NPP_CUDA_1_0 = 100,
244  NPP_CUDA_1_1 = 110,
245  NPP_CUDA_1_2 = 120,
246  NPP_CUDA_1_3 = 130,
247  NPP_CUDA_2_0 = 200,
248  NPP_CUDA_2_1 = 210,
249  NPP_CUDA_3_0 = 300,
250  NPP_CUDA_3_2 = 320,
251  NPP_CUDA_3_5 = 350,
252  NPP_CUDA_3_7 = 370,
253  NPP_CUDA_5_0 = 500,
254  NPP_CUDA_5_2 = 520,
255  NPP_CUDA_5_3 = 530,
256  NPP_CUDA_6_0 = 600,
257  NPP_CUDA_6_1 = 610,
258  NPP_CUDA_6_2 = 620,
259  NPP_CUDA_6_3 = 630,
260  NPP_CUDA_7_0 = 700,
263 
264 typedef struct
265 {
266  int major;
267  int minor;
268  int build;
270 
276 typedef unsigned char Npp8u;
277 typedef signed char Npp8s;
278 typedef unsigned short Npp16u;
279 typedef short Npp16s;
280 typedef unsigned int Npp32u;
281 typedef int Npp32s;
282 typedef unsigned long long Npp64u;
283 typedef long long Npp64s;
284 typedef float Npp32f;
285 typedef double Npp64f;
292 typedef struct __align__(2)
293 {
294  Npp8u re;
295  Npp8u im;
297 
302 typedef struct __align__(4)
303 {
304  Npp16u re;
305  Npp16u im;
307 
312 typedef struct __align__(4)
313 {
314  Npp16s re;
315  Npp16s im;
317 
322 typedef struct NPP_ALIGN_8
323 {
324  Npp32u re;
325  Npp32u im;
326 } Npp32uc;
327 
332 typedef struct NPP_ALIGN_8
333 {
334  Npp32s re;
335  Npp32s im;
336 } Npp32sc;
337 
342 typedef struct NPP_ALIGN_8
343 {
344  Npp32f re;
345  Npp32f im;
346 } Npp32fc;
347 
352 typedef struct NPP_ALIGN_16
353 {
354  Npp64s re;
355  Npp64s im;
356 } Npp64sc;
357 
362 typedef struct NPP_ALIGN_16
363 {
364  Npp64f re;
365  Npp64f im;
366 } Npp64fc;
367 
370 #define NPP_MIN_8U ( 0 )
371 #define NPP_MAX_8U ( 255 )
372 #define NPP_MIN_16U ( 0 )
373 #define NPP_MAX_16U ( 65535 )
374 #define NPP_MIN_32U ( 0 )
375 #define NPP_MAX_32U ( 4294967295U )
376 #define NPP_MIN_64U ( 0 )
377 #define NPP_MAX_64U ( 18446744073709551615ULL )
379 #define NPP_MIN_8S (-127 - 1 )
380 #define NPP_MAX_8S ( 127 )
381 #define NPP_MIN_16S (-32767 - 1 )
382 #define NPP_MAX_16S ( 32767 )
383 #define NPP_MIN_32S (-2147483647 - 1 )
384 #define NPP_MAX_32S ( 2147483647 )
385 #define NPP_MAX_64S ( 9223372036854775807LL )
386 #define NPP_MIN_64S (-9223372036854775807LL - 1)
388 #define NPP_MINABS_32F ( 1.175494351e-38f )
389 #define NPP_MAXABS_32F ( 3.402823466e+38f )
390 #define NPP_MINABS_64F ( 2.2250738585072014e-308 )
391 #define NPP_MAXABS_64F ( 1.7976931348623158e+308 )
397 typedef struct
398 {
399  int x;
400  int y;
401 } NppiPoint;
402 
406 typedef struct {
407  Npp32f rho;
408  Npp32f theta;
409 } NppPointPolar;
410 
416 typedef struct
417 {
418  int width;
419  int height;
420 } NppiSize;
421 
429 typedef struct
430 {
431  int x;
432  int y;
433  int width;
434  int height;
435 } NppiRect;
436 
437 typedef enum
438 {
442 } NppiAxis;
443 
444 typedef enum
445 {
451 } NppCmpOp;
452 
466 typedef enum
467 {
480 
491 
501 
502  /*
503  * Other rounding modes supported by IEEE-754 (2008) floating-point standard:
504  *
505  * - NPP_ROUND_TOWARD_INFINITY // ceiling
506  * - NPP_ROUND_TOWARD_NEGATIVE_INFINITY // floor
507  *
508  */
509 } NppRoundMode;
510 
511 typedef enum
512 {
520 
521 
522 typedef enum {
527 
528 /*
529  * Alpha composition controls.
530  */
531 
532 typedef enum {
546 } NppiAlphaOp;
547 
548 
553 typedef struct
554 {
555  int cellSize;
559 } NppiHOGConfig;
560 
561 #define NPP_HOG_MAX_CELL_SIZE (16)
562 #define NPP_HOG_MAX_BLOCK_SIZE (64)
563 #define NPP_HOG_MAX_BINS_PER_CELL (16)
564 #define NPP_HOG_MAX_CELLS_PER_DESCRIPTOR (256)
565 #define NPP_HOG_MAX_OVERLAPPING_BLOCKS_PER_DESCRIPTOR (256)
566 #define NPP_HOG_MAX_DESCRIPTOR_LOCATIONS_PER_CALL (128)
568 typedef struct
569 {
571  Npp32s * classifiers;
574  Npp32s * counterDevice;
576 
577 typedef struct
578 {
580  Npp32s * haarBuffer;
583 
584 typedef enum {
588 } NppsZCType;
589 
590 typedef enum {
594 
595 typedef enum {
599 } NppiNorm;
600 
601 
602 #ifdef __cplusplus
603 } /* extern "C" */
604 #endif
605 
608 #endif /* NV_NPPIDEFS_H */
NppGpuComputeCapability
Definition: nppdefs.h:239
Definition: nppdefs.h:448
Definition: nppdefs.h:541
Definition: nppdefs.h:204
Definition: nppdefs.h:210
Definition: nppdefs.h:162
Speed reduction due to uncoalesced memory accesses warning.
Definition: nppdefs.h:235
Channel of interest is not 1, 2, or 3.
Definition: nppdefs.h:190
NppiMaskSize
Fixed filter-kernel sizes.
Definition: nppdefs.h:119
Indicates that CUDA 7.0 capable device is machine&#39;s default device.
Definition: nppdefs.h:260
Npp32f re
Real part.
Definition: nppdefs.h:344
Indicates that CUDA 6.1 capable device is machine&#39;s default device.
Definition: nppdefs.h:257
Image pixels are constant for quality index.
Definition: nppdefs.h:173
Definition: nppdefs.h:518
Definition: nppdefs.h:131
Npp32u im
Imaginary part.
Definition: nppdefs.h:325
struct NPP_ALIGN_8 Npp32uc
Complex Number This struct represents an unsigned int complex number.
int height
Rectangle height.
Definition: nppdefs.h:419
Round to the nearest even integer.
Definition: nppdefs.h:478
Definition: nppdefs.h:128
int haarBufferSize
size of the buffer
Definition: nppdefs.h:579
Definition: nppdefs.h:440
Indicates that CUDA 1.2 capable device is machine&#39;s default device.
Definition: nppdefs.h:245
unsigned char Npp8u
8-bit unsigned chars
Definition: nppdefs.h:276
Definition: nppdefs.h:122
Definition: nppdefs.h:163
Definition: nppdefs.h:217
Definition: nppdefs.h:212
Definition: nppdefs.h:169
struct __align__(2)
Complex Number This struct represents an unsigned char complex number.
Definition: nppdefs.h:292
Complex Number This struct represents an unsigned int complex number.
Definition: nppdefs.h:322
Definition: nppdefs.h:517
int y
y-coordinate of upper left corner (lowest memory address).
Definition: nppdefs.h:432
sum
Definition: nppdefs.h:597
Npp64f re
Real part.
Definition: nppdefs.h:364
Definition: nppdefs.h:167
Definition: nppdefs.h:126
Definition: nppdefs.h:127
Indicates that CUDA 5.2 capable device is machine&#39;s default device.
Definition: nppdefs.h:254
Definition: nppdefs.h:524
int y
y-coordinate.
Definition: nppdefs.h:400
Indicates that CUDA 1.1 capable device is machine&#39;s default device.
Definition: nppdefs.h:244
NppiAxis
Definition: nppdefs.h:437
Definition: nppdefs.h:221
Definition: nppdefs.h:161
Definition: nppdefs.h:166
Definition: nppdefs.h:201
The given ROI has no interestion with either the source or destination ROI.
Definition: nppdefs.h:231
NppiBayerGridPosition
Bayer Grid Position Registration.
Definition: nppdefs.h:108
Npp64s re
Real part.
Definition: nppdefs.h:354
NppiSize detectionWindowSize
detection window size (pixels).
Definition: nppdefs.h:558
Definition: nppdefs.h:168
sign change XOR
Definition: nppdefs.h:586
AC Table.
Definition: nppdefs.h:592
NppStatus
Error Status Codes.
Definition: nppdefs.h:152
Definition: nppdefs.h:209
Bad or unsupported number of channels.
Definition: nppdefs.h:189
Npp8uc
Definition: nppdefs.h:296
Image size isn&#39;t multiple of two.
Definition: nppdefs.h:233
Definition: nppdefs.h:441
Definition: nppdefs.h:543
Definition: nppdefs.h:577
Indicates that CUDA 6.2 capable device is machine&#39;s default device.
Definition: nppdefs.h:258
Npp32f theta
Definition: nppdefs.h:408
Definition: nppdefs.h:92
Definition: nppdefs.h:544
Npp32u re
Real part.
Definition: nppdefs.h:324
Wrong order of the destination channels.
Definition: nppdefs.h:183
Complex Number This struct represents a long long complex number.
Definition: nppdefs.h:352
Npp32s * haarBuffer
buffer
Definition: nppdefs.h:580
Indicates that CUDA 3.5 capable device is machine&#39;s default device.
Definition: nppdefs.h:251
sign change count_0
Definition: nppdefs.h:587
Definition: nppdefs.h:439
Npp64s im
Imaginary part.
Definition: nppdefs.h:355
Npp32s re
Real part.
Definition: nppdefs.h:334
Definition: nppdefs.h:215
Step value is not pixel multiple.
Definition: nppdefs.h:178
Linear interpolation.
Definition: nppdefs.h:94
2D Size This struct typically represents the size of a a rectangular region in two space...
Definition: nppdefs.h:416
NppCmpOp
Definition: nppdefs.h:444
Definition: nppdefs.h:523
Definition: nppdefs.h:121
Npp64f im
Imaginary part.
Definition: nppdefs.h:365
Definition: nppdefs.h:203
Definition: nppdefs.h:513
Definition: nppdefs.h:542
Round towards zero (truncation).
Definition: nppdefs.h:499
square root of sum of squares
Definition: nppdefs.h:598
Size of the rectangle region is less than or equal to 1.
Definition: nppdefs.h:186
Definition: nppdefs.h:534
Processed data is corrupted.
Definition: nppdefs.h:182
int x
x-coordinate.
Definition: nppdefs.h:399
Definition: nppdefs.h:446
Indicates that CUDA 5.0 capable device is machine&#39;s default device.
Definition: nppdefs.h:253
Definition: nppdefs.h:218
Definition: nppdefs.h:125
struct NPP_ALIGN_16 Npp64sc
Complex Number This struct represents a long long complex number.
Number of levels for LUT is less than 2.
Definition: nppdefs.h:180
int width
Rectangle width.
Definition: nppdefs.h:418
int build
Build number.
Definition: nppdefs.h:268
int x
x-coordinate of upper left corner (lowest memory address).
Definition: nppdefs.h:431
Definition: nppdefs.h:514
Definition: nppdefs.h:124
Definition: nppdefs.h:516
Definition: nppdefs.h:216
struct NPP_ALIGN_16 Npp64fc
Complex Number This struct represents a double floating-point complex number.
struct NPP_ALIGN_8 Npp32sc
Complex Number This struct represents a signed int complex number.
Indicates that CUDA 2.1 capable device is machine&#39;s default device.
Definition: nppdefs.h:248
long long Npp64s
64-bit signed integers
Definition: nppdefs.h:283
Definition: nppdefs.h:537
int cellSize
square cell size (pixels).
Definition: nppdefs.h:555
Definition: nppdefs.h:200
Definition: nppdefs.h:202
int major
Major version number.
Definition: nppdefs.h:266
Definition: nppdefs.h:540
int Npp32s
32-bit signed integers
Definition: nppdefs.h:281
sign change
Definition: nppdefs.h:585
Definition: nppdefs.h:545
Definition: nppdefs.h:525
Lower bound is larger than upper bound.
Definition: nppdefs.h:197
int minor
Minor version number.
Definition: nppdefs.h:267
NppiInterpolationMode
Filtering methods.
Definition: nppdefs.h:90
Divisor is zero however does not terminate the execution.
Definition: nppdefs.h:229
Round according to financial rule.
Definition: nppdefs.h:489
The given quadrangle has no intersection with either the source or destination ROI.
Definition: nppdefs.h:232
Unallowable values of the transformation coefficients.
Definition: nppdefs.h:187
Alias name for NPP_RND_ZERO.
Definition: nppdefs.h:500
Definition: nppdefs.h:214
2D Rectangle This struct contains position and size information of a rectangle in two space...
Definition: nppdefs.h:429
DC Table.
Definition: nppdefs.h:591
Indicates that CUDA 7.2 or better is machine&#39;s default device.
Definition: nppdefs.h:261
NppiSize classifierSize
Definition: nppdefs.h:573
Error free operation.
Definition: nppdefs.h:224
Indicates that no CUDA capable device was found.
Definition: nppdefs.h:242
Npp16uc
Definition: nppdefs.h:306
Super sampling.
Definition: nppdefs.h:99
Stride is less than the row length.
Definition: nppdefs.h:194
int width
Rectangle width.
Definition: nppdefs.h:433
Definition: nppdefs.h:213
Npp16sc
Definition: nppdefs.h:316
Indicates that CUDA 3.0 capable device is machine&#39;s default device.
Definition: nppdefs.h:249
Number overflows the upper or lower limit of the data type.
Definition: nppdefs.h:177
unsigned short Npp16u
16-bit unsigned integers
Definition: nppdefs.h:278
NppiNorm
Definition: nppdefs.h:595
Indicates that CUDA 1.3 capable device is machine&#39;s default device.
Definition: nppdefs.h:246
Alias name for NPP_RND_NEAR.
Definition: nppdefs.h:479
NppRoundMode
Rounding Modes.
Definition: nppdefs.h:466
size_t classifierStep
Definition: nppdefs.h:572
Indicates that the compute-capability query failed.
Definition: nppdefs.h:241
Definition: nppdefs.h:535
Npp32s * counterDevice
Definition: nppdefs.h:574
int histogramBlockSize
square histogram block size (pixels).
Definition: nppdefs.h:556
Indicates that CUDA 3.7 capable device is machine&#39;s default device.
Definition: nppdefs.h:252
Indicates that CUDA 6.3 capable device is machine&#39;s default device.
Definition: nppdefs.h:259
Definition: nppdefs.h:158
Npp32s * classifiers
packed classifier data 40 bytes each
Definition: nppdefs.h:571
Definition: nppdefs.h:536
Definition: nppdefs.h:207
Definition: nppdefs.h:533
Definition: nppdefs.h:112
NppiHuffmanTableType
Definition: nppdefs.h:590
short Npp16s
16-bit signed integers
Definition: nppdefs.h:279
Definition: nppdefs.h:111
unsigned int Npp32u
32-bit unsigned integers
Definition: nppdefs.h:280
Anchor point is outside mask.
Definition: nppdefs.h:196
Definition: nppdefs.h:205
signed char Npp8s
8-bit signed chars
Definition: nppdefs.h:277
Definition: nppdefs.h:206
unsigned long long Npp64u
64-bit unsigned integers
Definition: nppdefs.h:282
Nearest neighbor filtering.
Definition: nppdefs.h:93
Definition: nppdefs.h:130
Smooth edge filtering.
Definition: nppdefs.h:102
Alias name for NPP_RND_FINANCIAL.
Definition: nppdefs.h:490
Illegal channel index.
Definition: nppdefs.h:193
Default registration position.
Definition: nppdefs.h:110
double Npp64f
64-bit floating-point numbers
Definition: nppdefs.h:285
ZeroCrossing mode not supported.
Definition: nppdefs.h:160
Unsupported round mode.
Definition: nppdefs.h:171
Indicates that CUDA 6.0 capable device is machine&#39;s default device.
Definition: nppdefs.h:256
Indicates that CUDA 2.0 capable device is machine&#39;s default device.
Definition: nppdefs.h:247
Indicates that no operation was performed.
Definition: nppdefs.h:228
The NppiHOGConfig structure defines the configuration parameters for the HOG descriptor: ...
Definition: nppdefs.h:553
int numClassifiers
number of classifiers
Definition: nppdefs.h:570
2D Polar Point
Definition: nppdefs.h:406
int nHistogramBins
required number of histogram bins.
Definition: nppdefs.h:557
Two-parameter cubic filter (B=1/2, C=3/10)
Definition: nppdefs.h:98
Indicates that the quadrangle passed to one of affine warping functions doesn&#39;t have necessary proper...
Definition: nppdefs.h:230
NppsZCType
Definition: nppdefs.h:584
Step is less or equal zero.
Definition: nppdefs.h:208
NppiBorderType
Definition: nppdefs.h:511
One of the output image dimensions is less than 1 pixel.
Definition: nppdefs.h:175
float Npp32f
32-bit (IEEE) floating-point numbers
Definition: nppdefs.h:284
maximum
Definition: nppdefs.h:596
Npp32f rho
Definition: nppdefs.h:407
Indicates that CUDA 5.3 capable device is machine&#39;s default device.
Definition: nppdefs.h:255
Definition: nppdefs.h:447
Definition: nppdefs.h:123
Indicates that CUDA 1.0 capable device is machine&#39;s default device.
Definition: nppdefs.h:243
Definition: nppdefs.h:211
Definition: nppdefs.h:449
Definition: nppdefs.h:538
Definition: nppdefs.h:157
Definition: nppdefs.h:164
NppiAlphaOp
Definition: nppdefs.h:532
Definition: nppdefs.h:515
Divisor is equal to zero.
Definition: nppdefs.h:191
All values of the mask are zero.
Definition: nppdefs.h:184
Definition: nppdefs.h:568
Definition: nppdefs.h:155
Indicates that CUDA 3.2 capable device is machine&#39;s default device.
Definition: nppdefs.h:250
NppHintAlgorithm
Definition: nppdefs.h:522
Definition: nppdefs.h:450
Definition: nppdefs.h:159
Generic Lanczos filtering with order 3.
Definition: nppdefs.h:101
Definition: nppdefs.h:113
Definition: nppdefs.h:199
Definition: nppdefs.h:141
Cubic interpolation.
Definition: nppdefs.h:95
2D Point
Definition: nppdefs.h:397
Two-parameter cubic filter (B=0, C=1/2)
Definition: nppdefs.h:97
Definition: nppdefs.h:165
struct NPP_ALIGN_8 Npp32fc
Complex Number This struct represents a single floating-point complex number.
Definition: nppdefs.h:539
Definition: nppdefs.h:219
Lanczos filtering.
Definition: nppdefs.h:100
The quadrangle is nonconvex or degenerates into triangle, line or point.
Definition: nppdefs.h:185
Successful operation (same as NPP_NO_ERROR)
Definition: nppdefs.h:225
Npp32f im
Imaginary part.
Definition: nppdefs.h:345
Definition: nppdefs.h:140
Number of levels for histogram is less than 2.
Definition: nppdefs.h:179
Definition: nppdefs.h:220
Two-parameter cubic filter (B=1, C=0)
Definition: nppdefs.h:96
Definition: nppdefs.h:264
Npp32s im
Imaginary part.
Definition: nppdefs.h:335
Definition: nppdefs.h:129
NppiDifferentialKernel
Differential Filter types.
Definition: nppdefs.h:138
int height
Rectangle height.
Definition: nppdefs.h:434