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Field Value Enums#

Macros#

NVML_C2C_POWER_STATE_FULL_POWER
NVML_C2C_POWER_STATE_LOW_POWER
NVML_FI_DEV_ACTIVE_BANK_REMAPPINGS: Number of active bank remappings.
NVML_FI_DEV_BANK_REMAPPER_HISTOGRAM_MAX: Number of groups with full bank remap availability.
NVML_FI_DEV_BANK_REMAPPER_HISTOGRAM_NONE: Number of groups with no spare bankremap availability.
NVML_FI_DEV_C2C_LINK_COUNT: Number of C2C Links present on the device.
NVML_FI_DEV_C2C_LINK_ERROR_INTR: C2C Link CRC Error Counter.
NVML_FI_DEV_C2C_LINK_ERROR_REPLAY: C2C Link Replay Error Counter.
NVML_FI_DEV_C2C_LINK_ERROR_REPLAY_B2B: C2C Link Back to Back Replay Error Counter.
NVML_FI_DEV_C2C_LINK_GET_MAX_BW: C2C Link Speed in MBps for active links.
NVML_FI_DEV_C2C_LINK_GET_STATUS: C2C Link Status 0=INACTIVE 1=ACTIVE.
NVML_FI_DEV_C2C_LINK_POWER_STATE: C2C Link Power state. See NVML_C2C_POWER_STATE_*.
NVML_FI_DEV_CLOCKS_EVENT_REASON_HW_POWER_BRAKE_SLOWDOWN: Throttling due to external power brake assertion trigger (reducing core clocks by a factor of 2 or more) in ns.
NVML_FI_DEV_CLOCKS_EVENT_REASON_HW_THERM_SLOWDOWN: Throttling due to temperature being too high (reducing core clocks by a factor of 2 or more) in ns.
NVML_FI_DEV_CLOCKS_EVENT_REASON_SW_POWER_CAP: Field values for Clock Throttle Reason Counters All counters are in nanoseconds.
NVML_FI_DEV_CLOCKS_EVENT_REASON_SW_THERM_SLOWDOWN: Throttling to ensure ((GPU temp < GPU Max Operating Temp) && (Memory Temp < Memory Max Operating Temp)) in ns.
NVML_FI_DEV_CLOCKS_EVENT_REASON_SYNC_BOOST: Throttling to match minimum possible clock across Sync Boost Group in ns.
NVML_FI_DEV_DRAIN_AND_RESET_STATUS: Deprecated, do not use (use NVML_FI_DEV_GET_GPU_RECOVERY_ACTION instead)
NVML_FI_DEV_ECC_CURRENT: Field Identifiers.
NVML_FI_DEV_ECC_DBE_AGG_CBU: CBU double bit aggregate ECC errors.
NVML_FI_DEV_ECC_DBE_AGG_DEV: Device memory double bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_DBE_AGG_L1: L1 cache double bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_DBE_AGG_L2: L2 cache double bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_DBE_AGG_REG: Register File double bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_DBE_AGG_TEX: Texture memory double bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_DBE_AGG_TOTAL: Total double bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_DBE_VOL_CBU: CBU double bit volatile ECC errors.
NVML_FI_DEV_ECC_DBE_VOL_DEV: Device memory double bit volatile ECC errors.
NVML_FI_DEV_ECC_DBE_VOL_L1: L1 cache double bit volatile ECC errors.
NVML_FI_DEV_ECC_DBE_VOL_L2: L2 cache double bit volatile ECC errors.
NVML_FI_DEV_ECC_DBE_VOL_REG: Register file double bit volatile ECC errors.
NVML_FI_DEV_ECC_DBE_VOL_TEX: Texture memory double bit volatile ECC errors.
NVML_FI_DEV_ECC_DBE_VOL_TOTAL: Total double bit volatile ECC errors.
NVML_FI_DEV_ECC_PENDING: Pending ECC mode. 1=Active. 0=Inactive.
NVML_FI_DEV_ECC_SBE_AGG_DEV: Device memory single bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_SBE_AGG_L1: L1 cache single bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_SBE_AGG_L2: L2 cache single bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_SBE_AGG_REG: Register File single bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_SBE_AGG_TEX: Texture memory single bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_SBE_AGG_TOTAL: Total single bit aggregate (persistent) ECC errors.
NVML_FI_DEV_ECC_SBE_VOL_DEV: Device memory single bit volatile ECC errors.
NVML_FI_DEV_ECC_SBE_VOL_L1: L1 cache single bit volatile ECC errors.
NVML_FI_DEV_ECC_SBE_VOL_L2: L2 cache single bit volatile ECC errors.
NVML_FI_DEV_ECC_SBE_VOL_REG: Register file single bit volatile ECC errors.
NVML_FI_DEV_ECC_SBE_VOL_TEX: Texture memory single bit volatile ECC errors.
NVML_FI_DEV_ECC_SBE_VOL_TOTAL: Total single bit volatile ECC errors.
NVML_FI_DEV_EDPP_MULTIPLIER: EDPp multiplier expressed as a percentage.
NVML_FI_DEV_ENERGY: Total energy consumption (in mJ) since the driver was last reloaded. Same as NVML_FI_DEV_TOTAL_ENERGY_CONSUMPTION for the GPU.
NVML_FI_DEV_GET_GPU_RECOVERY_ACTION: GPU Recovery action. See nvmlDeviceGpuRecoveryAction_t .
NVML_FI_DEV_INACTIVE_BANK_REMAPPINGS: Number of inactive bank remappings.
NVML_FI_DEV_IS_MIG_MODE_INDEPENDENT_MIG_QUERY_CAPABLE: MIG mode independent, MIG query capable device. 1=yes. 0=no.
NVML_FI_DEV_IS_RESETLESS_MIG_SUPPORTED: Device's Restless MIG Capability.
NVML_FI_DEV_MCLK_MIN_SWITCH_INTERVAL_MILLISECONDS: minimum required elapsed time between runtime mclk switches, 0 = no rate limit
NVML_FI_DEV_MCLK_SWITCH_TYPE: See NVML_MCLK_SWITCH_TYPE_<XYZ> for all enumerations.
NVML_FI_DEV_MEMORY_TEMP: Memory temperature for the device.
NVML_FI_DEV_MMA_STALL_PERCENT: MMA (Matrix Multiply Accumulate) stall percentage.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L0: NVLink Bandwidth Counter for Counter Set 0, Lane 0.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L1: NVLink Bandwidth Counter for Counter Set 0, Lane 1.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L10: NVLink Bandwidth Counter for Counter Set 0, Lane 10.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L11: NVLink Bandwidth Counter for Counter Set 0, Lane 11.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L2: NVLink Bandwidth Counter for Counter Set 0, Lane 2.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L3: NVLink Bandwidth Counter for Counter Set 0, Lane 3.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L4: NVLink Bandwidth Counter for Counter Set 0, Lane 4.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L5: NVLink Bandwidth Counter for Counter Set 0, Lane 5.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L6: NVLink Bandwidth Counter for Counter Set 0, Lane 6.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L7: NVLink Bandwidth Counter for Counter Set 0, Lane 7.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L8: NVLink Bandwidth Counter for Counter Set 0, Lane 8.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L9: NVLink Bandwidth Counter for Counter Set 0, Lane 9.
NVML_FI_DEV_NVLINK_BANDWIDTH_C0_TOTAL: NVLink Bandwidth Counter Total for Counter Set 0, All Lanes.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L0: NVLink Bandwidth Counter for Counter Set 1, Lane 0.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L1: NVLink Bandwidth Counter for Counter Set 1, Lane 1.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L10: NVLink Bandwidth Counter for Counter Set 1, Lane 10.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L11: NVLink Bandwidth Counter for Counter Set 1, Lane 11.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L2: NVLink Bandwidth Counter for Counter Set 1, Lane 2.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L3: NVLink Bandwidth Counter for Counter Set 1, Lane 3.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L4: NVLink Bandwidth Counter for Counter Set 1, Lane 4.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L5: NVLink Bandwidth Counter for Counter Set 1, Lane 5.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L6: NVLink Bandwidth Counter for Counter Set 1, Lane 6.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L7: NVLink Bandwidth Counter for Counter Set 1, Lane 7.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L8: NVLink Bandwidth Counter for Counter Set 1, Lane 8.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L9: NVLink Bandwidth Counter for Counter Set 1, Lane 9.
NVML_FI_DEV_NVLINK_BANDWIDTH_C1_TOTAL: NVLink Bandwidth Counter Total for Counter Set 1, All Lanes.
NVML_FI_DEV_NVLINK_COUNT_BUFFER_OVERRUN_ERRORS: Number of packets that were discarded on Rx due to buffer overrun.
NVML_FI_DEV_NVLINK_COUNT_EFFECTIVE_BER: NVLink Effective BER.
NVML_FI_DEV_NVLINK_COUNT_EFFECTIVE_ERRORS: Sum of the number of errors in each Nvlink packet.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_0: NVLink counter field id 235-250.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_1: Count of symbol errors that are corrected - bin 1.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_10: Count of symbol errors that are corrected - bin 10.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_11: Count of symbol errors that are corrected - bin 11.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_12: Count of symbol errors that are corrected - bin 12.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_13: Count of symbol errors that are corrected - bin 13.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_14: Count of symbol errors that are corrected - bin 14.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_15: Count of symbol errors that are corrected - bin 15.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_2: Count of symbol errors that are corrected - bin 2.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_3: Count of symbol errors that are corrected - bin 3.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_4: Count of symbol errors that are corrected - bin 4.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_5: Count of symbol errors that are corrected - bin 5.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_6: Count of symbol errors that are corrected - bin 6.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_7: Count of symbol errors that are corrected - bin 7.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_8: Count of symbol errors that are corrected - bin 8.
NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_9: Count of symbol errors that are corrected - bin 9.
NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_EVENTS: Number of times link went from Up to recovery, irrespective of the result.
NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_FAILED_EVENTS: Number of times link went from Up to recovery, failed and link was declared down.
NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_SUCCESSFUL_EVENTS: Number of times link went from Up to recovery, succeeded and link came back up.
NVML_FI_DEV_NVLINK_COUNT_LOCAL_LINK_INTEGRITY_ERRORS: Total number of times that the count of local errors exceeded a threshold.
NVML_FI_DEV_NVLINK_COUNT_MALFORMED_PACKET_ERRORS: Number of packets Rx on a link where packets are malformed.
NVML_FI_DEV_NVLINK_COUNT_RAW_BER: Deprecated, do not use.
NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE0: Deprecated, do not use.
NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE0_V2: NVLINK raw BER for lane 0.
NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE1: Deprecated, do not use.
NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE1_V2: NVLINK raw BER for lane 1.
NVML_FI_DEV_NVLINK_COUNT_RAW_BER_V2: NVLINK total raw BER.
NVML_FI_DEV_NVLINK_COUNT_RAW_ERRORS_LANE0: NVLINK raw error count for lane 0.
NVML_FI_DEV_NVLINK_COUNT_RAW_ERRORS_LANE1: NVLINK raw error count for lane 1.
NVML_FI_DEV_NVLINK_COUNT_RCV_BYTES: Total Rx bytes on the link in NVLink5.
NVML_FI_DEV_NVLINK_COUNT_RCV_ERRORS: Total number of packets with errors Rx on a link.
NVML_FI_DEV_NVLINK_COUNT_RCV_GENERAL_ERRORS: Total number of packets Rx with header mismatch.
NVML_FI_DEV_NVLINK_COUNT_RCV_PACKETS: Total Rx packets on the link in NVLink5.
NVML_FI_DEV_NVLINK_COUNT_RCV_REMOTE_ERRORS: Total number of packets Rx - stomp/EBP marker.
NVML_FI_DEV_NVLINK_COUNT_SYMBOL_BER: NVLink Symbol BER.
NVML_FI_DEV_NVLINK_COUNT_SYMBOL_ERRORS: Number of errors in rx symbols.
NVML_FI_DEV_NVLINK_COUNT_VL15_DROPPED: Deprecated, do not use.
NVML_FI_DEV_NVLINK_COUNT_XMIT_BYTES: Total Tx bytes on the link in NVLink5.
NVML_FI_DEV_NVLINK_COUNT_XMIT_DISCARDS: Total number of tx error packets that were discarded.
NVML_FI_DEV_NVLINK_COUNT_XMIT_PACKETS: NVLink counter field id 201-225.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L0: NVLink CRC Data Error Counters.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L1: NVLink data CRC Error Counter for Lane 1.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L10: NVLink data CRC Error Counter for Lane 10.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L11: NVLink data CRC Error Counter for Lane 11.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L2: NVLink data CRC Error Counter for Lane 2.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L3: NVLink data CRC Error Counter for Lane 3.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L4: NVLink data CRC Error Counter for Lane 4.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L5: NVLink data CRC Error Counter for Lane 5.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L6: NVLink CRC Data Error Counters.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L7: NVLink data CRC Error Counter for Lane 7.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L8: NVLink data CRC Error Counter for Lane 8.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L9: NVLink data CRC Error Counter for Lane 9.
NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_TOTAL: NvLink data CRC Error Counter total for all Lanes.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L0: NVLink Flit Error Counters.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L1: NVLink flow control CRC Error Counter for Lane 1.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L10: NVLink flow control CRC Error Counter for Lane 10.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L11: NVLink flow control CRC Error Counter for Lane 11.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L2: NVLink flow control CRC Error Counter for Lane 2.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L3: NVLink flow control CRC Error Counter for Lane 3.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L4: NVLink flow control CRC Error Counter for Lane 4.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L5: NVLink flow control CRC Error Counter for Lane 5.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L6: NVLink Flit Error Counters.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L7: NVLink flow control CRC Error Counter for Lane 7.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L8: NVLink flow control CRC Error Counter for Lane 8.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L9: NVLink flow control CRC Error Counter for Lane 9.
NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_TOTAL: NVLink flow control CRC Error Counter total for all Lanes.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L0: NVLink data ECC Error Counter for Link 0.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L1: NVLink data ECC Error Counter for Link 1.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L10: NVLink data ECC Error Counter for Link 10.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L11: NVLink data ECC Error Counter for Link 11.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L2: NVLink data ECC Error Counter for Link 2.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L3: NVLink data ECC Error Counter for Link 3.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L4: NVLink data ECC Error Counter for Link 4.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L5: NVLink data ECC Error Counter for Link 5.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L6: NVLink data ECC Error Counter for Link 6.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L7: NVLink data ECC Error Counter for Link 7.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L8: NVLink data ECC Error Counter for Link 8.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L9: NVLink data ECC Error Counter for Link 9.
NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_TOTAL: NVLink data ECC Error Counter total for all Links.
NVML_FI_DEV_NVLINK_ERROR_DL_CRC: NVLink Recovery Error CRC Counter.
NVML_FI_DEV_NVLINK_ERROR_DL_RECOVERY: NVLink Recovery Error Counter.
NVML_FI_DEV_NVLINK_ERROR_DL_REPLAY: NVLink Error Replay.
NVML_FI_DEV_NVLINK_GET_DATA_RATE: The Effective Nvlink Data rate available for transactions after accounting for FEC overhead.
NVML_FI_DEV_NVLINK_GET_POWER_STATE: NVLink Power state. 0=HIGH_SPEED 1=LOW_SPEED.
NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD: NVLink length of idle period (units can be found from NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS) before transitioning links to sleep state.
NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_MAX: Max Nvlink Power Threshold. See NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD.
NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_MIN: Min Nvlink Power Threshold. See NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD.
NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_SUPPORTED: Determine if Nvlink Power Threshold feature is supported.
NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS: Values are in the form NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_*.
NVML_FI_DEV_NVLINK_GET_SPEED: NVLink Speed, State and Version field id 164, 165, and 166.
NVML_FI_DEV_NVLINK_GET_STATE: NVLink State - one of NVML_NVLINK_STATE_* values.
NVML_FI_DEV_NVLINK_GET_VERSION: NVLink Version.
NVML_FI_DEV_NVLINK_LINK_COUNT: Number of NVLinks present on the device.
NVML_FI_DEV_NVLINK_PLR_XMIT_BLOCKS: NVLINK PLR Xmit Blocks.
NVML_FI_DEV_NVLINK_PLR_XMIT_RETRY_BLOCKS: NVLINK PLR Xmit Retry Blocks.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L0: NVLink Recovery Error Counters.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L1: NVLink Recovery Error Counter for Lane 1.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L10: NVLink Recovery Error Counter for Lane 10.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L11: NVLink Recovery Error Counter for Lane 11.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L2: NVLink Recovery Error Counter for Lane 2.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L3: NVLink Recovery Error Counter for Lane 3.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L4: NVLink Recovery Error Counter for Lane 4.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L5: NVLink Recovery Error Counter for Lane 5.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L6: NVLink Recovery Error Counters.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L7: NVLink Recovery Error Counter for Lane 7.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L8: NVLink Recovery Error Counter for Lane 8.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L9: NVLink Recovery Error Counter for Lane 9.
NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_TOTAL: NVLink Recovery Error Counter total for all Lanes.
NVML_FI_DEV_NVLINK_REMOTE_NVLINK_ID: Remote device NVLink ID.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L0: NVLink Replay Error Counters.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L1: NVLink Replay Error Counter for Lane 1.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L10: NVLink Replay Error Counter for Lane 10.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L11: NVLink Replay Error Counter for Lane 11.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L2: NVLink Replay Error Counter for Lane 2.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L3: NVLink Replay Error Counter for Lane 3.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L4: NVLink Replay Error Counter for Lane 4.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L5: NVLink Replay Error Counter for Lane 5.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L6: NVLink Replay Error Counters.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L7: NVLink Replay Error Counter for Lane 7.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L8: NVLink Replay Error Counter for Lane 8.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L9: NVLink Replay Error Counter for Lane 9.
NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_TOTAL: NVLink Replay Error Counter total for all Lanes.
NVML_FI_DEV_NVLINK_SPEED_MBPS_COMMON: Common NVLink Speed in MBps for active links.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L0: NVLink Speed.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L1: NVLink Speed in MBps for Link 1.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L10: NVLink Speed in MBps for Link 10.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L11: NVLink Speed in MBps for Link 11.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L2: NVLink Speed in MBps for Link 2.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L3: NVLink Speed in MBps for Link 3.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L4: NVLink Speed in MBps for Link 4.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L5: NVLink Speed in MBps for Link 5.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L6: NVLink Speed.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L7: NVLink Speed in MBps for Link 7.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L8: NVLink Speed in MBps for Link 8.
NVML_FI_DEV_NVLINK_SPEED_MBPS_L9: NVLink Speed in MBps for Link 9.
NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_RX: NVLink RX Data throughput in KiB.
NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_TX: NVLink throughput counters field values.
NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_RX: NVLink RX Data + protocol overhead in KiB.
NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_TX: NVLink TX Data + protocol overhead in KiB.
NVML_FI_DEV_NVSWITCH_CONNECTED_LINK_COUNT: NVSwitch: connected NVLink count.
NVML_FI_DEV_PCIE_COUNT_BAD_DLLP: PCIe Bad DLLP Counter.
NVML_FI_DEV_PCIE_COUNT_BAD_TLP: PCIe Bad TLP Counter.
NVML_FI_DEV_PCIE_COUNT_CORRECTABLE_ERRORS: PCIe Correctable Errors Counter.
NVML_FI_DEV_PCIE_COUNT_FATAL_ERROR: PCIe Fatal Error Counter.
NVML_FI_DEV_PCIE_COUNT_LANE_ERROR: PCIe Per Lane Error Counter.
NVML_FI_DEV_PCIE_COUNT_LCRC_ERROR: PCIe LCRC Error Counter.
NVML_FI_DEV_PCIE_COUNT_NAKS_RECEIVED: PCIe NAK Receive Counter.
NVML_FI_DEV_PCIE_COUNT_NAKS_SENT: PCIe NAK Send Counter.
NVML_FI_DEV_PCIE_COUNT_NON_FATAL_ERROR: PCIe Non Fatal Error Counter.
NVML_FI_DEV_PCIE_COUNT_RECEIVER_ERROR: PCIe Receiver Error Counter.
NVML_FI_DEV_PCIE_COUNT_RX_BYTES: PCIe receive bytes. Value can be wrapped.
NVML_FI_DEV_PCIE_COUNT_TX_BYTES: PCIe transmit bytes. Value can be wrapped.
NVML_FI_DEV_PCIE_COUNT_UNSUPPORTED_REQ: PCIe Unsupported Request Counter.
NVML_FI_DEV_PCIE_INBOUND_ATOMICS_MASK
NVML_FI_DEV_PCIE_L0_TO_RECOVERY_COUNTER: Device PEX error recovery counter.
NVML_FI_DEV_PCIE_OUTBOUND_ATOMICS_MASK
NVML_FI_DEV_PCIE_REPLAY_COUNTER: PCIe replay counter.
NVML_FI_DEV_PCIE_REPLAY_ROLLOVER_COUNTER: PCIe replay rollover counter.
NVML_FI_DEV_PENDING_BANK_REMAPPING: If any banks are pending remapping. 1=yes 0=no.
NVML_FI_DEV_PERF_POLICY_BOARD_LIMIT: Perf Policy Counter for Board Limit.
NVML_FI_DEV_PERF_POLICY_LOW_UTILIZATION: Perf Policy Counter for Low GPU Utilization Policy.
NVML_FI_DEV_PERF_POLICY_POWER: Perf Policy Counter for Power Policy.
NVML_FI_DEV_PERF_POLICY_RELIABILITY: Perf Policy Counter for Reliability Policy.
NVML_FI_DEV_PERF_POLICY_SYNC_BOOST: Perf Policy Counter for Sync boost Policy.
NVML_FI_DEV_PERF_POLICY_THERMAL: Perf Policy Counter for Thermal Policy.
NVML_FI_DEV_PERF_POLICY_TOTAL_APP_CLOCKS: Perf Policy Counter for Total App Clock Policy.
NVML_FI_DEV_PERF_POLICY_TOTAL_BASE_CLOCKS: Perf Policy Counter for Total Base Clocks Policy.
NVML_FI_DEV_POWER_AVERAGE: Retrieves power usage for this GPU in milliwatts.
NVML_FI_DEV_POWER_CURRENT_LIMIT: Limit currently enforced in milliwatts (This includes other limits set elsewhere. E.g. Out-of-band).
NVML_FI_DEV_POWER_DEFAULT_LIMIT: Default power limit in milliwatts (limit which device boots with).
NVML_FI_DEV_POWER_INSTANT: Current GPU power, supported on all architectures.
NVML_FI_DEV_POWER_MAX_LIMIT: Maximum power limit in milliwatts.
NVML_FI_DEV_POWER_MIN_LIMIT: Minimum power limit in milliwatts.
NVML_FI_DEV_POWER_REQUESTED_LIMIT: Power limit requested by NVML or any other userspace client.
NVML_FI_DEV_POWER_SYNC_BALANCING_AF: Accumulated activity factor of the GPU to be used for averaging.
NVML_FI_DEV_POWER_SYNC_BALANCING_FREQ: Accumulated frequency of the GPU to be used for averaging.
NVML_FI_DEV_REMAPPED_COR: Number of remapped rows due to correctable errors.
NVML_FI_DEV_REMAPPED_FAILURE: If any rows failed to be remapped 1=yes 0=no.
NVML_FI_DEV_REMAPPED_PENDING: If any rows are pending remapping. 1=yes 0=no.
NVML_FI_DEV_REMAPPED_ROWS_COR_INACTIVE: Number of inactive row remappings due to correctable errors.
NVML_FI_DEV_REMAPPED_ROWS_UNC_INACTIVE: Number of inactive row remappings due to uncorrectable errors.
NVML_FI_DEV_REMAPPED_UNC: Number of remapped rows due to uncorrectable errors.
NVML_FI_DEV_RESET_STATUS: Depracated, do not use (use NVML_FI_DEV_GET_GPU_RECOVERY_ACTION instead)
NVML_FI_DEV_RETIRED_DBE: Number of retired pages because of double bit errors.
NVML_FI_DEV_RETIRED_PENDING: If any pages are pending retirement. 1=yes. 0=no.
NVML_FI_DEV_RETIRED_PENDING_DBE: If any pages are pending retirement due to DBE. 1=yes. 0=no.
NVML_FI_DEV_RETIRED_PENDING_SBE: If any pages are pending retirement due to SBE. 1=yes. 0=no.
NVML_FI_DEV_RETIRED_SBE: Number of retired pages because of single bit errors.
NVML_FI_DEV_TEMPERATURE_GPU_MAX_TLIMIT: T.Limit temperature after which GPU may be throttled below base clock.
NVML_FI_DEV_TEMPERATURE_MEM_MAX_TLIMIT: T.Limit temperature after which GPU may begin SW slowdown due to memory temperature.
NVML_FI_DEV_TEMPERATURE_SHUTDOWN_TLIMIT: GPU T.Limit temperature thresholds in degree Celsius.
NVML_FI_DEV_TEMPERATURE_SLOWDOWN_TLIMIT: T.Limit temperature after which GPU may begin HW slowdown.
NVML_FI_DEV_TOTAL_ENERGY_CONSUMPTION: Total energy consumption for the GPU in mJ since the driver was last reloaded.
NVML_FI_MAX: One greater than the largest field ID defined above.
NVML_FI_PWR_SMOOTHING_ACTIVE_PRESET_PROFILE: Active preset profile number.
NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PERCENT_TMP_FLOOR: % TMP floor for a given profile
NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PRIMARY_FLOOR_ACT_OFFSET: Current primary floor activation offset value in Watts for admin override.
NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PRIMARY_FLOOR_ACT_WIN_MULT: Current primary floor activation window multiplier value for admin override.
NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PRIMARY_FLOOR_TAR_WIN_MULT: Current primary floor target window multiplier value for admin override.
NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_DOWN_HYST_VAL: Ramp down hysteresis value in ms for a given profile.
NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_DOWN_RATE: Ramp down rate in mW/s for a given profile.
NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_UP_RATE: Ramp up rate in mW/s for a given profile.
NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_SECONDARY_POWER_FLOOR: Current secondary power floor value in Watts for admin override.
NVML_FI_PWR_SMOOTHING_APPLIED_TMP_CEIL: Applied TMP ceiling value in Watts.
NVML_FI_PWR_SMOOTHING_APPLIED_TMP_FLOOR: Applied TMP floor value in Watts.
NVML_FI_PWR_SMOOTHING_DELAYED_PWR_SMOOTHING_SUPPORTED: Support (0/Not Supported or 1/Supported) for delayed power smoothing.
NVML_FI_PWR_SMOOTHING_ENABLED: Enablement (0/DISABLED or 1/ENABLED)
NVML_FI_PWR_SMOOTHING_HW_CIRCUITRY_PERCENT_LIFETIME_REMAINING: HW Circuitry % lifetime remaining.
NVML_FI_PWR_SMOOTHING_IMM_RAMP_DOWN_ENABLED: Immediate ramp down enablement (0/DISABLED or 1/ENABLED)
NVML_FI_PWR_SMOOTHING_MAX_NUM_PRESET_PROFILES: Max number of preset profiles.
NVML_FI_PWR_SMOOTHING_MAX_PERCENT_TMP_FLOOR_SETTING: Max % TMP Floor value.
NVML_FI_PWR_SMOOTHING_MIN_PERCENT_TMP_FLOOR_SETTING: Min % TMP Floor value.
NVML_FI_PWR_SMOOTHING_MIN_PRIMARY_FLOOR_ACT_OFFSET: Minimum primary floor activation offset value in Watts.
NVML_FI_PWR_SMOOTHING_MIN_PRIMARY_FLOOR_ACT_POINT: Minimum primary floor activation point value in Watts.
NVML_FI_PWR_SMOOTHING_PRIMARY_POWER_FLOOR: Current primary power floor value in Watts.
NVML_FI_PWR_SMOOTHING_PRIV_LVL: Current privilege level.
NVML_FI_PWR_SMOOTHING_PROFILE_PERCENT_TMP_FLOOR: % TMP floor for a given profile
NVML_FI_PWR_SMOOTHING_PROFILE_PRIMARY_FLOOR_ACT_OFFSET: Current primary floor activation offset value in Watts for a given profile.
NVML_FI_PWR_SMOOTHING_PROFILE_PRIMARY_FLOOR_ACT_WIN_MULT: Current primary floor activation window multiplier value for a given profile.
NVML_FI_PWR_SMOOTHING_PROFILE_PRIMARY_FLOOR_TAR_WIN_MULT: Current primary floor target window multiplier value for a given profile.
NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_DOWN_HYST_VAL: Ramp down hysteresis value in ms for a given profile.
NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_DOWN_RATE: Ramp down rate in mW/s for a given profile.
NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_UP_RATE: Ramp up rate in mW/s for a given profile.
NVML_FI_PWR_SMOOTHING_PROFILE_SECONDARY_POWER_FLOOR: Current secondary power floor value in Watts for a given profile.
NVML_FI_PWR_SMOOTHING_SECONDARY_POWER_FLOOR: Current secondary power floor value in Watts.
NVML_FI_PWR_SMOOTHING_SOC_POWER_SMOOTHING_ENABLED: State-Of-Charge Power Smoothing Enabled (0/DISABLED or 1/ENABLED)
NVML_FI_PWR_SMOOTHING_WINDOW_MULTIPLIER: Window Multiplier value in ms.
NVML_MCLK_SWITCH_TYPE_DEFERRED: deferred switching (driver reload)
NVML_MCLK_SWITCH_TYPE_NOT_SUPPORTED: NVML_FI_DEV_MCLK_SWITCH_TYPE enumerations.
NVML_MCLK_SWITCH_TYPE_RUNTIME: runtime switching
NVML_NVLINK_LOW_POWER_THRESHOLD_DEFAULT
NVML_NVLINK_LOW_POWER_THRESHOLD_MAX
NVML_NVLINK_LOW_POWER_THRESHOLD_MIN
NVML_NVLINK_LOW_POWER_THRESHOLD_RESET
NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_100US: NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS.
NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_50US
NVML_NVLINK_POWER_STATE_HIGH_SPEED: NVML_NVLINK_POWER_STATES.
NVML_NVLINK_POWER_STATE_LOW

Structs#

nvmlFieldValue_t: Information for a Field Value Sample.
nvmlNvLinkPowerThres_t

Macros#

NVML_C2C_POWER_STATE_FULL_POWER#

NVML_C2C_POWER_STATE_LOW_POWER#

NVML_FI_DEV_ACTIVE_BANK_REMAPPINGS#: Number of active bank remappings.

NVML_FI_DEV_BANK_REMAPPER_HISTOGRAM_MAX#: Number of groups with full bank remap availability.

NVML_FI_DEV_BANK_REMAPPER_HISTOGRAM_NONE#: Number of groups with no spare bankremap availability.

NVML_FI_DEV_C2C_LINK_COUNT#: Number of C2C Links present on the device.

NVML_FI_DEV_C2C_LINK_ERROR_INTR#: C2C Link CRC Error Counter.

NVML_FI_DEV_C2C_LINK_ERROR_REPLAY#: C2C Link Replay Error Counter.

NVML_FI_DEV_C2C_LINK_ERROR_REPLAY_B2B#: C2C Link Back to Back Replay Error Counter.

NVML_FI_DEV_C2C_LINK_GET_MAX_BW#: C2C Link Speed in MBps for active links.

NVML_FI_DEV_C2C_LINK_GET_STATUS#: C2C Link Status 0=INACTIVE 1=ACTIVE.

NVML_FI_DEV_C2C_LINK_POWER_STATE#: C2C Link Power state. See NVML_C2C_POWER_STATE_*.

NVML_FI_DEV_CLOCKS_EVENT_REASON_HW_POWER_BRAKE_SLOWDOWN#: Throttling due to external power brake assertion trigger (reducing core clocks by a factor of 2 or more) in ns.

NVML_FI_DEV_CLOCKS_EVENT_REASON_HW_THERM_SLOWDOWN#: Throttling due to temperature being too high (reducing core clocks by a factor of 2 or more) in ns.

NVML_FI_DEV_CLOCKS_EVENT_REASON_SW_POWER_CAP#

Field values for Clock Throttle Reason Counters All counters are in nanoseconds.

Throttling to not exceed currently set power limits in ns

NVML_FI_DEV_CLOCKS_EVENT_REASON_SW_THERM_SLOWDOWN#: Throttling to ensure ((GPU temp < GPU Max Operating Temp) && (Memory Temp < Memory Max Operating Temp)) in ns.

NVML_FI_DEV_CLOCKS_EVENT_REASON_SYNC_BOOST#: Throttling to match minimum possible clock across Sync Boost Group in ns.

NVML_FI_DEV_DRAIN_AND_RESET_STATUS#: Deprecated, do not use (use NVML_FI_DEV_GET_GPU_RECOVERY_ACTION instead)

NVML_FI_DEV_ECC_CURRENT#

Field Identifiers.

All Identifiers pertain to a device. Each ID is only used once and is guaranteed never to change. Current ECC mode. 1=Active. 0=Inactive

NVML_FI_DEV_ECC_DBE_AGG_CBU#: CBU double bit aggregate ECC errors.

NVML_FI_DEV_ECC_DBE_AGG_DEV#: Device memory double bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_DBE_AGG_L1#: L1 cache double bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_DBE_AGG_L2#: L2 cache double bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_DBE_AGG_REG#: Register File double bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_DBE_AGG_TEX#: Texture memory double bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_DBE_AGG_TOTAL#: Total double bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_DBE_VOL_CBU#: CBU double bit volatile ECC errors.

NVML_FI_DEV_ECC_DBE_VOL_DEV#: Device memory double bit volatile ECC errors.

NVML_FI_DEV_ECC_DBE_VOL_L1#: L1 cache double bit volatile ECC errors.

NVML_FI_DEV_ECC_DBE_VOL_L2#: L2 cache double bit volatile ECC errors.

NVML_FI_DEV_ECC_DBE_VOL_REG#: Register file double bit volatile ECC errors.

NVML_FI_DEV_ECC_DBE_VOL_TEX#: Texture memory double bit volatile ECC errors.

NVML_FI_DEV_ECC_DBE_VOL_TOTAL#: Total double bit volatile ECC errors.

NVML_FI_DEV_ECC_PENDING#: Pending ECC mode. 1=Active. 0=Inactive.

NVML_FI_DEV_ECC_SBE_AGG_DEV#: Device memory single bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_SBE_AGG_L1#: L1 cache single bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_SBE_AGG_L2#: L2 cache single bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_SBE_AGG_REG#: Register File single bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_SBE_AGG_TEX#: Texture memory single bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_SBE_AGG_TOTAL#: Total single bit aggregate (persistent) ECC errors.

NVML_FI_DEV_ECC_SBE_VOL_DEV#: Device memory single bit volatile ECC errors.

NVML_FI_DEV_ECC_SBE_VOL_L1#: L1 cache single bit volatile ECC errors.

NVML_FI_DEV_ECC_SBE_VOL_L2#: L2 cache single bit volatile ECC errors.

NVML_FI_DEV_ECC_SBE_VOL_REG#: Register file single bit volatile ECC errors.

NVML_FI_DEV_ECC_SBE_VOL_TEX#: Texture memory single bit volatile ECC errors.

NVML_FI_DEV_ECC_SBE_VOL_TOTAL#: Total single bit volatile ECC errors.

NVML_FI_DEV_EDPP_MULTIPLIER#: EDPp multiplier expressed as a percentage.

NVML_FI_DEV_ENERGY#: Total energy consumption (in mJ) since the driver was last reloaded. Same as NVML_FI_DEV_TOTAL_ENERGY_CONSUMPTION for the GPU.

NVML_FI_DEV_GET_GPU_RECOVERY_ACTION#: GPU Recovery action. See nvmlDeviceGpuRecoveryAction_t.

NVML_FI_DEV_INACTIVE_BANK_REMAPPINGS#: Number of inactive bank remappings.

NVML_FI_DEV_IS_MIG_MODE_INDEPENDENT_MIG_QUERY_CAPABLE#: MIG mode independent, MIG query capable device. 1=yes. 0=no.

NVML_FI_DEV_IS_RESETLESS_MIG_SUPPORTED#: Device’s Restless MIG Capability.

NVML_FI_DEV_MCLK_MIN_SWITCH_INTERVAL_MILLISECONDS#: minimum required elapsed time between runtime mclk switches, 0 = no rate limit

NVML_FI_DEV_MCLK_SWITCH_TYPE#: See NVML_MCLK_SWITCH_TYPE_<XYZ> for all enumerations.

NVML_FI_DEV_MEMORY_TEMP#: Memory temperature for the device.

NVML_FI_DEV_MMA_STALL_PERCENT#: MMA (Matrix Multiply Accumulate) stall percentage.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L0#: NVLink Bandwidth Counter for Counter Set 0, Lane 0.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L1#: NVLink Bandwidth Counter for Counter Set 0, Lane 1.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L10#: NVLink Bandwidth Counter for Counter Set 0, Lane 10.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L11#: NVLink Bandwidth Counter for Counter Set 0, Lane 11.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L2#: NVLink Bandwidth Counter for Counter Set 0, Lane 2.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L3#: NVLink Bandwidth Counter for Counter Set 0, Lane 3.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L4#: NVLink Bandwidth Counter for Counter Set 0, Lane 4.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L5#: NVLink Bandwidth Counter for Counter Set 0, Lane 5.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L6#: NVLink Bandwidth Counter for Counter Set 0, Lane 6.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L7#: NVLink Bandwidth Counter for Counter Set 0, Lane 7.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L8#: NVLink Bandwidth Counter for Counter Set 0, Lane 8.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L9#: NVLink Bandwidth Counter for Counter Set 0, Lane 9.

NVML_FI_DEV_NVLINK_BANDWIDTH_C0_TOTAL#: NVLink Bandwidth Counter Total for Counter Set 0, All Lanes.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L0#: NVLink Bandwidth Counter for Counter Set 1, Lane 0.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L1#: NVLink Bandwidth Counter for Counter Set 1, Lane 1.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L10#: NVLink Bandwidth Counter for Counter Set 1, Lane 10.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L11#: NVLink Bandwidth Counter for Counter Set 1, Lane 11.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L2#: NVLink Bandwidth Counter for Counter Set 1, Lane 2.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L3#: NVLink Bandwidth Counter for Counter Set 1, Lane 3.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L4#: NVLink Bandwidth Counter for Counter Set 1, Lane 4.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L5#: NVLink Bandwidth Counter for Counter Set 1, Lane 5.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L6#: NVLink Bandwidth Counter for Counter Set 1, Lane 6.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L7#: NVLink Bandwidth Counter for Counter Set 1, Lane 7.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L8#: NVLink Bandwidth Counter for Counter Set 1, Lane 8.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L9#: NVLink Bandwidth Counter for Counter Set 1, Lane 9.

NVML_FI_DEV_NVLINK_BANDWIDTH_C1_TOTAL#: NVLink Bandwidth Counter Total for Counter Set 1, All Lanes.

NVML_FI_DEV_NVLINK_COUNT_BUFFER_OVERRUN_ERRORS#: Number of packets that were discarded on Rx due to buffer overrun.

NVML_FI_DEV_NVLINK_COUNT_EFFECTIVE_BER#

NVLink Effective BER.

Bit [0:7]: BER Exponent value Bit [8:11]: BER MANTISSA value Use macro NVML_NVLINK_ERROR_COUNTER_BER_GET to extract the two fields Effective BER for effective errors

NVML_FI_DEV_NVLINK_COUNT_EFFECTIVE_ERRORS#: Sum of the number of errors in each Nvlink packet.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_0#

NVLink counter field id 235-250.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. Count of symbol errors that are corrected - bin 0

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_1#: Count of symbol errors that are corrected - bin 1.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_10#: Count of symbol errors that are corrected - bin 10.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_11#: Count of symbol errors that are corrected - bin 11.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_12#: Count of symbol errors that are corrected - bin 12.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_13#: Count of symbol errors that are corrected - bin 13.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_14#: Count of symbol errors that are corrected - bin 14.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_15#: Count of symbol errors that are corrected - bin 15.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_2#: Count of symbol errors that are corrected - bin 2.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_3#: Count of symbol errors that are corrected - bin 3.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_4#: Count of symbol errors that are corrected - bin 4.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_5#: Count of symbol errors that are corrected - bin 5.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_6#: Count of symbol errors that are corrected - bin 6.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_7#: Count of symbol errors that are corrected - bin 7.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_8#: Count of symbol errors that are corrected - bin 8.

NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_9#: Count of symbol errors that are corrected - bin 9.

NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_EVENTS#: Number of times link went from Up to recovery, irrespective of the result.

NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_FAILED_EVENTS#: Number of times link went from Up to recovery, failed and link was declared down.

NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_SUCCESSFUL_EVENTS#: Number of times link went from Up to recovery, succeeded and link came back up.

NVML_FI_DEV_NVLINK_COUNT_LOCAL_LINK_INTEGRITY_ERRORS#: Total number of times that the count of local errors exceeded a threshold.

NVML_FI_DEV_NVLINK_COUNT_MALFORMED_PACKET_ERRORS#: Number of packets Rx on a link where packets are malformed.

NVML_FI_DEV_NVLINK_COUNT_RAW_BER#: Deprecated, do not use.

NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE0#: Deprecated, do not use.

NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE0_V2#: NVLINK raw BER for lane 0.

NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE1#: Deprecated, do not use.

NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE1_V2#: NVLINK raw BER for lane 1.

NVML_FI_DEV_NVLINK_COUNT_RAW_BER_V2#: NVLINK total raw BER.

NVML_FI_DEV_NVLINK_COUNT_RAW_ERRORS_LANE0#: NVLINK raw error count for lane 0.

NVML_FI_DEV_NVLINK_COUNT_RAW_ERRORS_LANE1#: NVLINK raw error count for lane 1.

NVML_FI_DEV_NVLINK_COUNT_RCV_BYTES#: Total Rx bytes on the link in NVLink5.

NVML_FI_DEV_NVLINK_COUNT_RCV_ERRORS#: Total number of packets with errors Rx on a link.

NVML_FI_DEV_NVLINK_COUNT_RCV_GENERAL_ERRORS#: Total number of packets Rx with header mismatch.

NVML_FI_DEV_NVLINK_COUNT_RCV_PACKETS#: Total Rx packets on the link in NVLink5.

NVML_FI_DEV_NVLINK_COUNT_RCV_REMOTE_ERRORS#: Total number of packets Rx - stomp/EBP marker.

NVML_FI_DEV_NVLINK_COUNT_SYMBOL_BER#

NVLink Symbol BER.

Bit [0:7]: BER Exponent value Bit [8:11]: BER MANTISSA value Use macro NVML_NVLINK_ERROR_COUNTER_BER_GET to extract the two fields BER for symbol errors

NVML_FI_DEV_NVLINK_COUNT_SYMBOL_ERRORS#: Number of errors in rx symbols.

NVML_FI_DEV_NVLINK_COUNT_VL15_DROPPED#: Deprecated, do not use.

NVML_FI_DEV_NVLINK_COUNT_XMIT_BYTES#: Total Tx bytes on the link in NVLink5.

NVML_FI_DEV_NVLINK_COUNT_XMIT_DISCARDS#: Total number of tx error packets that were discarded.

NVML_FI_DEV_NVLINK_COUNT_XMIT_PACKETS#

NVLink counter field id 201-225.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. Total Tx packets on the link in NVLink5

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L0#

NVLink CRC Data Error Counters.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink data CRC Error Counter for Lane 0

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L1#: NVLink data CRC Error Counter for Lane 1.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L10#: NVLink data CRC Error Counter for Lane 10.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L11#: NVLink data CRC Error Counter for Lane 11.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L2#: NVLink data CRC Error Counter for Lane 2.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L3#: NVLink data CRC Error Counter for Lane 3.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L4#: NVLink data CRC Error Counter for Lane 4.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L5#: NVLink data CRC Error Counter for Lane 5.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L6#

NVLink CRC Data Error Counters.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink data CRC Error Counter for Lane 6

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L7#: NVLink data CRC Error Counter for Lane 7.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L8#: NVLink data CRC Error Counter for Lane 8.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L9#: NVLink data CRC Error Counter for Lane 9.

NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_TOTAL#: NvLink data CRC Error Counter total for all Lanes.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L0#

NVLink Flit Error Counters.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink flow control CRC Error Counter for Lane 0

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L1#: NVLink flow control CRC Error Counter for Lane 1.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L10#: NVLink flow control CRC Error Counter for Lane 10.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L11#: NVLink flow control CRC Error Counter for Lane 11.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L2#: NVLink flow control CRC Error Counter for Lane 2.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L3#: NVLink flow control CRC Error Counter for Lane 3.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L4#: NVLink flow control CRC Error Counter for Lane 4.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L5#: NVLink flow control CRC Error Counter for Lane 5.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L6#

NVLink Flit Error Counters.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink flow control CRC Error Counter for Lane 6

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L7#: NVLink flow control CRC Error Counter for Lane 7.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L8#: NVLink flow control CRC Error Counter for Lane 8.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L9#: NVLink flow control CRC Error Counter for Lane 9.

NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_TOTAL#: NVLink flow control CRC Error Counter total for all Lanes.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L0#: NVLink data ECC Error Counter for Link 0.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L1#: NVLink data ECC Error Counter for Link 1.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L10#: NVLink data ECC Error Counter for Link 10.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L11#: NVLink data ECC Error Counter for Link 11.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L2#: NVLink data ECC Error Counter for Link 2.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L3#: NVLink data ECC Error Counter for Link 3.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L4#: NVLink data ECC Error Counter for Link 4.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L5#: NVLink data ECC Error Counter for Link 5.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L6#: NVLink data ECC Error Counter for Link 6.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L7#: NVLink data ECC Error Counter for Link 7.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L8#: NVLink data ECC Error Counter for Link 8.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L9#: NVLink data ECC Error Counter for Link 9.

NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_TOTAL#: NVLink data ECC Error Counter total for all Links.

NVML_FI_DEV_NVLINK_ERROR_DL_CRC#

NVLink Recovery Error CRC Counter.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink CRC Error Counter This is unsupported for Blackwell+ Please use NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_*

NVML_FI_DEV_NVLINK_ERROR_DL_RECOVERY#

NVLink Recovery Error Counter.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Recovery Error Counter This is unsupported for Blackwell+ Please use NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_*

NVML_FI_DEV_NVLINK_ERROR_DL_REPLAY#

NVLink Error Replay.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Replay Error Counter This is unsupported for Blackwell+. Please use NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_*

NVML_FI_DEV_NVLINK_GET_DATA_RATE#: The Effective Nvlink Data rate available for transactions after accounting for FEC overhead.

NVML_FI_DEV_NVLINK_GET_POWER_STATE#: NVLink Power state. 0=HIGH_SPEED 1=LOW_SPEED.

NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD#: NVLink length of idle period (units can be found from NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS) before transitioning links to sleep state.

NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_MAX#: Max Nvlink Power Threshold. See NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD.

NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_MIN#: Min Nvlink Power Threshold. See NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD.

NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_SUPPORTED#: Determine if Nvlink Power Threshold feature is supported.

NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS#: Values are in the form NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_*.

NVML_FI_DEV_NVLINK_GET_SPEED#

NVLink Speed, State and Version field id 164, 165, and 166.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Speed in MBps

NVML_FI_DEV_NVLINK_GET_STATE#: NVLink State - one of NVML_NVLINK_STATE_* values.

NVML_FI_DEV_NVLINK_GET_VERSION#: NVLink Version.

NVML_FI_DEV_NVLINK_LINK_COUNT#: Number of NVLinks present on the device.

NVML_FI_DEV_NVLINK_PLR_XMIT_BLOCKS#: NVLINK PLR Xmit Blocks.

NVML_FI_DEV_NVLINK_PLR_XMIT_RETRY_BLOCKS#: NVLINK PLR Xmit Retry Blocks.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L0#

NVLink Recovery Error Counters.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Recovery Error Counter for Lane 0

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L1#: NVLink Recovery Error Counter for Lane 1.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L10#: NVLink Recovery Error Counter for Lane 10.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L11#: NVLink Recovery Error Counter for Lane 11.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L2#: NVLink Recovery Error Counter for Lane 2.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L3#: NVLink Recovery Error Counter for Lane 3.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L4#: NVLink Recovery Error Counter for Lane 4.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L5#: NVLink Recovery Error Counter for Lane 5.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L6#

NVLink Recovery Error Counters.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Recovery Error Counter for Lane 6

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L7#: NVLink Recovery Error Counter for Lane 7.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L8#: NVLink Recovery Error Counter for Lane 8.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L9#: NVLink Recovery Error Counter for Lane 9.

NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_TOTAL#: NVLink Recovery Error Counter total for all Lanes.

NVML_FI_DEV_NVLINK_REMOTE_NVLINK_ID#

Remote device NVLink ID.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. Remote device NVLink ID

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L0#

NVLink Replay Error Counters.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Replay Error Counter for Lane 0

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L1#: NVLink Replay Error Counter for Lane 1.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L10#: NVLink Replay Error Counter for Lane 10.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L11#: NVLink Replay Error Counter for Lane 11.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L2#: NVLink Replay Error Counter for Lane 2.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L3#: NVLink Replay Error Counter for Lane 3.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L4#: NVLink Replay Error Counter for Lane 4.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L5#: NVLink Replay Error Counter for Lane 5.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L6#

NVLink Replay Error Counters.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Replay Error Counter for Lane 6

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L7#: NVLink Replay Error Counter for Lane 7.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L8#: NVLink Replay Error Counter for Lane 8.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L9#: NVLink Replay Error Counter for Lane 9.

NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_TOTAL#: NVLink Replay Error Counter total for all Lanes.

NVML_FI_DEV_NVLINK_SPEED_MBPS_COMMON#: Common NVLink Speed in MBps for active links.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L0#

NVLink Speed.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Speed in MBps for Link 0

NVML_FI_DEV_NVLINK_SPEED_MBPS_L1#: NVLink Speed in MBps for Link 1.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L10#: NVLink Speed in MBps for Link 10.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L11#: NVLink Speed in MBps for Link 11.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L2#: NVLink Speed in MBps for Link 2.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L3#: NVLink Speed in MBps for Link 3.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L4#: NVLink Speed in MBps for Link 4.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L5#: NVLink Speed in MBps for Link 5.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L6#

NVLink Speed.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Speed in MBps for Link 6

NVML_FI_DEV_NVLINK_SPEED_MBPS_L7#: NVLink Speed in MBps for Link 7.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L8#: NVLink Speed in MBps for Link 8.

NVML_FI_DEV_NVLINK_SPEED_MBPS_L9#: NVLink Speed in MBps for Link 9.

NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_RX#: NVLink RX Data throughput in KiB.

NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_TX#

NVLink throughput counters field values.

Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. A scopeId of UINT_MAX returns aggregate value summed up across all links for the specified counter type in fieldId. NVLink TX Data throughput in KiB

NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_RX#: NVLink RX Data + protocol overhead in KiB.

NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_TX#: NVLink TX Data + protocol overhead in KiB.

NVML_FI_DEV_NVSWITCH_CONNECTED_LINK_COUNT#

NVSwitch: connected NVLink count.

Number of NVLinks connected to NVSwitch

NVML_FI_DEV_PCIE_COUNT_BAD_DLLP#: PCIe Bad DLLP Counter.

NVML_FI_DEV_PCIE_COUNT_BAD_TLP#: PCIe Bad TLP Counter.

NVML_FI_DEV_PCIE_COUNT_CORRECTABLE_ERRORS#: PCIe Correctable Errors Counter.

NVML_FI_DEV_PCIE_COUNT_FATAL_ERROR#: PCIe Fatal Error Counter.

NVML_FI_DEV_PCIE_COUNT_LANE_ERROR#: PCIe Per Lane Error Counter.

NVML_FI_DEV_PCIE_COUNT_LCRC_ERROR#: PCIe LCRC Error Counter.

NVML_FI_DEV_PCIE_COUNT_NAKS_RECEIVED#: PCIe NAK Receive Counter.

NVML_FI_DEV_PCIE_COUNT_NAKS_SENT#: PCIe NAK Send Counter.

NVML_FI_DEV_PCIE_COUNT_NON_FATAL_ERROR#: PCIe Non Fatal Error Counter.

NVML_FI_DEV_PCIE_COUNT_RECEIVER_ERROR#: PCIe Receiver Error Counter.

NVML_FI_DEV_PCIE_COUNT_RX_BYTES#: PCIe receive bytes. Value can be wrapped.

NVML_FI_DEV_PCIE_COUNT_TX_BYTES#: PCIe transmit bytes. Value can be wrapped.

NVML_FI_DEV_PCIE_COUNT_UNSUPPORTED_REQ#: PCIe Unsupported Request Counter.

NVML_FI_DEV_PCIE_INBOUND_ATOMICS_MASK#

NVML_FI_DEV_PCIE_L0_TO_RECOVERY_COUNTER#: Device PEX error recovery counter.

NVML_FI_DEV_PCIE_OUTBOUND_ATOMICS_MASK#

NVML_FI_DEV_PCIE_REPLAY_COUNTER#: PCIe replay counter.

NVML_FI_DEV_PCIE_REPLAY_ROLLOVER_COUNTER#: PCIe replay rollover counter.

NVML_FI_DEV_PENDING_BANK_REMAPPING#: If any banks are pending remapping. 1=yes 0=no.

NVML_FI_DEV_PERF_POLICY_BOARD_LIMIT#: Perf Policy Counter for Board Limit.

NVML_FI_DEV_PERF_POLICY_LOW_UTILIZATION#: Perf Policy Counter for Low GPU Utilization Policy.

NVML_FI_DEV_PERF_POLICY_POWER#: Perf Policy Counter for Power Policy.

NVML_FI_DEV_PERF_POLICY_RELIABILITY#: Perf Policy Counter for Reliability Policy.

NVML_FI_DEV_PERF_POLICY_SYNC_BOOST#: Perf Policy Counter for Sync boost Policy.

NVML_FI_DEV_PERF_POLICY_THERMAL#: Perf Policy Counter for Thermal Policy.

NVML_FI_DEV_PERF_POLICY_TOTAL_APP_CLOCKS#: Perf Policy Counter for Total App Clock Policy.

NVML_FI_DEV_PERF_POLICY_TOTAL_BASE_CLOCKS#: Perf Policy Counter for Total Base Clocks Policy.

NVML_FI_DEV_POWER_AVERAGE#

Retrieves power usage for this GPU in milliwatts.

It is only available if power management mode is supported. See nvmlDeviceGetPowerManagementMode and nvmlDeviceGetPowerUsage.

scopeId needs to be specified. It signifies: 0 - GPU Only Scope - Metrics for GPU are retrieved 1 - Module scope - Metrics for the module (e.g. CPU + GPU) are retrieved. 2 - GPU base scope - GPU base Power metrics are retrieved. Note: Only supports _MIN_LIMIT, _MAX_LIMIT, _DEFAULT_LIMIT, and _CURRENT_LIMIT fields. Note: CPU here refers to NVIDIA CPU (e.g. Grace). x86 or non-NVIDIA ARM is not supported GPU power averaged over 1 sec interval, supported on Ampere (except GA100) or newer architectures.

NVML_FI_DEV_POWER_CURRENT_LIMIT#: Limit currently enforced in milliwatts (This includes other limits set elsewhere. E.g. Out-of-band).

NVML_FI_DEV_POWER_DEFAULT_LIMIT#: Default power limit in milliwatts (limit which device boots with).

NVML_FI_DEV_POWER_INSTANT#: Current GPU power, supported on all architectures.

NVML_FI_DEV_POWER_MAX_LIMIT#: Maximum power limit in milliwatts.

NVML_FI_DEV_POWER_MIN_LIMIT#: Minimum power limit in milliwatts.

NVML_FI_DEV_POWER_REQUESTED_LIMIT#: Power limit requested by NVML or any other userspace client.

NVML_FI_DEV_POWER_SYNC_BALANCING_AF#: Accumulated activity factor of the GPU to be used for averaging.

NVML_FI_DEV_POWER_SYNC_BALANCING_FREQ#: Accumulated frequency of the GPU to be used for averaging.

NVML_FI_DEV_REMAPPED_COR#: Number of remapped rows due to correctable errors.

NVML_FI_DEV_REMAPPED_FAILURE#: If any rows failed to be remapped 1=yes 0=no.

NVML_FI_DEV_REMAPPED_PENDING#: If any rows are pending remapping. 1=yes 0=no.

NVML_FI_DEV_REMAPPED_ROWS_COR_INACTIVE#: Number of inactive row remappings due to correctable errors.

NVML_FI_DEV_REMAPPED_ROWS_UNC_INACTIVE#: Number of inactive row remappings due to uncorrectable errors.

NVML_FI_DEV_REMAPPED_UNC#: Number of remapped rows due to uncorrectable errors.

NVML_FI_DEV_RESET_STATUS#: Depracated, do not use (use NVML_FI_DEV_GET_GPU_RECOVERY_ACTION instead)

NVML_FI_DEV_RETIRED_DBE#: Number of retired pages because of double bit errors.

NVML_FI_DEV_RETIRED_PENDING#: If any pages are pending retirement. 1=yes. 0=no.

NVML_FI_DEV_RETIRED_PENDING_DBE#: If any pages are pending retirement due to DBE. 1=yes. 0=no.

NVML_FI_DEV_RETIRED_PENDING_SBE#: If any pages are pending retirement due to SBE. 1=yes. 0=no.

NVML_FI_DEV_RETIRED_SBE#: Number of retired pages because of single bit errors.

NVML_FI_DEV_TEMPERATURE_GPU_MAX_TLIMIT#: T.Limit temperature after which GPU may be throttled below base clock.

NVML_FI_DEV_TEMPERATURE_MEM_MAX_TLIMIT#: T.Limit temperature after which GPU may begin SW slowdown due to memory temperature.

NVML_FI_DEV_TEMPERATURE_SHUTDOWN_TLIMIT#

GPU T.Limit temperature thresholds in degree Celsius.

These fields are supported on Ada and later architectures and supersedes nvmlDeviceGetTemperatureThreshold. T.Limit temperature after which GPU may shut down for HW protection

NVML_FI_DEV_TEMPERATURE_SLOWDOWN_TLIMIT#: T.Limit temperature after which GPU may begin HW slowdown.

NVML_FI_DEV_TOTAL_ENERGY_CONSUMPTION#: Total energy consumption for the GPU in mJ since the driver was last reloaded.

NVML_FI_MAX#: One greater than the largest field ID defined above.

NVML_FI_PWR_SMOOTHING_ACTIVE_PRESET_PROFILE#: Active preset profile number.

NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PERCENT_TMP_FLOOR#: % TMP floor for a given profile

NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PRIMARY_FLOOR_ACT_OFFSET#

Current primary floor activation offset value in Watts for admin override.

If the target moving average falls below the secondary floor plus this offset, the primary floor will be activated.

NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PRIMARY_FLOOR_ACT_WIN_MULT#

Current primary floor activation window multiplier value for admin override.

This is the “X” ms time multiplier for the activation moving average window size. The activation moving average is compared against the (secondary floor + primary floor activation offset value) to determine if the controller should switch from the secondary floor to the primary floor. Setting this to 0 will disable switching to the secondary floor.

NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PRIMARY_FLOOR_TAR_WIN_MULT#

Current primary floor target window multiplier value for admin override.

This is the “X” ms time multiplier for the target moving average window size. When set to non-zero value, the target moving average power determines the primary floor. When set to 0, driver will use the Floor percentage instead to derive the primary floor.

NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_DOWN_HYST_VAL#: Ramp down hysteresis value in ms for a given profile.

NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_DOWN_RATE#: Ramp down rate in mW/s for a given profile.

NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_UP_RATE#: Ramp up rate in mW/s for a given profile.

NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_SECONDARY_POWER_FLOOR#

Current secondary power floor value in Watts for admin override.

This is the power floor that will be applied during active workload periods on the GPU when primary floor activation window multiplier is set to a non-zero value.

NVML_FI_PWR_SMOOTHING_APPLIED_TMP_CEIL#: Applied TMP ceiling value in Watts.

NVML_FI_PWR_SMOOTHING_APPLIED_TMP_FLOOR#: Applied TMP floor value in Watts.

NVML_FI_PWR_SMOOTHING_DELAYED_PWR_SMOOTHING_SUPPORTED#: Support (0/Not Supported or 1/Supported) for delayed power smoothing.

NVML_FI_PWR_SMOOTHING_ENABLED#: Enablement (0/DISABLED or 1/ENABLED)

NVML_FI_PWR_SMOOTHING_HW_CIRCUITRY_PERCENT_LIFETIME_REMAINING#: HW Circuitry % lifetime remaining.

NVML_FI_PWR_SMOOTHING_IMM_RAMP_DOWN_ENABLED#: Immediate ramp down enablement (0/DISABLED or 1/ENABLED)

NVML_FI_PWR_SMOOTHING_MAX_NUM_PRESET_PROFILES#: Max number of preset profiles.

NVML_FI_PWR_SMOOTHING_MAX_PERCENT_TMP_FLOOR_SETTING#: Max % TMP Floor value.

NVML_FI_PWR_SMOOTHING_MIN_PERCENT_TMP_FLOOR_SETTING#: Min % TMP Floor value.

NVML_FI_PWR_SMOOTHING_MIN_PRIMARY_FLOOR_ACT_OFFSET#

Minimum primary floor activation offset value in Watts.

This is the minimum primary floor activation offset accepted by the driver specified in Watts. This is a static field.

NVML_FI_PWR_SMOOTHING_MIN_PRIMARY_FLOOR_ACT_POINT#

Minimum primary floor activation point value in Watts.

This is the minimum absolute raw value specified in Watts that the driver will use for switching between primary and secondary floor. This point is calculated as “secondary power floor +

primary floor activation offset”, and then computed value is floored to “min primary floor

activation point” by the driver at run time. This value is used to avoid setting of switch point too low accidentally.

NVML_FI_PWR_SMOOTHING_PRIMARY_POWER_FLOOR#

Current primary power floor value in Watts.

This value is calculated by doing “TMP ceiling value * (% TMP floor value)”.

NVML_FI_PWR_SMOOTHING_PRIV_LVL#: Current privilege level.

NVML_FI_PWR_SMOOTHING_PROFILE_PERCENT_TMP_FLOOR#: % TMP floor for a given profile

NVML_FI_PWR_SMOOTHING_PROFILE_PRIMARY_FLOOR_ACT_OFFSET#

Current primary floor activation offset value in Watts for a given profile.

If the target moving average falls below the secondary floor plus this offset, the primary floor will be activated.

NVML_FI_PWR_SMOOTHING_PROFILE_PRIMARY_FLOOR_ACT_WIN_MULT#

Current primary floor activation window multiplier value for a given profile.

This is the “X” ms time multiplier for the activation moving average window size. The activation moving average is compared against the (secondary floor + primary floor activation offset value) to determine if the controller should switch from the secondary floor to the primary floor. Setting this to 0 will disable switching to the secondary floor.

NVML_FI_PWR_SMOOTHING_PROFILE_PRIMARY_FLOOR_TAR_WIN_MULT#

Current primary floor target window multiplier value for a given profile.

This is the “X” ms time multiplier for the target moving average window size. When set to non-zero value, the target moving average power determines the primary floor. When set to 0, driver will use the Floor percentage instead to derive the primary floor.

NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_DOWN_HYST_VAL#: Ramp down hysteresis value in ms for a given profile.

NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_DOWN_RATE#: Ramp down rate in mW/s for a given profile.

NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_UP_RATE#: Ramp up rate in mW/s for a given profile.

NVML_FI_PWR_SMOOTHING_PROFILE_SECONDARY_POWER_FLOOR#

Current secondary power floor value in Watts for a given profile.

This is the power floor that will be applied during active workload periods on the GPU when primary floor activation window multiplier is set to a non-zero value.

NVML_FI_PWR_SMOOTHING_SECONDARY_POWER_FLOOR#

Current secondary power floor value in Watts.

This is the power floor that is applied during active workload periods on the GPU when primary floor activation window multiplier is set to a non-zero value.

NVML_FI_PWR_SMOOTHING_SOC_POWER_SMOOTHING_ENABLED#: State-Of-Charge Power Smoothing Enabled (0/DISABLED or 1/ENABLED)

NVML_FI_PWR_SMOOTHING_WINDOW_MULTIPLIER#

Window Multiplier value in ms.

This is the multiplier unit specified in ms for other multipliers in the profile (primary floor activation window multiplier and primary floor target window multiplier). This is a static field.

NVML_MCLK_SWITCH_TYPE_DEFERRED#: deferred switching (driver reload)

NVML_MCLK_SWITCH_TYPE_NOT_SUPPORTED#

NVML_FI_DEV_MCLK_SWITCH_TYPE enumerations.

switching is not supported

NVML_MCLK_SWITCH_TYPE_RUNTIME#: runtime switching

NVML_NVLINK_LOW_POWER_THRESHOLD_DEFAULT#

NVML_NVLINK_LOW_POWER_THRESHOLD_MAX#

NVML_NVLINK_LOW_POWER_THRESHOLD_MIN#

NVML_NVLINK_LOW_POWER_THRESHOLD_RESET#

NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_100US#: NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS.

NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_50US#

NVML_NVLINK_POWER_STATE_HIGH_SPEED#: NVML_NVLINK_POWER_STATES.

NVML_NVLINK_POWER_STATE_LOW#