NVIDIA DRIVE OS Linux API Reference

5.1.3.0 Release

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Memory Management Operations

Detailed Description

Declares the Quickboot memory management operations performed by the memory management unit (MMU).

Quickboot enables both L1 and L2 data and instruction cache for performance, depending on the configuration options. The cache remains enabled, and it is the device drivers' responsibility to handle the cache using the cache management APIs provided by Quickboot.

Memory management also handles virtual to physical address translation. A physical address (PA) is 48 bits long. A virtual address (VA) is 34 bits long; it is stored in the least significant 34 bits of a 48-bit location. The most significant 14 bits are ignored.

Memory management translates a VA to a PA address by applying three indexes derived from the VA (L1index, L2index, and L3index) to three address translation tables (L1, L2, and L3).

Each entry in an address translation table (ATT) is 64 bits long. Bit 0 indicates whether the entry is valid (1) or invalid (0). If the entry is valid, bit 1 indicates whether it is a block or page descriptor (0) or a table descriptor (1). In a block or page descriptor, the remaining bits specify the output address (OA), that is the base address of a block or page of physical memory, the memory attributes of the block or page, and other properties. In a table descriptor, the remaining bits specify the base address of the next ATT (in an L1 entry the address of L2; in an L2 entry the address of L3).

The translation process is:

  1. If L1index (VA bits 30-33, 4 bits) references a valid entry in L1, then:
    • If the entry is a block descriptor, extract the OA (18 bits) and append to it the page address (VA bits 0-29, 30 bits). This yields a PA within a 1 GB block of physical memory.
    • If the entry is a table descriptor, proceed to the next step.
  2. The table descriptor from L1 provides the address of L2. If L2index (VA bits 21-29, 9 bits) references a valid entry in L2, then:
    • If the entry is a block descriptor, extract the OA (27 bits) and append to it the page address (VA bits 0-20, 21 bits). This yields a PA within a 2 MB block of physical memory.
    • If the entry is a table descriptor, proceed to the next step.
  3. The table descriptor from L2 provides the address of L3. If L3index (VA bits 12-20, 9 bits) references a valid entry in L3, then:
    • If the entry is a page descriptor, extract the OA (36 bits) and append to it the page address (VA bits 0-11, 12 bits). This yields PA within a 4 KB page of physical memory.
    • If the entry is a table descriptor, the translation process raises a translation fault.

If any step in the translation process references an invalid ATT entry, or if the translation process does not find a block or page descriptor, the process raises a translation fault.

Functions

void QbDataCacheWritebackInvalidateRange (const void *const pStart, NvU32 TotalLength)
 Writes back a region of the data cache to main memory, then invalidates the region. More...
 
void QbDataCacheWritebackRange (const void *const pStart, NvU32 TotalLength)
 Writes back a region of the data cache to main memory. More...
 
void QbDataCacheWriteback (void)
 Writes back the entire data cache to main memory, then invalidates the cache. More...
 
void QbDataCacheWritebackInvalidate (void)
 Writes back the entire data cache to main memory. More...
 
void QbDataCacheDisableWritebackInvalidate (void)
 Disables data cache. More...
 
void QbDataCacheInvalidateRange (const void *const pStart, NvU32 TotalLength)
 Invalidates a region of the data cache. More...
 
void QbInstrCacheInvalidate (void)
 Invalidates instruction cache. More...
 
void QbInstrCacheInvalidateRange (const void *const pStart, NvU32 TotalLength)
 Invalidates a region of the instruction cache. More...
 
void QbFlushWriteCombineBuffer (void)
 Drains the write bufffer. More...
 
void QbEnableDataCache (void)
 QbEnableDataCache() More...
 
void QbDisableDataCache (void)
 Disables data caches. More...
 
void QbInitInstructionCache (void)
 
void QbEnableInstructionCache (void)
 IMPORTANT: This function gets called very early when bss is not initialized. More...
 
void QbDisableInstructionCache (void)
 Disables instruction caches. More...
 
void QbInvalidateTLB (void)
 Invalidates TLB for EL2. More...
 
void QbInvalidateCaches (void)
 
void * QbMalloc (NvU32 bytes)
 Allocates memory dynamically. More...
 
void * QbMallocAlign (NvU32 bytes, NvU32 align)
 Allocates aligned memory dynamically. More...
 
void * QbUnCachedMallocAlign (NvU32 bytes, NvU32 align)
 Allocates aligned uncached memory dynamically. More...
 
void QbFree (void *ptr)
 Frees memory previously allocated using QbMalloc. More...
 
void QbUnCachedFree (void *ptr)
 Frees memory previously allocated using QbUnCachedMallocAlign This API is similar to free calls provided by libc. More...
 
NvError QbAddAndMapRegion (struct QbMemoryMap MapEntry)
 Adds new mapping to the MMU and updates the global mapping table with the new mappings. More...
 
void QbPerformPageWalk (void)
 Performs page walk and prints page tables. More...
 
NvU64 QbGetTextPhyOffset (void)
 Gets the physical offset (LinkAddr - LoadAddr) of Quickboot text section. More...
 
NvU64 QbGetDataPhyOffset (void)
 Gets the physical offset (LinkAddr - LoadAddr) of Quickboot Data section. More...
 
NvUPtr QbVirtToPhy (NvUPtr Addr)
 Returns the physical address of a given virtual address. More...
 
NvUPtr QbPhyToVirt (NvUPtr Addr)
 Returns the virtual address of the given physical address. More...
 
void QbMapMemBasic (void)
 Initializes the MMU, creates page tables as per s_g_MemoryMap. More...
 
void QbMapSysCfg (void)
 Creates mapping for sysinfo, syscfg. More...
 
void QbKernelHandOff (NvU64 KernelStartAddr, NvU64 DtbAddr, NvU64 TextLoadOffset, NvU64 DataLoadOffset)
 Disables the MMU, I-Cache, Invalidates I-Cache, TLBs Jumps to Kernel. More...
 
void QbInitMMU (void)
 
void QbDisableMMU (void)
 

Function Documentation

NvError QbAddAndMapRegion ( struct QbMemoryMap  MapEntry)

Adds new mapping to the MMU and updates the global mapping table with the new mappings.

Parameters
MapEntryEntry for the desired mapping.
Returns
NvSuccess if successful, or the appropriate error code.
void QbDataCacheDisableWritebackInvalidate ( void  )

Disables data cache.

Then, writes back and invalidates the L1 and L2 data lines.

void QbDataCacheInvalidateRange ( const void *const  pStart,
NvU32  TotalLength 
)

Invalidates a region of the data cache.

After this function is called, the region cannot be used for write operations.

Parameters
pStartA pointer to the start of the region to invalidate.
TotalLengthLength of region in bytes.
void QbDataCacheWriteback ( void  )

Writes back the entire data cache to main memory, then invalidates the cache.

void QbDataCacheWritebackInvalidate ( void  )

Writes back the entire data cache to main memory.

void QbDataCacheWritebackInvalidateRange ( const void *const  pStart,
NvU32  TotalLength 
)

Writes back a region of the data cache to main memory, then invalidates the region.

Parameters
pStartA pointer to the start of the region to write-back and invalidate.
TotalLengthLength of the region in bytes.
void QbDataCacheWritebackRange ( const void *const  pStart,
NvU32  TotalLength 
)

Writes back a region of the data cache to main memory.

Parameters
pStartA pointer to the start of the region to write-back.
TotalLengthLength of the region in bytes.
void QbDisableDataCache ( void  )

Disables data caches.

void QbDisableInstructionCache ( void  )

Disables instruction caches.

void QbDisableMMU ( void  )
void QbEnableDataCache ( void  )

QbEnableDataCache()

Enables data caches.

void QbEnableInstructionCache ( void  )

IMPORTANT: This function gets called very early when bss is not initialized.

So do not use any static variables here.

Note: We assume that instruction cache is already invalidated.

void QbFlushWriteCombineBuffer ( void  )

Drains the write bufffer.

void QbFree ( void *  ptr)

Frees memory previously allocated using QbMalloc.

This API is similar to free calls provided by libc.

Parameters
ptrA pointer to memory allocated using QbMalloc.
NvU64 QbGetDataPhyOffset ( void  )

Gets the physical offset (LinkAddr - LoadAddr) of Quickboot Data section.

NvU64 QbGetTextPhyOffset ( void  )

Gets the physical offset (LinkAddr - LoadAddr) of Quickboot text section.

void QbInitInstructionCache ( void  )
void QbInitMMU ( void  )
void QbInstrCacheInvalidate ( void  )

Invalidates instruction cache.

void QbInstrCacheInvalidateRange ( const void *const  pStart,
NvU32  TotalLength 
)

Invalidates a region of the instruction cache.

Parameters
pStartA pointer to the start of the region to invalidate.
TotalLengthLength of region to invalidate.
void QbInvalidateCaches ( void  )
void QbInvalidateTLB ( void  )

Invalidates TLB for EL2.

void QbKernelHandOff ( NvU64  KernelStartAddr,
NvU64  DtbAddr,
NvU64  TextLoadOffset,
NvU64  DataLoadOffset 
)

Disables the MMU, I-Cache, Invalidates I-Cache, TLBs Jumps to Kernel.

Parameters
KernelStartAddrOS/Hypervisor start address.
DtbAddrAddress of guest DTB.
TextLoadOffsetLoad offset of text.
DataLoadOffsetLoad offset of data.
void* QbMalloc ( NvU32  bytes)

Allocates memory dynamically.

This function is similar to malloc provided by libc.

Parameters
bytesSize of memory requested for allocation.
Returns
A pointer to the memory allocated if successful, or NULL otherwise.
void* QbMallocAlign ( NvU32  bytes,
NvU32  align 
)

Allocates aligned memory dynamically.

Parameters
bytesSize of memory requested for allocation.
alignSpecifies the alignment of the requested memory.
Returns
A pointer to the memory allocated if successful, or NULL otherwise.
void QbMapMemBasic ( void  )

Initializes the MMU, creates page tables as per s_g_MemoryMap.

Enabling the MMU is done outside this function.

void QbMapSysCfg ( void  )

Creates mapping for sysinfo, syscfg.

void QbPerformPageWalk ( void  )

Performs page walk and prints page tables.

NvUPtr QbPhyToVirt ( NvUPtr  Addr)

Returns the virtual address of the given physical address.

Parameters
AddrThe physcial address.
Returns
The virtual address for the given physical address if successful, or ~0 if the physical address is invalid.
void QbUnCachedFree ( void *  ptr)

Frees memory previously allocated using QbUnCachedMallocAlign This API is similar to free calls provided by libc.

Parameters
ptrA pointer to memory allocated using QbUnCachedMallocAlign
void* QbUnCachedMallocAlign ( NvU32  bytes,
NvU32  align 
)

Allocates aligned uncached memory dynamically.

Parameters
bytesSize of memory requested for allocation.
alignSpecifies the alignment of the requested memory.
Returns
A pointer to the uncached memory allocated if successful, or NULL otherwise.
NvUPtr QbVirtToPhy ( NvUPtr  Addr)

Returns the physical address of a given virtual address.

Parameters
AddrThe virtual address.
Returns
The physical address for the given virtual address if successful, or ~0 if the virtual address is invalid.