NVIDIA DRIVE OS Linux API Reference

5.1.3.0 Release

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QSPI Access

Detailed Description

Declares the APIs for Quickboot accessing QSPI.

Data Structures

struct  QspiTransfer
 Holds QSPI Transfer data. More...
 
struct  QspiControllerData
 Holds QSPI hardware controller context data. More...
 

Macros

#define DEBUG_QSPI   0
 
#define PRINT_QSPI_DBG_MESSAGES(...)
 
#define PRINT_QSPI_REG_ACCESS(...)
 
#define QSPI_CONTROLLERS_MAX   1
 
#define QSPI_MAX_BIT_LENGTH   31
 
#define QSPI_8Bit_BIT_LENGTH   7
 
#define QSPI_FIFO_DEPTH   64
 
#define BYTES_PER_WORD   4
 
#define QSPI_HW_TIMEOUT   100000
 Defines the read time-out, in milliseconds. More...
 
#define FLUSHFIFO_TIMEOUT   10000 /* 10000 x 10us = 100ms */
 
#define MAX_QSPI_XFERSIZE   (256 * MB)
 
#define QSPI_REG_READ32(reg, Instance)   NV_READ32(pg_QspiContext[Instance]->BaseAddr + (QSPI_##reg##_0))
 
#define QSPI_REG_WRITE32(reg, val, Instance)   NV_WRITE32((pg_QspiContext[Instance]->BaseAddr + (QSPI_##reg##_0)), (val))
 
#define QSPI_REG_WRITE32_FLUSH(reg, val, Instance)
 

Typedefs

typedef struct QspiTransfer QspiTransfer
 Holds QSPI Transfer data. More...
 

Enumerations

enum  QspiBusWidth {
  QSPI_BUS_WIDTH_X1,
  QSPI_BUS_WIDTH_X2,
  QSPI_BUS_WIDTH_X4
}
 Defines the QSPI bus widths. More...
 
enum  NvQspiChipSelect {
  ACTIVE_LOW = 0,
  ACTIVE_HIGH
}
 Defines the QSPI chip selection. More...
 
enum  QspiXferType_t {
  SYNC,
  ASYNC
}
 Defines the transfer types. More...
 
enum  QspiOpMode_t {
  SDR_MODE = 0,
  DDR_MODE
}
 Defines the QSPI controller and Flash chip operating mode. More...
 

Functions

NvError NvQspiInit (void *pdata)
 Initializes the specified QSPI controller. More...
 
NvError QspiHwProcReadAsyncWaitDMAComplete (NvU32 Instance)
 Waits until the IO from the DMA is complete. More...
 
NvError NvQspiTransaction (QspiTransfer *Transfers, NvU8 Numoftransfers, NvU32 Instance)
 Performs QSPI transactions for write and read. More...
 

Variables

QspiControllerDatapg_QspiContext [QSPI_CONTROLLERS_MAX]
 

Macro Definition Documentation

#define BYTES_PER_WORD   4

Definition at line 61 of file qspi.h.

#define DEBUG_QSPI   0

Definition at line 36 of file qspi.h.

#define FLUSHFIFO_TIMEOUT   10000 /* 10000 x 10us = 100ms */

Definition at line 67 of file qspi.h.

#define MAX_QSPI_XFERSIZE   (256 * MB)

Definition at line 73 of file qspi.h.

#define PRINT_QSPI_DBG_MESSAGES (   ...)

Definition at line 41 of file qspi.h.

#define PRINT_QSPI_REG_ACCESS (   ...)

Definition at line 42 of file qspi.h.

#define QSPI_8Bit_BIT_LENGTH   7

Definition at line 59 of file qspi.h.

#define QSPI_CONTROLLERS_MAX   1

Definition at line 48 of file qspi.h.

#define QSPI_FIFO_DEPTH   64

Definition at line 60 of file qspi.h.

#define QSPI_HW_TIMEOUT   100000

Defines the read time-out, in milliseconds.

Definition at line 64 of file qspi.h.

#define QSPI_MAX_BIT_LENGTH   31

Definition at line 58 of file qspi.h.

#define QSPI_REG_READ32 (   reg,
  Instance 
)    NV_READ32(pg_QspiContext[Instance]->BaseAddr + (QSPI_##reg##_0))

Definition at line 77 of file qspi.h.

#define QSPI_REG_WRITE32 (   reg,
  val,
  Instance 
)    NV_WRITE32((pg_QspiContext[Instance]->BaseAddr + (QSPI_##reg##_0)), (val))

Definition at line 80 of file qspi.h.

#define QSPI_REG_WRITE32_FLUSH (   reg,
  val,
  Instance 
)
Value:
{ \
NV_WRITE32_FENCE((pg_QspiContext[Instance]->BaseAddr + \
(QSPI_##reg##_0)), (val)); \
}
QspiControllerData * pg_QspiContext[QSPI_CONTROLLERS_MAX]

Definition at line 84 of file qspi.h.

Typedef Documentation

typedef struct QspiTransfer QspiTransfer

Holds QSPI Transfer data.

The message consists of multiple transfers.

Enumeration Type Documentation

Defines the QSPI chip selection.

Enumerator
ACTIVE_LOW 
ACTIVE_HIGH 

Definition at line 91 of file qspi.h.

Defines the QSPI bus widths.

Enumerator
QSPI_BUS_WIDTH_X1 
QSPI_BUS_WIDTH_X2 
QSPI_BUS_WIDTH_X4 

Definition at line 52 of file qspi.h.

Defines the QSPI controller and Flash chip operating mode.

Enumerator
SDR_MODE 

0 [IO on single edge of clock]

DDR_MODE 

1 [IO on rising and falling edge of clock]

Definition at line 106 of file qspi.h.

Defines the transfer types.

Enumerator
SYNC 

=0

ASYNC 

=1

Definition at line 98 of file qspi.h.

Function Documentation

NvError NvQspiInit ( void *  pdata)

Initializes the specified QSPI controller.

Parameters
[in]pdataA pointer to the QSPI controller platform data gotten from board file.
Returns
NvError_Success Initialization is successful.
NvError NvQspiTransaction ( QspiTransfer Transfers,
NvU8  Numoftransfers,
NvU32  Instance 
)

Performs QSPI transactions for write and read.

Parameters
TransfersA pointer to an array of qspi transfers. Each message consists of multiple transfers. For QSPI Flash - <CMD><ADDRESS><DATA>.
NumoftransfersNumber of transfers.
InstanceQSPI Controller Instance.
Return values
NvError_SuccessNo Error
NvError QspiHwProcReadAsyncWaitDMAComplete ( NvU32  Instance)

Waits until the IO from the DMA is complete.

Parameters
InstanceQspi Controller Instance.
Nv_Qspi1, ... Nv_Qspi6
Returns
NvError_Success Initialization is successful.

Variable Documentation