NVIDIA DRIVE OS Linux API Reference

5.1.3.0 Release

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sdmmc.h File Reference

Detailed Description

NVIDIA Quickboot Interface: SDMMC Context (Parker)

Description: This file declares an SDMMC context structure.

Definition in file sdmmc.h.

Go to the source code of this file.

Data Structures

struct  QbSdmmcInfo
 Defines platform data for the SDMMC registration. More...
 
struct  QbSdmmcDriverPrivInfo
 Holds the context structure for the SDMMC driver. More...
 

Macros

#define MAX_SDMMC_INSTANCE   4
 
#define SDMMC_COMMAND_TIMEOUT_IN_US   100000
 Defines maximum timeout for a command complete. More...
 
#define SDMMC_OP_COND_TIMEOUT_IN_US   1000000
 Defines maximum timeout for operation condition (CMD1) response. More...
 
#define SDMMC_READ_TIMEOUT_IN_US   200000
 Defines maximum timeout for read command operation complete. More...
 
#define SDMMC_TIME_OUT_IN_US   100000
 Defines maximum timeout for eMMC operations. More...
 
#define NVBOOT_SDMMC_RESPONSE_BUFFER_SIZE_IN_BYTES   16
 Defines the SDMMC response buffer size. More...
 
#define NVBOOT_SDMMC_ECSD_BUFFER_SIZE_IN_BYTES   512
 Defines the buffer size for reading extended CSD. More...
 
#define NVBOOT_SDMMC_BOOT_MODE_BUFFER_SIZE_IN_BYTES   512
 Defines the buffer size for reading data in boot mode. More...
 
#define DEBUG_SDMMC   0
 

Enumerations

enum  SdmmcResponseType {
  SdmmcResponseType_NoResponse = 0,
  SdmmcResponseType_R1 = 1,
  SdmmcResponseType_R2 =2,
  SdmmcResponseType_R3 =3,
  SdmmcResponseType_R4 = 4,
  SdmmcResponseType_R5 = 5,
  SdmmcResponseType_R6 = 6,
  SdmmcResponseType_R7 = 7,
  SdmmcResponseType_R1B = 8,
  SdmmcResponseType_Num,
  SdmmcResponseType_Force32 = 0x7FFFFFFF
}
 Defines command responses for eMMC/ESD. More...
 
enum  SdmmcCommand {
  SdmmcCommand_GoIdleState = 0,
  SdmmcCommand_EmmcSendOperatingConditions = 1,
  SdmmcCommand_AllSendCid = 2,
  SdmmcCommand_EmmcSetRelativeAddress = 3,
  SdmmcCommand_EsdSendRelativeAddress = 3,
  SdmmcCommand_Switch = 6,
  SdmmcCommand_SelectDeselectCard = 7,
  SdmmcCommand_EsdSendInterfaceCondition = 8,
  SdmmcCommand_EmmcSendExtendedCsd = 8,
  SdmmcCommand_SendCsd = 9,
  SdmmcCommand_StopTransmission =12,
  SdmmcCommand_SendStatus = 13,
  SdmmcCommand_SetBlockLength = 16,
  SdmmcCommand_ReadSingle = 17,
  SdmmcCommand_ReadMultiple = 18,
  SdmmcCommand_SetBlockCount = 23,
  SdmmcCommand_WriteSingle = 24,
  SdmmcCommand_WriteMultiple = 25,
  SdmmcCommand_EsdAppSendOperatingCondition = 41,
  SdmmcCommand_EsdSelectPartition = 43,
  SdmmcCommand_EsdAppSendScr = 51,
  SdmmcCommand_EsdAppCommand = 55,
  SdmmcCommand_Force32 = 0x7FFFFFFF
}
 Defines eMMC/ESD commands as per eMMC/ESD specifications. More...
 
enum  SdmmcState {
  SdmmcState_Idle = 0,
  SdmmcState_Ready,
  SdmmcState_Ident,
  SdmmcState_Stby,
  SdmmcState_Tran,
  SdmmcState_Data,
  SdmmcState_Rcv,
  SdmmcState_Prg,
  SdmmcState_Force32 = 0x7FFFFFFF
}
 Defines eMMC/ESD card states. More...
 
enum  SdmmcAccessRegion {
  SdmmcAccessRegion_UserArea = 0,
  SdmmcAccessRegion_BootPartition1,
  SdmmcAccessRegion_BootPartition2,
  SdmmcAccessRegion_Num,
  SdmmcAccessRegion_Unknown,
  SdmmcAccessRegion_Force32 = 0x7FFFFFFF
}
 Defines eMMC card partitions. More...
 
enum  NvBootSdmmcCardType {
  NvBootSdmmcCardType_Emmc = 0,
  NvBootSdmmcCardType_Esd,
  NvBootSdmmcCardType_Num,
  NvBootSdmmcCardType_Force32 = 0x7FFFFFFF
}
 Defines the supported card types. More...
 
enum  NvBootSdmmcCardClock {
  NvBootSdmmcCardClock_Identification = 0,
  NvBootSdmmcCardClock_DataTransfer_SDR20,
  NvBootSdmmcCardClock_DataTransfer_HS50,
  NvBootSdmmcCardClock_DataTransfer_DDR50,
  NvBootSdmmcCardClock_DataTransfer_HS400,
  NvBootSdmmcCardClock_Num,
  NvBootSdmmcCardClock_Force32 = 0x7FFFFFFF
}
 Defines various clock rates to use for accessing the eMMC/ESD card. More...
 
enum  SdmmcInitLevel {
  SdmmcInit_All = 0,
  SdmmcInit_CMD0n1,
  SdmmcInit_InitSkipCMD0,
  SdmmcInit_InitSkipIdentification
}
 Defines various initialization optimization options. More...
 

Functions

NvS32 QbSdmmcInit (void)
 
NvError QbSdmmcRead (QbDriver DriverType, NvU32 Instance, void *Buffer, NvU64 Size, NvU64 Offset)
 
void QbSdmmcDumpTegraRegs (NvU32 RegBase)
 
void QbSddmmcPrintInterruptStatus (NvU32 InterruptStatus)