NVIDIA DRIVE OS Linux API Reference

5.1.3.0 Release

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spi_slave.h
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1 /*
2  * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
3  *
4  * NVIDIA CORPORATION and its licensors retain all intellectual property
5  * and proprietary rights in and to this software, related documentation
6  * and any modifications thereto. Any use, reproduction, disclosure or
7  * distribution of this software and related documentation without an express
8  * license agreement from NVIDIA CORPORATION is strictly prohibited.
9  */
10 
11 #ifndef _QB_SPI_SLAVE_H_
12 #define _QB_SPI_SLAVE_H_
13 
21 #include <nvcommon.h>
22 #include <nverror.h>
23 
32 #define QB_SPI_SLAVE_ARM 0
34 #define QB_SPI_SLAVE_XFER_COMPLETE 1
36 #define QB_SPI_SLAVE_UNARM 2
38 #define QB_SPI_SLAVE_REG_DUMP 3
40 #define QB_SPI_SLAVE_RESET 4
42 
45 #define QB_PIO_DMA_TRANSFER_LIMIT_RX 32
46 #define QB_PIO_DMA_TRANSFER_LIMIT_TX 8
47 #define MAX_SPI_SLAVE_XFERSIZE 65536
49 #define QB_SPI_SLAVE_MAX_INSTANCES 4
51 
53 #define FLUSH_FIFO_TIMEOUT 1000
54 
55 #define DATA_DIR_TX 0
56 #define DATA_DIR_RX 1
57 
62 {
70 
75 {
81  QbSpiSlaveCS_Force32 = 0x7fffffff
83 
88 {
94 
98 typedef enum QbSpiSlaveModeRec
99 {
107 
113 {
123  NvU32 DmaChannel;
133 };
134 
139 {
141  NvU32 RegPhyBase;
143  NvU32 RegLen;
145  NvU32 RegVirtBase;
151  NvU32 ResetID;
154 };
155 
160 {
167 };
168 
172 NvError QbSpiSlaveInit(void);
173 
175 #endif // _QB_SPI_SLAVE_H_
enum QbSpiSlaveModeRec QbSpiSlaveMode
Defines the SPI modes.
NvU32 RequestLength
Holds the number of bytes requested to be transferred.
Definition: spi_slave.h:166
NvU32 SlaveArmTimeout
Holds the timeout value in miliseconds for arm operation.
Definition: spi_slave.h:132
QbSpiSlaveCSPolarity ChipSelectPolarity
Holds the chip select polarity.
Definition: spi_slave.h:119
QbSpiSlaveCSPolarityRec
Defines the polarity for SPI chip select.
Definition: spi_slave.h:87
QbSpiSlaveMode Mode
Holds the SPI mode.
Definition: spi_slave.h:121
QbSpiSlaveInstance Instance
Holds the SPI instance.
Definition: spi_slave.h:115
enum QbSpiSlaveCSPolarityRec QbSpiSlaveCSPolarity
Defines the polarity for SPI chip select.
struct QbSpiSlaveControllerInfo * DevInfo
Holds SPI slave controller info.
Definition: spi_slave.h:153
enum QbSpiSlaveChipSelectRec QbSpiSlaveChipSelect
Defines the SPI chip select.
NvU32 GpcDmaClientID
Holds the GPCDMA client ID.
Definition: spi_slave.h:147
NvU32 SlaveReadyGpioPolarity
Holds the slave-ready GPIO polarity.
Definition: spi_slave.h:129
NvU8 * pDataRxBuffer
Holds the buffer for Rx transfer.
Definition: spi_slave.h:162
Holds the SPI controller specific information.
Definition: spi_slave.h:112
NvError
The NvError enumeration contains ALL return / error codes.
Definition: nverror.h:36
enum QbSpiSlaveInstanceRec QbSpiSlaveInstance
Defines the SPI controller instance.
QbSpiSlaveChipSelectRec
Defines the SPI chip select.
Definition: spi_slave.h:74
NvU32 DmaChannel
Holds the DMA channel information.
Definition: spi_slave.h:123
Holds private information for SPI slave driver.
Definition: spi_slave.h:138
NvU32 XferInProgress
Holds weather a transfer is in progress for this instance.
Definition: spi_slave.h:149
QbSpiSlaveChipSelect ChipSelect
Holds the chip select.
Definition: spi_slave.h:117
NvError QbSpiSlaveInit(void)
Registers the SPI slave driver to the driver framework.
Holds data for SPI slave transfers.
Definition: spi_slave.h:159
NVIDIA Quickboot Interface: Error Handling (Parker)
NvU32 SlaveReadyGpioPin
Holds the slave-ready GPIO pin.
Definition: spi_slave.h:127
NvU8 * pDataTxBuffer
Holds the buffer for Tx transfer.
Definition: spi_slave.h:164
NvU32 ResetID
Holds the reset ID.
Definition: spi_slave.h:151
NvU32 SlaveReadyGpioPort
Holds the slave-ready GPIO port.
Definition: spi_slave.h:125
QbSpiSlaveModeRec
Defines the SPI modes.
Definition: spi_slave.h:98
NvU32 RegVirtBase
Holds the virtual address of controller (filled by the driver).
Definition: spi_slave.h:145
QbSpiSlaveInstanceRec
Defines the SPI controller instance.
Definition: spi_slave.h:61
NvU32 RegLen
Holds the register length of the controller (filled by the driver).
Definition: spi_slave.h:143
NvU32 RegPhyBase
Holds the physical address of controller (filled by the driver).
Definition: spi_slave.h:141