Secure PMC Scratch Register Configurations for BootROM
Note: | In Jetson TX1/TX2 devices, for the cold boot path for L1 and L2, it may be required to program I2C and MMIO commands to bring PMIC rails to OTP values. |
Typical L1 and L2 reset levels are as follows:
Reset Cause | Reset Level | Context Preservation Required | Trigger New Reset Event? |
Cold Power On | L0 | No | No |
Fifth WDT expiration | L1 | No | Yes, Trigger L0 BR |
Sensor/AO tag | L1 | No | Yes, trigger shut down from boot ROM |
VF Sensor | L1 | No | No |
SW_MAIN | L1 | No | Depends on AO scratch setting |
HSM | L1 | AO scratch | Yes, Trigger L0/L1 from MB1 |
Fourth WDT expiration | L2 | DRAM, internal RAM, L1 reset logic | No |
SC7 | Warm | DRAM, AO scratch | No |
SC8 | Warm | AO scratch, AO context | No |
The I2C commands are provided to the boot ROM using AO scratch registers. MB1 device-side code configures these AO scratch registers based on the platform specific information for bootROM reset paths in the MB1 BCT.
• The bootROM requires the data on AO secure scratch registers.
• The reset cases where the bootROM issues these commands includes:
• Watchdog 5 expiry
• Watchdog 4 expiry
• SC7 exit
• SC8 exit
• SW-Reset
• AO-Tag/sensor reset
• VF Sensor
• HSM
• Each reset case can have three sets of AO blocks of commands.
• Each AO block has multiple blocks and each block can have multiple commands.
In the configuration format, AO blocks come first, then all the reset conditions are initialized with the ID of the AO blocks.
Boot ROM commands are prefixed by bootrom. For each reset condition there are three sets of AO blocks, called aocommand.
bootrom.<reset-name>.aocommand[0] = <ao block ID>
bootrom.<reset-name>.aocommand[1] = <ao block ID>
bootrom.<reset-name>.aocommand[2] = <ao block ID>
Absence of aocommand or reset name in configuration data is treated as if there is no command for that reset condition.
AO Block Parameters
Parameters used in AO block configuration data are as follows.
Parameter | Description |
aoblock-count | Specifies the number of AO sets described in the file. |
command-retries-count | Specifies the number of allowed command attempts. |
delay-between-commands-us | Specifies the wait timeout, in microseconds, before issuing the bus clear command. The wait time is calculated as 1 << n microseconds where n is provided by this parameter. |
wait-before-start-bus-clear-us | Specifies the wait time, in microseconds, before issuing the bus clear command. |
block-count | Specifies the number of blocks in the AO block. |
type | Specifies the command type either MMIO or I2C. Use 0 for MMIO and 1 for I2C. |
count | Specifies the number of commands in this block. |
I2C Type-Specific Parameters
The I2C type specific parameters are as follows:
Parameter | Description |
I2c-controller-id | Controller ID of I2C. |
slave-add | 7-bit slave address. |
reg-data-size | Register size in bits: 0 or 8:1 byte 16: 2 byte |
reg-add-size | Register address size in bits: 0 or 8:1 byte 16: 2 byte |
Commands
Commands can be either MMIO or I2C. The information is in the format <address> = <data>, to support the write-only sequence. All commands are indexed, to facilitate multiple commands in a given block. Commands are sent to the device is in sequence, starting from index 0, in the following format
commands[command-index].<addr> = <data>;
All reset conditions support three AO blocks, initialized as follows:
bootrom.<reset-name>.aocommand[0] = <ao block ID>
bootrom.<reset-name>.aocommand[1] = <ao block ID>
bootrom.<reset-name>.aocommand[2] = <ao block ID>
Where <reset_name> is one of the following: watchdog5, watchdog4, sc7, sc8, soft-reset, sensor-aotag, vfsensor, or hsm.
Example
bootrom.aoblock-count = 2;
# Automatic power cycling: Set MAX77620
# Register ONOFFCNFG2, bit SFT_RST_WK = 1 (default is "0" after cold boot),
# Register ONOFFCNFG1, bit SFT_RST = 1
bootrom.aoblock[0].command-retries-count = 1;
bootrom.aoblock[0].delay-between-commands-us = 1;
bootrom.aoblock[0].wait-before-start-bus-clear-us = 1;
bootrom.aoblock[0].block-count = 1;
bootrom.aoblock[0].block[0].type = 1; # I2C Type
bootrom.aoblock[0].block[0].slave-add = 0x3c; # 7BIt:0x3c
bootrom.aoblock[0].block[0].reg-data-size = 8;
bootrom.aoblock[0].block[0].reg-add-size = 8;
bootrom.aoblock[0].block[0].count = 2;
bootrom.aoblock[0].block[0].commands[0].0x42 = 0xda;
bootrom.aoblock[0].block[0].commands[1].0x41 = 0xf8;
# Shutdown: Set MAX77620
# Register ONOFFCNFG2, bit SFT_RST_WK = 0
# Register ONOFFCNFG1, bit SFT_RST = 1
bootrom.aoblock[1].command-retries-count = 1;
bootrom.aoblock[1].delay-between-commands-us = 1;
bootrom.aoblock[1].wait-before-start-bus-clear-us = 1;
bootrom.aoblock[1].block-count = 1;
bootrom.aoblock[1].block[0].type = 1; # I2C Type
bootrom.aoblock[1].block[0].slave-add = 0x3c; # 7BIt:0x3c
bootrom.aoblock[1].block[0].reg-data-size = 8;
bootrom.aoblock[1].block[0].reg-add-size = 8;
bootrom.aoblock[1].block[0].count = 2;
bootrom.aoblock[1].block[0].commands[0].0x42 = 0x5a;
bootrom.aoblock[1].block[0].commands[1].0x41 = 0xf8;
# Shutdown in sensor/ao-tag
#reset in soft reset.
# no commands for other case
bootrom.sensor-aotag.aocommand[0] = 1;
bootrom.soft-reset.aocommand[0] = 0;