NVIDIA Tegra
NVIDIA Jetson Linux Driver Package Software Features
Release 32.3 | December 10, 2019

 
Jetson Module EEPROM Layout
 
Configuration of Vendor-Specified MAC Addresses
Value of the CRC-8 Byte
This topic describes the layout of EEPROM for the NVIDIA® Jetson™ modules.
All numeric values are little-endian, i.e. the low-addressed byte contains the least significant digit and the high-addressed byte contains the most significant digit.
MAC addresses are also little-endian. For example, for the MAC address 00:04:4b:01:02:03, the low-addressed byte contains 0x03 and high-addressed byte contains 0x00.
The following table describes the layout of the EEPROM.
Bytes
Value
Notes
0–1
 
Board ID, EEPROM format version. Byte 0 must be 0x01. Byte 1 must be 0x00.
2–3
 
Length of board ID data; no longer supported.
4-5
 
Board number
6-7
 
SKU
8
 
FAB
9
 
REV
10
 
Minor rev
11
 
Memory type
12
 
Power configuration
13
 
Miscellaneous configuration
14-15
 
Reserved for future use
16
 
Display configuration
17
 
Rework level
18-19
 
Reserved for future use
20–49
 
Product Part Number*, used for asset tracking. A character string in the format 699-cnnnn-pppp-vvv r.m, where:
699 is a fixed string.
c is the board class, which indicates that the module is a mobile device. It may be 1 or 8.
nnnn is the board ID:
2180 for Jetson TX1
3310 for original NVIDIA® Jetson™ TX2
3489 for NVIDIA® Jetson™ TX2i and Jetson TX2 4GB
2888 for NVIDIA® Jetson AGX Xavier™
3448 for NVIDIA® Jetson Nano™
pppp is the SKU:
0020 for Jetson Nano (customer product module)
0000 for Jetson Nano (Jetson Nano Developer Kit module)
0001 for Jetson AGX Xavier
0006 for Jetson AGX Xavier 8GB
1000 for Jetson TX2
0000 for Jetson TX2i
0080 for Jetson TX2 4GB
1000 for Jetson TX1
vvv is an alphanumeric number in hex format.
r is a single capital letter, the manufacturing major revision.
m is a single decimal digit, the manufacturing minor revision.
The character data occupies 22 bytes. The field is padded to its full length of 30 bytes with 0x00 or 0xFF.
An example value is 699-82180-1000-000 C.0. Board ID is 2180, SKU is 1000, version number is 000, manufacturing major revision is C, and minor revision number is 0.
50–55
 
Factory default Wi-Fi MAC address.
On modules that do not have a WiFi/Bluetooth chip, these bytes are all 0x00 or all 0xFF.
56–61
 
Factory default BT MAC address.
On modules that do not have a WiFi/Bluetooth chip, these bytes are all 0x00 or all 0xFF.
62–67
 
Secondary Wi-Fi MAC address.
68–73
 
Factory default Gigabit Ethernet MAC address.
On modules that do not have a WiFi/Bluetooth chip, these bytes are all 0x00 or all 0xFF.
74–88
 
Asset tracking number, a unique string corresponding to the number on the device’s identifying sticker. A character string padded with 0x00 or 0xFF characters.
User Data Section
89-90
 
Camera interposer board I2C MUX-1
91–149
 
Reserved for future use.
Customer Overwritable Section
150–153
”NVCB"
Block signature; stands for “NVIDIA Configuration Block.”
If the value is different from "NVCB", the software uses the appropriate factory default for each MAC address.
154–155
28
Length of this struct from block signature to end. Value is subject to change.
156–157
'M1'
Format of following MAC address data: “MAC address, field format version 1.” If the value is different from "M1", the software uses the appropriate factory default for each MAC address.
158–159
0x0000
Version.
160–165
 
Vendor-specified Wi-Fi MAC address.
On modules that do not have a WiFi/Bluetooth chip, these bytes are all 0x00 or all 0xFF.
166–171
 
Vendor-specified BT MAC address.
172–177
 
Vendor-specified Gigabit Ethernet MAC address. Last field in the struct whose length is in bytes 154-155.
On modules that do not have a WiFi/Bluetooth chip, these bytes are all 0x00 or all 0xFF.
178–254
 
Reserved for future use.
255
 
CRC-8 computed for bytes 0–254.
Note
* This part number is subject to change without notice. However, in the event of a major change with customer impact, a PCN (Product Change Notification) will be issued.
Configuration of Vendor-Specified MAC Addresses
To configure the vendor-specified MAC addresses, use the following procedure.
If either of the “Verify” steps does not produce the expected result, the EEPROM has been corrupted or the device is malfunctioning. Identify and correct the problem before you proceed.
1. Read the EEPROM data from the 256-byte block at I2C bus 2, address 0x50.
2. Verify the EEPROM’s CRC‑8 checksum. Compute the checksum for bytes 0-254, using the procedure in Value of the CRC-8 Byte. The computed checksum should match the value in byte 255.
3. Verify that bytes 150-153 and 156-157 contain the signature values shown in the table above.
4. Update the MAC addresses in bytes 160-177 (see table). Remember that the MAC addresses are stored in little-endian order, the reverse of normal reading order.
5. Recompute the checksum, using the updated MAC addresses. Store the new checksum in byte 255.
Value of the CRC-8 Byte
The CRC is a single byte stored in byte 255, the last byte of EEPROM. It is computed using the CRC-8 algorithm in the following sample code.
def AddToCRC(b, crc):
b2 = b
if (b < 0):
b2 = b + 256
for i in range(8):
odd = ((b2^crc) & 1) == 1
crc >>= 1
b2 >>= 1
if (odd):
crc ^= 0x8C # This means crc ^= 140.
return crc
For each byte B of EEPROM content:
crc = AddToCRC(B, crc)