.. _AT.JetsonLinuxDevelopmentTools.DebuggingOnJetsonPlatforms:

.. include:: /content/swdocs.rsts

.. spelling::
   CoreSight
   Perfmon
   uncore
   Uncore
   debuggable

Debugging on Jetson Platforms
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|NVIDIA(r)| |Jetson(tm)| devices support debugging tools that allow Jetson application developers to put the processor into known states and trace its behavior while running. Use these tools to debug software you have developed using NVIDIA Jetson Board Support Package (BSP).

The Jetson architecture’s debugging support provides:

* Reduced power leakage
* Enhanced security
* Availability of standard interfaces

This topic describes the debuggable blocks, their debugging strategies, and the software implementation of the hardware and software features in the Technical Reference Manuals (TRMs) for Jetson processors. Use the appropriate TRM as your primary source for information and debugging.

.. todo:: Orin tbd.

- For |NVIDIA(r)| |Jetson Xavier(tm) NX| series and
  |NVIDIA(r)| |Jetson AGX Xavier(tm)| series processors:
  `Xavier Series (SoC) Technical Reference Manual <https://developer.nvidia.com/embedded/downloads#?search=Xavier%20Series%20SoC%20Technical%20Reference%20Manual>`_

Debugging Improvements
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The following table describes improvements in debugging features for Jetson devices.

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   :file: DebuggingOnJetsonPlatforms/DebuggingImprovements.htm

CoreSight Trace Sinks ETF and ETR
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The following table describes ARM\ |reg| CoreSight\ |tm| trace sink characteristics for Jetson processors. These characteristics include the corresponding Embedded Trace FIFO (ETF), ETR, and USB limits.

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   :file: DebuggingOnJetsonPlatforms/CoreSightTraceSinks.htm

AMBA Trace ID (ATID) Mapping
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The following tables describe mapping for ARM AMBA Trace ID (ATID). When collecting trace from multiple sources, the trace sinks (ETF and ETR) use ATIDs to segregate trace data.

.. todo:: Orin tbd


.. raw:: html
   :file: DebuggingOnJetsonPlatforms/AmbaXavier.htm

Uncore: Performance Monitor Unit
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**Applies to**: Jetson AGX Xavier series and Jetson NX series only

Several functional units on the T194 CCPLEX (e.g., the SCF and the L2) are outside the cores. These units are collectively referred to as the uncore. Some of them report uncore performance events and event counters, which are not counted by the core performance counters of the core’s Performance Monitor Unit (PMU).

The NVIDIA Uncore Perfmon Extension to the ARM\ |reg| Performance Monitor Extension (also called “Uncore Perfmon”) allows ARM software to access its performance counters. The Uncore Perfmon Extension is designed to resemble the standard ARM Performance Monitor Extension as much as possible.

You can download `ARM PMU documentation <https://www.kernel.org/doc/Documentation/devicetree/bindings/arm/pmu.txt>`_ from the Linux Kernel Archives.

Device-Specific Features and Limitations
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This section describes features and limitations of Uncore Perfmon on specific NVIDIA Jetson systems on chip (SoCs).

.. todo:: Orin tbd

- For T194 modules (Jetson Xavier NX series and Jetson AGX Xavier series):

  - Uncore Perfmon events are supported for all cores and clusters.

  - For more information about using the counters, see the kernel documentation within source code at::

        <kernel-source-path>/Documentation/devicetree/bindings/platform/tegra/nvidia,carmel-pmu.txt