Generic Timestamp Engine#

Applies to: Jetson AGX Orin, Orin NX and Orin Nano series

Note

Starting from JP 6.0, the Generic Timestamp Engine (GTE) driver has been marked as deprecated and replaced by the Hardware Timestamp Engine (HTE) from the upstream kernel.

<kernel-source>/nvidia-oot/Documentation/devicetree/bindings/tegra_gte/tegra-gte.yaml

Please refer to the Hardware Timestamp Engine (HTE) documentation from the kernel sources.

<kernel-source>/kernel/kernel-jammy-src/Documentation/driver-api/hte/
<kernel-source>/kernel/kernel-jammy-src/Documentation/devicetree/bindings/timestamp/

The HTE provides hardware timestamping for state changes of specific signals, including Legacy Interrupt Controller (LIC) interrupt lines and Always On (AON) domain GPIOs.

Enabling the HTE Driver#

  1. Modify the device tree to call tegra_hte_test. The following code uses Input PDD.01 and Output PDD.02:

    #define GPIO_IN  TEGRA234_AON_GPIO(DD, 1)
#define GPIO_OUT TEGRA234_AON_GPIO(DD, 2)

tegra_hte_test {
    status = "okay";
    compatible = "nvidia,tegra194-hte-test";
    in-gpios = <&gpio_aon GPIO_IN GPIO_ACTIVE_LOW>;
    out-gpios = <&gpio_aon GPIO_OUT GPIO_ACTIVE_LOW>;
    timestamps = <&hte_aon GPIO_IN>, <&hte_lic 0x19>;
    timestamp-names = "hte-gpio", "hte_lic";
};

    In the Orin series, 0x19 maps to I2C controller i2c@3160000.

    Note

    • Ensure that you have enabled the i2c node. In general, you can use any interrupts that are mapped to the LIC; to generate specified interrupts, the corresponding IPs should be active.

    • To run the sample test, you must have an external pin connection between the AON GPIO input and output pins.

  2. After the system boots, verify that both LIC IRQ monitoring and AON GPIO monitoring are enabled:

    $ cat /sys/firmware/devicetree/base/bus@0/hardware-timestamp@3aa0000/status
okay

$ cat /sys/firmware/devicetree/base/bus@0/hardware-timestamp@c1e0000/status
okay

  3. The test driver returns LIC IRQ hardware timestamps similar to the following:

    [   15.752337] HW timestamp(25: 1): 41488438304, edge: Unknown
[   15.752417] HW timestamp(25: 2): 41488570144, edge: Unknown
[   15.752521] HW timestamp(25: 3): 41488667488, edge: Unknown
[   15.752541] HW timestamp(25: 4): 41488694208, edge: Unknown

  4. The test driver also returns AON GPIO hardware timestamps. The tegra_hte_test sample driver toggles the state of the out GPIO pin every 8 seconds. By default, the driver monitors only the rising edge:

    [ 3861.561435] HW timestamp(25: 1): 3890811532192, edge: rising
[ 3877.945166] HW timestamp(25: 2): 3907195267680, edge: rising
[ 3894.328905] HW timestamp(25: 3): 3923579000672, edge: rising
[ 3910.712634] HW timestamp(25: 4): 3939962733952, edge: rising
[ 3927.096378] HW timestamp(25: 5): 3956346472896, edge: rising

    In this example,

    • 25 equals 0x19, which maps to TEGRA234_AON_GPIO(DD, 1).

    • 1 is the sequence number.

    • 3890811532192 is the timestamp in ns.

    • rising indicates that the edge trigger during rising.

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