cupva_device_debug.h#
Fully qualified name: src/device/vpu_runtime/include/cupva_device_debug.h
File members: src/device/vpu_runtime/include/cupva_device_debug.h
/*
* Copyright (c) 2022 NVIDIA Corporation. All rights reserved.
*
* NVIDIA Corporation and its licensors retain all intellectual property
* and proprietary rights in and to this software, related documentation
* and any modifications thereto. Any use, reproduction, disclosure or
* distribution of this software and related documentation without an express
* license agreement from NVIDIA Corporation is strictly prohibited.
*/
#ifndef CUPVA_DEVICE_DEBUG_H
#define CUPVA_DEVICE_DEBUG_H
#if CUPVA_ALLOW_NONSAFETY != 1
# error \
"cupva_device_debug.h contains non safety certified functions, you must set CUPVA_ALLOW_NONSAFETY preprocessor token to 1 to use this header."
#endif
#include <stdint.h>
#if CUPVA_BUILD_MODE == CUPVA_NATIVE
# include <signal.h>
//include stdio.h for printf so that we get same functionality from this header in both native and non-native modes
# include <stdio.h>
inline void swbrk(void)
{
raise(SIGTRAP);
}
#else
# ifdef __cplusplus
inline void swbrk(void)
{
asm("SWBRK"
"\n NOP");
}
# else
inline assembly void swbrk(void)
{
asm_begin SWBRK;
NOP;
asm_end
}
# endif
# define printf printf_
#endif
int printf_(const char *format, ...);
enum PerfmonCounters
{
PERFMON_NO_INSTRUCTION = 0,
PERFMON_VALID_INSTRUCTION,
PERFMON_STALL_INSTRUCTION_DECODE,
PERFMON_STALL_SUPERBANK_LOAD_CONFLICT,
PERFMON_STALL_DATA_HAZARD_LOAD,
PERFMON_STALL_DMA_LOAD_CONFLICT,
PERFMON_STALL_SUPERBANK_STORE_CONFLICT,
PERFMON_STALL_DMA_STORE_CONFLICT,
PERFMON_VPU_WAITING,
PERFMON_ICACHE_MISSES,
PERFMON_ICACHE_MISS_DURATION,
PERFMON_DLUT_BUSY,
PERFMON_DLUT_WAIT_FOR_VPU,
PERFMON_COUNT
};
struct PerfmonSample
{
int32_t counters[PERFMON_COUNT];
};
#define MASK_PERFMON_GPO (1U << 3U)
void cupvaPerfmonTakeSampleImpl(PerfmonSample &sample);
inline void cupvaPerfmonTakeSample(PerfmonSample &sample)
{
chess_separator_scheduler();
gpo_clr(MASK_PERFMON_GPO);
cupvaPerfmonTakeSampleImpl(sample);
gpo_set(MASK_PERFMON_GPO);
chess_separator_scheduler();
}
inline int32_t cupvaPerfmonReportRaw(PerfmonSample const &before, PerfmonSample const &after, PerfmonCounters counter)
{
return after.counters[counter] - before.counters[counter];
}
#endif //CUPVA_DEVICE_DEBUG_H