2. Release Notes#

2.1. Changelog#

(Developer Preview version only) Added support for the sm_107 (Rubin) architecture.

Added cuda_tile.fpowi operation for element-wise floating-point exponentiation with a signed-integer exponent (i1, i8, i16, or i32).
Added cuda_tile.gdc_launch_dependents_tko operation for grid dependency control, signaling that programmatic-dependent-launch (PDL) dependent kernels may begin. It is a no-op below sm_90.
Added cuda_tile.gdc_wait_tko operation for grid dependency control, waiting for predecessor-kernel completion with acquire semantics. It is a no-op below sm_90 and pairs with cuda_tile.gdc_launch_dependents_tko.
Added cuda_tile.insert operation to insert a source subtile into a destination tile at a given subtile index. The source shape must evenly divide the destination shape.
Added cuda_tile.memory_fence_alias_tko operation, a token-ordered fence that orders operations accessing the same physical memory through different virtual aliases.

(Developer Preview version only) Added the fnv8E5M3FNU (8-bit floating-point) type. It is an alternative floating-point type intended for use as a block-scale type in cuda_tile.mmaf_scaled with f4E2M1FN (fp4) elements.

(Developer Preview version only) Added support to cuda_tile.mmaf_scaled for f4E2M1FN inputs with fnv8E5M3FNU scale factors accumulating to f32.
cuda_tile.loop now supports function return: a cuda_tile.return may appear inside a loop body to return from the enclosing function.
Added a new inbounds attribute to cuda_tile.load_view_tko and cuda_tile.store_view_tko so that programs can convey that accesses along specified dimensions are statically known to be in-bounds, allowing the compiler to skip bounds checking for those dimensions. Dimensions left unmarked default to conservative bounds checking, which matches the behavior of prior versions.
Added an optional saturating modifier to cuda_tile.ftoi that clamps out-of-range values instead of producing undefined behavior and converts NaN to 0.
Added the nearest_away case (round to nearest, ties away from zero) to the RoundingMode attribute.
Documented that the combiner function for cuda_tile.reduce and cuda_tile.scan must be commutative as well as associative. This was already required by the implementation, which may reorder the combine freely.
Expanded the set of RoundingMode values accepted by cuda_tile.ftof for several conversion categories, including widening conversions, f64 to f32, f32 to tf32, and other narrowing conversions.
Renamed cuda_tile.pow to cuda_tile.fpowf, complementing the new integer-exponent cuda_tile.fpowi.

Added opt-in compiler optimization remarks that identify selected load and store instructions and explain TMA instruction-selection failures. Use tileiras --remarks=all to enable all remarks; see Compiler Optimization Remarks for additional filters and output formats.
tileiras and the CUDA driver JIT compiler flow now re-use the Tile IR-level optimization pipelines from cuda-tile-optimize, applying canonicalization, common-subexpression elimination, and loop-invariant code motion according to the selected optimization level. See Cuda Tile Optimizations for the complete pipeline and optimization-level behavior.

Added memory-alignment guidance for pointer loads, stores, atomic operations, and view accesses, including byte-alignment requirements for sub-byte element types.
Clarified cuda_tile.partition_view and cuda_tile.strided_view out-of-bounds semantics, distinguishing in-bounds view indices from partially out-of-bounds tiles and documenting load padding and store masking.
Clarified the cuda_tile.tensor_view memory contract for 4-bit elements, including dense packing, byte-alignment requirements, and little-endian nibble order.
Expanded cuda_tile.gather_scatter_view documentation with sparse-dimension indexing rules and multidimensional gather, scatter, padding, and out-of-bounds examples.
Expanded optimization-hint reference documentation with per-operation and architecture-specific constraints.

Fixed an sm_120 compiler crash when an f16 constant was converted to an FP8 type with cuda_tile.ftof and the result was passed to cuda_tile.print_tko.

The programming model is missing a section on a cross-tile block kernel such as split-k.
The bytecode section does not provide the exact encoding of each operation; current encodings are available in the public CUDA Tile source repository, and a standalone specification is expected in a future release.
The memory-model section does not yet include detailed examples or litmus tests showing how to apply its synchronization and token-ordering rules.
A cuda_tile.loop or cuda_tile.for operation may fail compilation or produce incorrect results when a tile produced by a load is carried between iterations. The issue may occur when the next iteration’s tile is loaded before the carried tile’s final use. As a workaround, place the next load after the carried tile’s final use, or restructure the loop so the loaded tile is not carried between iterations.
Converting a tf32 tile loaded from global memory to f32 may produce incorrect values if the lower 13 mantissa bits of any loaded value are nonzero. These bits do not affect MMA operations on the loaded tile; the issue becomes observable only after conversion to f32. As a workaround, ensure that the lower 13 mantissa bits of every tf32 value loaded from global memory are zero.