NVIDIA Tegra
NVIDIA DRIVE 5.0 Foundation SDK

Development Guide
5.0.10.3 Release


 
Board Design Facts and Limitations
 
FTDI Channels Configured as Asynchronous Serial UART
PCI Express Design Limitations
No PCIe Device on Tegra B if Tegra A Is Not Booted
PCIe Disabled on Tegra B if Tegra A Boots after Tegra B
Tegra B Crashing When Resetting Tegra A
Asynchronous Reboots for Tegra A and Tegra B Are Not Supported
This section documents some facts and limitations that apply to the DRIVE™ PX 2 (P2379).
FTDI Channels Configured as Asynchronous Serial UART
By default, all channels of both FTDI chips on the board are configured as asynchronous serial UARTs, and are enumerated as /dev/ttyUSB[0-3] and /dev/ttyUSB[4-7] in the host system.
By design, the RXD and TXD lines of channel 0 of both FTDI devices are connected to the Tegra Parker Reset and Recovery lines. Because of this, any write to the /dev/ttyUSB0 and /dev/ttyUSB4 com ports from the host system toggles the RX/TX lines and causes a forced Tegra reset.
PCI Express Design Limitations
On Tegra B, the PCI Express (PCIe) hierarchy is, by design, dependent on Tegra A. This design limitation can lead to:
No PCIe device detection on Tegra B if Tegra A is not booted
No PCIe device detection on Tegra B if Tegra A is booted after Tegra B, as when the file system on Tegra A is stored on slower media than that on Tegra B (e.g. on a USB device rather than eMMC)
Tegra B crashing when resetting Tegra A
Tegra B crashing in case of a Tegra A thermal shutdown
Asynchronous reboots for Tegra A and Tegra B are not supported.
No PCIe Device on Tegra B if Tegra A Is Not Booted
This is a known limitation. No workaround is available at this time.
PCIe Disabled on Tegra B if Tegra A Boots after Tegra B
When booting NVIDIA® DRIVE™ PX 2 AutoChauffeur with the Tegra A root file system on a USB 3.0 drive and the Tegra B root file system on eMMC, the PCIe on Tegra B is disabled and shows PCIe link 0 as down. Consequently, Tegra B fails to detect PCIe upon boot.
This happens because Tegra A loads its root file system from the USB drive, so Tegra B boots faster than Tegra A. Consequently, by the time PCIe is initialized on Tegra A, Tegra B has already booted and assumes there is no PCIe. Even if PCIe is rescanned on Tegra B, PCIe enumeration or detection does not occur because link 0 is already down.
To work around PCIe disabled on Tegra B
Soft reboot Tegra B to initiate PCIe enumeration along with the devices connected to it.
Tegra B Crashing When Resetting Tegra A
Due to NVIDIA DRIVE PX 2 PCIe design limitations, Tegra A reset/reboot resets the PLX switch, which causes Tegra B to be unstable if booted.
The following commands are not supported when Tegra B is booted:
Rebooting Tegra A with one of the above commands can lead to unexpected behavior, such as hanging or rebooting on Tegra B.
Note:
Resetting Tegra B from the AURIX console or the Tegra console is only supported while Tegra A is up.
To work around Tegra B crashing when resetting Tegra A
Reset Tegra B from the AURIX console using the tegrareset b command after Tegra A reboots.
—or—
Remove the PCIe hierarchy from Tegra B before Tegra A resets or reboots. Then rescan PCIe after Tegra A reboots.
a. To remove the PCIe hierarchy, enter this command:
echo 1 > /sys/bus/pci/devices/0000\:00\:01.0/remove
b. To rescan the PCIe hierarchy, enter this command:
echo 1 > /sys/bus/pci/rescan
 
Note:
The commands above must be run as root user.
Asynchronous Reboots for Tegra A and Tegra B Are Not Supported
Tegra B side PEX hierarchy is, by design, dependent on Tegra A. This is a known design limitation. No workaround is available at this time.