NVIDIA Tegra
NVIDIA DRIVE 5.0 Linux SDK

Development Guide
5.0.10.3 Release


 
gPTP/802.1AS Conforming Configuration Support
 
Single DPX 2 System Time Synchronization
Dual DPX 2 System Time Synchronization
System CLOCK_MONOTONIC as a Source for PTP Time
Note:
The information below is only applicable for P2379 (DPX2-Autochauffer). P3407 (DPX2-Autocruise) uses SPI transport based timesync. For more information, see SPI Transport and Time Synchronization Protocol for Loopback Interface.
Single DPX 2 System Time Synchronization
Note:
All Tegra side PTP related binaries are available at /home/nvidia/drive-t186ref-linux/samples/nvavb/daemons.
This section describes the DRIVE PX 2 platform support for 802.1AS conforming time synchronization messages for hardware time synchronization:
From the AURIX MCU to both Tegras
Using the PTP4l program on the Tegra processors
Using the AutoSAR 802.1AS clock master function on the AURIX processor
Steps to start PTP sync between the AURIX processor and Tegras
1. Disable NTP on both Tegras. The following command disables NTP, which is persistent across reboots.
timedatectl set-ntp 0
2. In the AURIX console, enter the date <time>.
Where <time> is in UNIX-style seconds.
For example:
date 0x77DA7A8F
3. Enable gPTP on AURIX:
gptpon
4. On both the Tegra A and Tegra B consoles, enter the following commands.
./phc2sys -s /dev/ptp0 -w -S 1.0 -O 0 &
./ptp4l -f ./gPTP_slave.cfg -p /dev/ptp0 -i eth0.200 -m -D -l 7
Alternatively for the above two daemons, two separate systemd services are provided in the file system to support PTP synchronization between AURIX MCU and the Tegras. These services are:
1. nv_ptp4l.service: This service runs ptp4l daemon, which synchronizes master and slave PTP HW controller devices (phc).
2. nv_phc2sys.service: This service runs phc2sys daemon, which synchronizes local wall time (CLOCK_REALTIME) from the PTP HW controller devices (phc).
By default, the above services are disabled. To enable and start it, run following commands:
systemctl enable nv_phc2sys
systemctl start nv_phc2sys
systemctl enable nv_ptp4l
systemctl start nv_ptp4l
In order to restore the original configuration i.e., enable NTP and disable PTP, run following commands:
systemctl disable nv_phc2sys
systemctl stop nv_phc2sys
systemctl disable nv_ptp4l
systemctl stop nv_ptp4l
timedatectl set-ntp 1
To check the sync time on Tegra, run the following commands:
date //to check the system wall time
./phc_ctl /dev/ptp0 get //to check the phc HW time
PTP sync logs can be seen using following command
cat /var/log/syslog //from syslog
sudo systemctl status nv_ptp4l.service //from system log
Note:
AURIX PTP Master clock provides precision in milliseconds. Hence, the synchronization accuracy/precision achieved in this configuration is in the millisecond range.
Dual DPX 2 System Time Synchronization
This section describes the dual DRIVE PX 2 platform support for 802.1AS conforming time synchronization messages for hardware time synchronization:
From one Tegra as master and 3 other Tegras as slaves
Using the PTP4l program on the Tegra processors
Prerequisite:
1. Both DPX 2 should be connected back-to-back using on-board debug port/harness port
2. PTP must be disabled on both AURIX nodes.
Note:
All Tegra side PTP related binaries are available at /home/nvidia/drive-t186ref-linux/samples/nvavb/daemons.
The following steps describe how to start PTP sync across two DPX 2:
1. Disable NTP on all Tegras. The following command disables NTP, which is persistent across reboots.
timedatectl set-ntp 0
2. Disable PTP on AURIX on both DPX 2 using the following command on the AURIX console.
gptpoff
3. Execute following commands on the PTP master Tegra:
Using Non- VLAN interface:
./phc2sys -s /dev/ptp0 -w -S 1.0 -O 0 &
./ptp4l -f ./gPTP.cfg -p /dev/ptp0 -i eth0 -m -D -l 7
Using VLAN interface:
For this, the VLAN interface should be created first using command:
sudo ip link add link eth0 name eth0.<vlan-id> type vlan id <vlan-id>; sudo ifconfig eth0.<vlan-id> up
For example:
sudo ip link add link eth0 name eth0.400 type vlan id 400
sudo ifconfig eth0.400 up
Then run following commands to start PTP:
./phc2sys -s /dev/ptp0 -w -S 1.0 -O 0 &
./ptp4l -f ./gPTP.cfg -p /dev/ptp0 -i eth0.400 -m -D -l 7
4. Execute following commands on the PTP slave Tegras:
Using Non- VLAN interface:
./phc2sys -s /dev/ptp0 -w -S 1.0 -O 0 &
./ptp4l -f ./gPTP_slave.cfg -p /dev/ptp0 -i eth0 -m -D -l 7
Using VLAN interface:
For this, the VLAN interface should be created first using command:
sudo ip link add link eth0 name eth0.<vlan-id> type vlan id <vlan-id>; sudo ifconfig eth0.<vlan-id> up
For example:
sudo ip link add link eth0 name eth0.400 type vlan id 400
sudo ifconfig eth0.400 up
Then run following commands to start PTP:
./phc2sys -s /dev/ptp0 -w -S 1.0 -O 0 &
./ptp4l -f ./gPTP_slave.cfg -p /dev/ptp0 -i eth0.400 -m -D -l 7
In case of PTP sync over VLAN, All Tegras must have VLAN interfaces created with the same VLAN ID.
Note:
Tegra PTP Master clock provides precision in sub-milliseconds. Hence, the synchronization accuracy/precision achieved in this configuration is in the sub-millisecond range with moderate network load.
Limitations
1. Dual DPX 2 PTP sync is not supported if the boards are connected over External Ethernet switch.
2. Dual DPX 2 configuration is limited to Tegra-Tegra sync and any external device sync is not supported.
System CLOCK_MONOTONIC as a Source for PTP Time
When ptp4l daemon starts in master mode on Tegra, it reads the system’s wall time i.e., CLOCK_REALTIME once and sets it on the PTP HW controller device (phc). This phc time acts as a reference master time and all other slave nodes sync to this time during PTP sync.
It is also possible to use Master Tegra’s CLOCK_MONOTONIC time as the reference time for PTP sync. This can be done by running the following command after starting ptp4l daemon.
./phc_ctl /dev/ptp0 set CLOCK_MONOTONIC