NVIDIA Tegra
NVIDIA DRIVE OS 5.1 Linux SDK

Developer Guide
5.1.6.0 Release

 
IPP Raw (nvmipp_raw)
 
Features
Constructing an IPP Pipeline
Threads
Slave Capture
Configuration Parameters
Running nvmipp_raw
Parameter Maps
Parameter Maps: E3550 Board
Parameter Maps: P3479 Board
Command Syntax
Required Command Line Switches
Optional Command Line Switches
Examples
The NvMedia Raw sample application, nvmipp_raw, demonstrates how to create NvMedia IPP components to build one or more IPP pipelines to process raw image input from one or more cameras. It provides an example of how to build multiple concurrent IPP pipelines and render aggregate stream output. The output of IPP is sent through EGL Stream to an OpenGL consumer that applies local tone mapping. It operates by parsing command line arguments and a configuration file.
The application requires you to provide a command line input with:
• A configuration file
• Capture parameter sets
• The number of cameras to aggregate
• The Auto Control plugin type
The configuration file contains multiple capture parameter sets, one of which is used in the command line. The application parses configuration settings and other command line parameters and builds the IPP pipeline with the required components. It starts the IPP pipeline to capture frames and send them to the EGL stream output for display.
The following diagram provides an overview of the process.
Features
The NvMedia RAW IPP sample application features are:
• Handles the RAW 12 input format.
• Provides parameter sets for AR0231 cameras. These parameter sets are in the configuration file.
Constructing an IPP Pipeline
The NvMedia IPP Raw sample application provides an example on how to build IPP pipelines and process raw data from cameras. The diagram below describes a typical IPP pipelines built for processing two cameras. One IPP pipeline is used for each camera. Each IPP Raw pipeline consists of:
• Image Capture (ICP)
• Image Sensor Control (ISC)
• Image Signal Processor (ISP)
• Output
• Control Algorithm components
An EGL producer and a GL consumer are attached to the IPP pipeline output to provide streams for display.
The following diagram shows the system after two IPP pipelines are constructed.
Threads
When only one ICP is created and it is attached to all pipelines, each IPP component except the Output component is an individual thread. Besides IPP threads, three more threads are alive:
• Main thread
• EGL producer
• GL consumer
Main Thread
The main thread:
• Parses command line switches
• Constructs IPP pipelines
• Starts the EGL producer and GL consumer
After IPP pipelines are started, the main thread processes user input in interactive mode. When the user quits, the main thread stops the pipelines and releases resources.
EGL Producer
The thread of the EGL producer is defined as ipp_GetIPPOutputThreadFunc. It runs in a loop that performs the following functions:
1. Gets an IPP output, NvMediaIPPComponentGetOutput
2. Gets metadata for the current output, NvMediaIPPMetadataGetAddress
3. Posts metadata to EGL Stream, NvMediaEglStreamProducerPostMetaData
4. Posts the output image to EGL Stream, NvMediaEglStreamProducerPostImage
5. Retrieves one released image from EGL Stream, NvMediaEglStreamProducerGetImage
6. Returns the IPP output, NvMediaIPPComponentReturnOutput
GL Consumer
Like EGL producer, the GL consumer runs in a loop. It receives images in semi-planar YUV 4:2:0 format through EGL Stream. The metadata of the local tone mapping is received for each image and is used to generate a 3D table. The GL fragment shader applies local tone mapping by looking up the table through a 3D texture. After rendering is finished, the image is displayed. The consumer releases one image for each EGL Stream at the end of one iteration.
Auto Control Plugin
The Auto Control Plugin library (nvmedia_acp.so provides a set of algorithms to estimate exposure settings and white balance gains for each frame to feed back to the sensor control. During pipeline creation, the IPP raw sample application normally binds this library. To disable the NvMedia Auto Control Plugin, specify --noplugin as an argument in the command line.
Note:
To check image quality, use the --noplugin argument.
Slave Capture
When slave capture is enabled, processor B captures the images from the sensors that are already programmed by the master (processor A).
To enable this feature, use the --slave switch when running the sample application on processor B.
Limitations
• Before starting the sample application on processor B, you must start capture on the master. The slave can continue to capture even after the master processor has stopped capturing.
• Processors A and B capture only in DPHY 1.2 mode.
Configuration Parameters
For information on configuration parameters, see “Configuration File Parameters” in Image Camera Capture (nvmimg_cap).
Running nvmipp_raw
This topic provides instructions for running the sample application nvmipp_raw.
To run the nvmipp_raw on the target
1. Ensure that you have satisfied the instructions in Running the NvMedia Sample Applications.
2. Go to the following directory, depending on the file system:
On ubuntu rootfs :
/home/nvidia/drive-t186ref-linux/samples/nvmedia/ipp_raw/<x11/wayland/egldevice>
On Genivi rootfs:
/home/root/samples/nvmedia/ipp_raw/<wayland/egldevice>
3. Execute this command on Tegra A:
./nvmipp_raw -cf ../ddpx-a.conf -c <param_set> --disable-egl
Parameter Maps
The following sections contain tables that explain how to call nvmipp_raw, depending on the following factors:
• Format: DPHY 1.2 or CPHY 1.1
• Board and processor (E3550 or P3479, processor A or B)
• Two-lane or four-lane.
Note:
Camera modules and commands NOT explicitly specified in these parameter map tables are NOT supported in this release.
To understand the limitations described in these tables, you must know the camera interface module (CIM) SKU version for your platform. For guidance on determining that version, see Parameter Map in Image Camera Capture (mvmimg_cap).
Parameter Maps: E3550 Board
The following subsections present parameter maps for the E3550 board’s processors A and B with DPHY 1.2 and CPHY 1.1, two and four lanes.
Processor A with DPHY 1.2, Two Lanes
The following table shows the commands for mapping to the Camera CSI physical group on the NVIDIA DRIVE™ AGX Platform processor A for DPHY1.1, two lanes.
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
A
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-A --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-A --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-A --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-A --disable-egl --aggregate 4
Y
Y
C
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-C --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-C --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-C --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-C --disable-egl --aggregate 4
Y
Y
E
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-E --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-E --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-E --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-E --disable-egl --aggregate 4
Y
Y
G
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-G --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-G --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-G --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-G --disable-egl --aggregate 4
Y
Y
Processor A with DPHY 1.2, Four Lanes
This table shows the commands for mapping to the Camera CSI physical group on the DRIVE AGX Platform processor A for DPHY1.1, four lanes.
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
AB
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-AB --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-AB --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-AB --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-AB --disable-egl --aggregate 4
Y
Y
CD
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-CD --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-CD --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-CD --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-CD --disable-egl --aggregate 4
Y
Y
EF
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-EF --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-EF --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-EF --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-EF --disable-egl --aggregate 4
Y
Y
GH
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-GH --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-GH --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-GH --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-CSI-GH --disable-egl --aggregate 4
Y
Y
Processor B with DPHY 1.2, Two Lanes
The following table shows the commands for mapping to the Camera CSI physical group on the DRIVE AGX Platform processor B for DPHY1.1, two lanes.
Note:
When running capture applications on processor B, processor A must be booted. This is required because frame sync is always generated by processor A.
 
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
A
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-A --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-A --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-A --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-A --disable-egl --aggregate 4
Y
Y
C
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-C --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-C --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-C --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-C --disable-egl --aggregate 4
Y
Y
E
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-E --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-E --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-E --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-E --disable-egl --aggregate 4
Y
Y
G
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-G --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-G --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-G --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-G --disable-egl --aggregate 4
Y
Y
Processor B with DPHY 1.2, Four Lanes
The following table shows the commands for mapping to the Camera CSI physical group on the DRIVE AGX Platform processor B for DPHY1.1, four lanes.
Note:
When running capture applications on processor B, processor A must be booted. This is required because frame sync is always generated by processor A.
 
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
AB
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-AB --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-AB --disable-egl --aggregate 4
Y
N
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-AB --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-AB --disable-egl --aggregate 4
Y
N
CD
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-CD --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-CD --disable-egl --aggregate 4
Y
N
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-CD --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-CD --disable-egl --aggregate 4
Y
N
EF
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-EF --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-EF --disable-egl --aggregate 4
Y
N
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-EF --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-EF --disable-egl --aggregate 4
Y
N
GH
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-GH --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-CSI-GH --disable-egl --aggregate 4
Y
N
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-GH --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-CSI-GH --disable-egl --aggregate 4
Y
N
Processor A with CPHY 1.1, Four Lanes
The following table shows the commands for mapping to the Camera CSI physical group on the DRIVE AGX Platform processor A for CPHY1.1, four lanes.
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
AB
CPHY 1.1
 
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-TRIO-AB --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-TRIO-AB --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-TRIO-AB --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-TRIO-AB --disable-egl --aggregate 4
Y
Y
CD
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-TRIO-CD --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-TRIO-CD --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-TRIO-CD --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-TRIO-CD --disable-egl --aggregate 4
Y
Y
EF
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-TRIO-EF --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-TRIO-EF --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-TRIO-EF --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-TRIO-EF --disable-egl --aggregate 4
Y
Y
GH
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-TRIO-GH --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-TRIO-GH --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-TRIO-GH --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-a.conf -c SF3325-TRIO-GH --disable-egl --aggregate 4
Y
Y
Processor B with CPHY 1.1, Two Lanes
The following table shows the commands for mapping to the Camera CSI physical group on the DRIVE AGX Platform processor B for CPHY1.1, two lanes.
Note:
When running capture applications on processor B, processor A must be booted. This is required because frame sync is always generated by processor A.
 
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
A
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-A --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-A --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-A --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-A --disable-egl --aggregate 4
Y
Y
C
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-C --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-C --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-C --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-C --disable-egl --aggregate 4
Y
Y
E
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-E --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-E --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-E --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-E --disable-egl --aggregate 4
Y
Y
G
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-G --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-G --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-G --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-G --disable-egl --aggregate 4
Y
Y
Processor B with CPHY 1.1, Four Lanes
The following table shows the commands for mapping to the Camera CSI physical group on the DRIVE AGX Platform processor B for CPHY1.1, four lanes.
Note:
When running capture applications on processor B, processor A must be booted. This is required because frame sync is always generated by processor A.
 
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
AB
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-AB --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-AB --disable-egl --aggregate 4
Y
N
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-AB --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-AB --disable-egl --aggregate 4
Y
N
CD
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-CD --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-CD --disable-egl --aggregate 4
Y
N
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-CD --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-CD --disable-egl --aggregate 4
Y
N
EF
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-EF --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-EF --disable-egl --aggregate 4
Y
N
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-EF --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-EF --disable-egl --aggregate 4
Y
N
GH
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-GH --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3324-TRIO-GH --disable-egl --aggregate 4
Y
N
SF3325
1
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-GH --disable-egl --aggregate 1
Y
N
4
./nvmipp_raw -cf ../ddpx-b.conf -c SF3325-TRIO-GH --disable-egl --aggregate 4
Y
N
Parameter Maps: P3479 Board
The following subsections present parameter maps for the P3479 board with DPHY 1.2 and CPHY 1.1, four lanes.
P3479 with DPHY 1.2, Four Lanes
This table shows the commands for mapping to the Camera CSI physical group on the P3479 for DPHY1.1, four lanes.
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
AB
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-CSI-AB --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-CSI-AB --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-CSI-AB --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-CSI-AB --disable-egl --aggregate 4
Y
Y
CD
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-CSI-CD --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-CSI-CD --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-CSI-CD --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-CSI-CD --disable-egl --aggregate 4
Y
Y
EF
DPHY 1.2
SF3324
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-CSI-EF --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-CSI-EF --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-CSI-EF --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-CSI-EF --disable-egl --aggregate 4
Y
Y
P3479 with CPHY 1.1, Four Lanes
The following table shows the commands for mapping to the Camera CSI physical group on the DRIVE AGX Platform P3479 for CPHY1.1, four lanes.
Aggregate Port
Camera Module
Number of Cameras
Command
Supported on CIM …
SKU0000
SKU0002
AB
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-TRIO-AB --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-TRIO-AB --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-TRIO-AB --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-TRIO-AB --disable-egl --aggregate 4
Y
Y
CD
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-TRIO-CD --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-TRIO-CD --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-TRIO-CD --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-TRIO-CD --disable-egl --aggregate 4
Y
Y
EF
CPHY 1.1
SF3324
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-TRIO-EF --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3324-TRIO-EF --disable-egl --aggregate 4
Y
Y
SF3325
1
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-TRIO-EF --disable-egl --aggregate 1
Y
Y
4
./nvmipp_raw -cf ../p3479_t194.conf -c SF3325-TRIO-EF --disable-egl --aggregate 4
Y
Y
Command Syntax
The command line syntax to run the script is as follows.
./nvmipp_raw -cf [filename] -c [name] --aggregate [n] [switches]
Required Command Line Switches
The following table describes the required command line switches.
Switch
Parameter
Description
--aggregate
[n]
Specifies the number of aggregated images.
The default value is 1. The option must be specified if more than one camera is in use.
-c
[name]
Specifies the parameter set name.
In some cases, *.conf files specifies multiple parameter sets. This switch identifies the set to use in the *.conf file specified with the -cf switch.
-cf
[filename]
Specifies the configuration file.
Optional Command Line Switches
The following table describes optional command line switches.
Switch
Parameter
Description
Default Settings
--cam_enable
<n>
A Boolean; 1 enables the camera[3210], and 0 disables it.
1
--cam_mask
<n>
A Boolean; 1 masks the camera[3210], and 0 unmasks it.
0
--csi_outmap
<n>
Sets CSI out order for camera[3210]; 0,1,2 or 3.
3210
-d
[id]
Enables the display. If provided, uses the display with the specified ID.
If the switch is specified with no ID, sample uses the first display available. If the switch is not specified, display is disabled.
--disable-egl
N/A
Disables output to EGL display.
EGL display output
--ext_sync
<n>
Enable external snchronization with a duty ratio of <n>, where 0.0 < <n> < 1.0.
If <n> is out of range, 0.25.
If the switch is not specified, set as determined by the aggregator.
-f
[file-prefix]
Specifies the filename prefix for output files.
Default: Output
-h
N/A
Prints usage and help menu.
N/A
-lps
N/A
Lists the available configuration parameter sets.
N/A
--mailbox
N/A
Specifies to manage frames in Mailbox Mode.
FIFO mode
--noplugin
N/A
No auto-control plugin for control algorithm component.
N/A
--nvbracketae
 
Uses the Nvmedia IPP bracketed auto-exposure plugin for control algorithm components.
N/A
--nvplugin
 
Uses the Nvmedia IPP plugins for control algorithm components.
N/A
--o1
[format]
Specifies the ISP output1 format. The value may be:
• yuv420_8b
• yuv420_16b
• yuv420_16b_709er
• yuv444_8b
• yuv444_16b
• yuv444_16b_709er
• rgb_srgb_8b
• rgb_srgb_16f
• rgb_sensor_16f
Default: yuv420_8b
--o2
[format]
Specifies the ISP output2 format. The value may be:
• yuv420_8b
• yuv420_16b
• yuv420_16b_709er
• yuv444_8b
• yuv444_16b
• yuv444_16b_709er
• rgb_srgb_8b
• rgb_srgb_16f
• rgb_sensor_16f
N/A
—od
[o1/o2]
Selects ISP output1 or output2 for the display.
ISP output1
--profile_capture
 
Enables capture latency reporting.
N/A
--sampleplugin
 
Uses the IPP sample plugin for control algorithm components.
N/A
--save-isp
N/A
Saves ISP output to the file specified by ‑f as prefix.
N/A
--save-raw
N/A
Saves ICP output to the file specified by -f as prefix.
N/A
--show-metadata
N/A
Shows the metadata information. Use with the -v switch.
N/A
--show-timestamp
N/A
Shows the timestamp information. Use with the -v switch.
N/A
--showfps
 
Enables frame rate reporting.
N/A
—slave
N/A
Specifies that the application is running with a slave aggregator. For more information, see Slave Capture.
N/A
-v
[level]
Logging level. The value may be:
• 0: Errors
• 1: Warnings
• 2: Information
• 3: Debug
If the switch is specified with no level, 3. If the switch is not specified, 0.
--vc_enable
 
Enables virtual channels for capturing frames.
Deprecated. VCs currently are enabled by default, so this switch has no effect.
N/A
 
Note:
If n instances of nvmipp_raw run simultaneously (to capture from different camera groups), the --disable-egl switch must be specified for at least n-1 instances.
Examples
The following examples specify the ISP output1 or output 2 formats.
Selects format yuv420_8b for ISP output1
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-A -d 1 --aggregate 1 --o1 yuv420_8b
Enables ISP output2 and selects format yuv420_8b for ISP output2
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-A -d 1 --aggregate 1 --o1 yuv420_8b --o2 yuv420_8b
Enables ISP output2 and displays it
./nvmipp_raw -cf ../ddpx-a.conf -c SF3324-CSI-A -d 1 --aggregate 1 --o1 yuv420_8b --o2 yuv420_8b --od o2