NVIDIA DRIVE OS 5.1 Linux SDK Developer Guide 5.1.15.0 Release  | 
Command  | Description  | 
Hypervisor kernel  | Provides implementation of the Virtualization features specific to the operating system.  | 
Partition Configuration Table  | A concatenated set of header files that represents a virtual configuration. The binary image of the partition configuration table is appended to the Hypervisor image. When loaded on the target platform, the concatenated image runs multiple guest OSs.  | 
Partition Loader  | Loads the Guest OS.  | 
Monitor Partition  | Maintains and monitors the per-guest health using the Watchdog Timer.   | 
Resource Manager Server Partition  | Manages the server partitions for the various virtualized component servers.  | 
Boot and Power Manager Processor  | Firmware that runs on Cortex R5. During boot, BPMP executes the boot ROM code and controls the SOC boot sequence. After boot, BPMP runs power management functions.  | 
Audio  | Provides an Audio Server that para-virtualizes the Audio Processing Engine (APE) of the Tegra device.  | 
I2C  | Allows multiple guests to access the same I2C controller without requiring prior information. Additionally, provides a framework to assign slaves to one or more guests.  | 
Virtual System Configuration Storage  | Manages the storage configuration files that are required for the flashing script to identify the hypervisor and guest partitions that must be flashed.  | 
Security Engine  | Enables para-virtualization of the Tegra SoC making it available to the software of a virtual machine through a similar virtualized interface.  | 
Watchdog Timer  | A framework that consists of a system-wide WDT monitor service, running in a privileged monitor partition, and one or more WDT clients, each running in a guest partition.  | 
System Manager  | Coordinates the ordering of state transition of each partition during a system state transition  | 
Inter-VM Communication Infrastructure  | Provides event and data exchange between the operating systems running on top of the hypervisor architecture.  |