nvsciipc.h

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/*
 * Copyright (c) 2018-2020, NVIDIA CORPORATION.  All rights reserved.
 *
 * NVIDIA CORPORATION and its licensors retain all intellectual property
 * and proprietary rights in and to this software, related documentation
 * and any modifications thereto.  Any use, reproduction, disclosure or
 * distribution of this software and related documentation without an express
 * license agreement from NVIDIA CORPORATION is strictly prohibited.
 */
 
#ifndef INCLUDED_NVSCIIPC_H
#define INCLUDED_NVSCIIPC_H
 
#ifdef __cplusplus
extern "C" {
#endif
 
#include <stdint.h>
#include <stddef.h>
#include <nvscierror.h>
 
/*******************************************************************/
/************************ DATA TYPES *******************************/
/*******************************************************************/
/* implements_unitdesign QNXBSP_NVSCIIPC_LIBNVSCIIPC_40 */
 
typedef uint64_t NvSciIpcEndpoint;
 
struct NvSciIpcEndpointInfo {
    uint32_t nframes;
    uint32_t frame_size;
};
 
#define NVSCIIPC_MAX_ENDPOINT_NAME   64U
 
/* NvSciIPC Event type */
#define NV_SCI_IPC_EVENT_READ       1U
 
#define NV_SCI_IPC_EVENT_WRITE      2U
 
#define NV_SCI_IPC_EVENT_CONN_EST   4U
 
#define NV_SCI_IPC_EVENT_CONN_RESET 8U
 
#define NV_SCI_IPC_EVENT_CONN_EST_ALL \
    (NV_SCI_IPC_EVENT_CONN_EST | \
    NV_SCI_IPC_EVENT_WRITE | \
    NV_SCI_IPC_EVENT_READ)
 
/*******************************************************************/
/********************* FUNCTION TYPES ******************************/
/*******************************************************************/
 
NvSciError NvSciIpcInit(void);
 
void NvSciIpcDeinit(void);
 
NvSciError NvSciIpcOpenEndpoint(const char *endpoint, NvSciIpcEndpoint *handle);
 
void NvSciIpcCloseEndpoint(NvSciIpcEndpoint handle);
 
void NvSciIpcResetEndpoint(NvSciIpcEndpoint handle);
 
NvSciError NvSciIpcRead(NvSciIpcEndpoint handle, void *buf, size_t size,
    int32_t *bytes);
 
NvSciError NvSciIpcReadGetNextFrame(NvSciIpcEndpoint handle,
    const volatile void **buf);
 
NvSciError NvSciIpcReadAdvance(NvSciIpcEndpoint handle);
 
NvSciError NvSciIpcWrite(NvSciIpcEndpoint handle, const void *buf, size_t size,
    int32_t *bytes);
 
NvSciError NvSciIpcWriteGetNextFrame(NvSciIpcEndpoint handle,
    volatile void **buf);
 
NvSciError NvSciIpcWriteAdvance(NvSciIpcEndpoint handle);
 
NvSciError NvSciIpcGetEndpointInfo(NvSciIpcEndpoint handle,
                struct NvSciIpcEndpointInfo *info);
 
NvSciError NvSciIpcGetLinuxEventFd(NvSciIpcEndpoint handle, int32_t *fd);
 
NvSciError NvSciIpcGetEvent(NvSciIpcEndpoint handle, uint32_t *events);
 
NvSciError NvSciIpcSetQnxPulseParam(NvSciIpcEndpoint handle,
    int32_t coid, int16_t pulsePriority, int16_t pulseCode,
    void *pulseValue);
 
#ifdef __cplusplus
}
#endif
#endif /* INCLUDED_NVSCIIPC_H */