NVAPI Reference Documentation
NVIDIA
Release 435: August 22
2019

NV_GPU_PERF_PSTATES_INFO_V1 Struct Reference

#include <nvapi.h>

Data Fields

NvU32 version
 
NvU32 flags
 
NvU32 numPstates
 
NvU32 numClocks
 
struct {
   NV_GPU_PERF_PSTATE_ID   pstateId
 
   NvU32   flags
 
   struct {
      NV_GPU_PUBLIC_CLOCK_ID   domainId
 
      NvU32   flags
 
      NvU32   freq
 
   }   clocks [NVAPI_MAX_GPU_PERF_CLOCKS]
 
pstates [NVAPI_MAX_GPU_PERF_PSTATES]
 

Detailed Description

Used in NvAPI_GPU_GetPstatesInfoEx()

Field Documentation

struct { ... } NV_GPU_PERF_PSTATES_INFO_V1::clocks[NVAPI_MAX_GPU_PERF_CLOCKS]
NV_GPU_PUBLIC_CLOCK_ID NV_GPU_PERF_PSTATES_INFO_V1::domainId

ID of the clock domain.

NvU32 NV_GPU_PERF_PSTATES_INFO_V1::flags

Reserved. Must be set to 0.

  • bit 0 indicates if perfmon is enabled or not
  • bit 1 indicates if dynamic Pstate is capable or not
  • bit 2 indicates if dynamic Pstate is enable or not
  • all other bits must be set to 0
  • bit 0 indicates if the PCIE limit is GEN1 or GEN2
  • bit 1 indicates if the Pstate is overclocked or not
  • bit 2 indicates if the Pstate is overclockable or not
  • all other bits must be set to 0
NvU32 NV_GPU_PERF_PSTATES_INFO_V1::freq

Clock frequency in kHz.

NvU32 NV_GPU_PERF_PSTATES_INFO_V1::numClocks

The number of clock domains supported by each P-State.

NvU32 NV_GPU_PERF_PSTATES_INFO_V1::numPstates

The number of available p-states.

NV_GPU_PERF_PSTATE_ID NV_GPU_PERF_PSTATES_INFO_V1::pstateId

ID of the p-state.

struct { ... } NV_GPU_PERF_PSTATES_INFO_V1::pstates[NVAPI_MAX_GPU_PERF_PSTATES]
NvU32 NV_GPU_PERF_PSTATES_INFO_V1::version

The documentation for this struct was generated from the following file:


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