NVAPI Reference Documentation
NVIDIA
Release 560
Mon Aug 5 2024
Modules | Data Structures | Macros | Typedefs | Enumerations | Enumerator | Functions | Variables
Video Input/Output Interface
Video APIs

Modules

 Stereoscopic 3D APIs
 
 Driver Settings (DRS) APIs
 
 System - General Interface <br>
 

Data Structures

struct  _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X1
 
struct  _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X2
 
struct  _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X4
 
struct  _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X8
 
struct  _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X1
 
struct  _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X2
 
struct  _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X4
 
struct  _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X1
 
struct  _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X2
 
struct  _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X4
 
struct  _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X1
 
struct  _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X2
 
struct  _NV_PIXEL_SRSO_4x2::NV_PIXEL_SRSO_4x2_X1
 
struct  _NV_PIXEL_SRSO_4x4::NV_PIXEL_SRSO_4x4_X1
 
struct  _NV_LATENCY_RESULT_PARAMS::FrameReport
 
struct  _NVVIOCAPS
 
struct  _NVVIOCHANNELSTATUS
 
struct  _NVVIOINPUTSTATUS
 
struct  _NVVIOOUTPUTSTATUS
 
struct  _NVVIOSTATUS
 
struct  _NVVIOOUTPUTREGION
 
struct  _NVVIOGAMMARAMP8
 
struct  _NVVIOGAMMARAMP10
 
struct  _NVVIOSYNCDELAY
 
struct  _NVVIOVIDEOMODE
 
struct  _NVVIOSIGNALFORMATDETAIL
 
struct  _NVVIODATAFORMATDETAIL
 
struct  _NVVIOCOLORCONVERSION
 
struct  _NVVIOGAMMACORRECTION
 
struct  _NVVIOCOMPOSITERANGE
 
struct  _NVVIOOUTPUTCONFIG_V1
 
struct  _NVVIOOUTPUTCONFIG_V2
 
struct  _NVVIOOUTPUTCONFIG_V3
 
struct  _NVVIOSTREAM
 
struct  _NVVIOINPUTCONFIG
 
struct  _NVVIOCONFIG_V1
 
struct  _NVVIOCONFIG_V2
 
struct  _NVVIOCONFIG_V3
 
struct  NVVIOTOPOLOGYTARGET
 
struct  _NV_VIO_TOPOLOGY
 
struct  _NVVIOPCIINFO
 
struct  NV_LID_DOCK_PARAMS
 
struct  _NV_DISPLAY_DRIVER_INFO
 
struct  _NV_DISPLAY_DRIVER_INFO_V2
 
struct  _NV_PHYSICAL_GPU_HANDLE_DATA
 
struct  _NV_PHYSICAL_GPUS
 
struct  _NV_LOGICAL_GPU_HANDLE_DATA
 
struct  _NV_LOGICAL_GPUS
 
struct  _NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1
 
struct  _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1
 
struct  _NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1
 
struct  _NV_GPU_CLIENT_UTILIZATION_DATA_V1
 
struct  _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1
 
struct  _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1
 

Macros

#define NVVIOOWNERID_NONE   0
 
#define NVVIO_O_READ   0x00000000
 
#define NVVIO_O_WRITE_EXCLUSIVE   0x00010001
 
#define NVVIO_VALID_ACCESSRIGHTS
 
#define NVVIO_OWNERID_INITIALIZED   0x80000000
 
#define NVVIO_OWNERID_EXCLUSIVE   0x40000000
 
#define NVVIO_OWNERID_TYPEMASK   0x0FFFFFFF
 
#define NVAPI_MAX_VIO_DEVICES   8
 
#define NVAPI_MAX_VIO_JACKS   4
 
#define NVAPI_MAX_VIO_CHANNELS_PER_JACK   2
 
#define NVAPI_MAX_VIO_STREAMS   4
 
#define NVAPI_MIN_VIO_STREAMS   1
 
#define NVAPI_MAX_VIO_LINKS_PER_STREAM   2
 
#define NVAPI_MAX_FRAMELOCK_MAPPING_MODES   20
 
#define NVAPI_GVI_MIN_RAW_CAPTURE_IMAGES   1
 
#define NVAPI_GVI_MAX_RAW_CAPTURE_IMAGES   32
 
#define NVAPI_GVI_DEFAULT_RAW_CAPTURE_IMAGES   5
 
#define NVVIOCAPS_VIDOUT_SDI   0x00000001
 
#define NVVIOCAPS_SYNC_INTERNAL   0x00000100
 
#define NVVIOCAPS_SYNC_GENLOCK   0x00000200
 
#define NVVIOCAPS_SYNCSRC_SDI   0x00001000
 
#define NVVIOCAPS_SYNCSRC_COMP   0x00002000
 
#define NVVIOCAPS_OUTPUTMODE_DESKTOP   0x00010000
 
#define NVVIOCAPS_OUTPUTMODE_OPENGL   0x00020000
 
#define NVVIOCAPS_VIDIN_SDI   0x00100000
 
#define NVVIOCAPS_PACKED_ANC_SUPPORTED   0x00200000
 
#define NVVIOCAPS_AUDIO_BLANKING_SUPPORTED   0x00400000
 
#define NVVIOCLASS_SDI   0x00000001
 
#define NVVIOCAPS_VER1   MAKE_NVAPI_VERSION(NVVIOCAPS,1)
 
#define NVVIOCAPS_VER2   MAKE_NVAPI_VERSION(NVVIOCAPS,2)
 
#define NVVIOCAPS_VER   NVVIOCAPS_VER2
 
#define NVVIOSTATUS_VER   MAKE_NVAPI_VERSION(NVVIOSTATUS,1)
 
#define NVVIOSYNCDELAY_VER   MAKE_NVAPI_VERSION(NVVIOSYNCDELAY,1)
 
#define NVVIOBUFFERFORMAT_R8G8B8   0x00000001
 
#define NVVIOBUFFERFORMAT_R8G8B8Z24   0x00000002
 
#define NVVIOBUFFERFORMAT_R8G8B8A8   0x00000004
 
#define NVVIOBUFFERFORMAT_R8G8B8A8Z24   0x00000008
 
#define NVVIOBUFFERFORMAT_R16FPG16FPB16FP   0x00000010
 
#define NVVIOBUFFERFORMAT_R16FPG16FPB16FPZ24   0x00000020
 
#define NVVIOBUFFERFORMAT_R16FPG16FPB16FPA16FP   0x00000040
 
#define NVVIOBUFFERFORMAT_R16FPG16FPB16FPA16FPZ24   0x00000080
 
#define NVVIOCOLORCONVERSION_VER   MAKE_NVAPI_VERSION(NVVIOCOLORCONVERSION,1)
 
#define NVVIOGAMMACORRECTION_VER   MAKE_NVAPI_VERSION(NVVIOGAMMACORRECTION,1)
 
#define MAX_NUM_COMPOSITE_RANGE   2
 
#define NVVIOCONFIG_SIGNALFORMAT   0x00000001
 
#define NVVIOCONFIG_DATAFORMAT   0x00000002
 
#define NVVIOCONFIG_OUTPUTREGION   0x00000004
 
#define NVVIOCONFIG_OUTPUTAREA   0x00000008
 
#define NVVIOCONFIG_COLORCONVERSION   0x00000010
 
#define NVVIOCONFIG_GAMMACORRECTION   0x00000020
 
#define NVVIOCONFIG_SYNCSOURCEENABLE   0x00000040
 
#define NVVIOCONFIG_SYNCDELAY   0x00000080
 
#define NVVIOCONFIG_COMPOSITESYNCTYPE   0x00000100
 
#define NVVIOCONFIG_FRAMELOCKENABLE   0x00000200
 
#define NVVIOCONFIG_422FILTER   0x00000400
 
#define NVVIOCONFIG_COMPOSITETERMINATE   0x00000800
 
#define NVVIOCONFIG_DATAINTEGRITYCHECK   0x00001000
 
#define NVVIOCONFIG_CSCOVERRIDE   0x00002000
 
#define NVVIOCONFIG_FLIPQUEUELENGTH   0x00004000
 
#define NVVIOCONFIG_ANCTIMECODEGENERATION   0x00008000
 
#define NVVIOCONFIG_COMPOSITE   0x00010000
 
#define NVVIOCONFIG_ALPHAKEYCOMPOSITE   0x00020000
 
#define NVVIOCONFIG_COMPOSITE_Y   0x00040000
 
#define NVVIOCONFIG_COMPOSITE_CR   0x00080000
 
#define NVVIOCONFIG_COMPOSITE_CB   0x00100000
 
#define NVVIOCONFIG_FULL_COLOR_RANGE   0x00200000
 
#define NVVIOCONFIG_RGB_DATA   0x00400000
 
#define NVVIOCONFIG_RESERVED_SDIOUTPUTENABLE   0x00800000
 
#define NVVIOCONFIG_STREAMS   0x01000000
 
#define NVVIOCONFIG_ANC_PARITY_COMPUTATION   0x02000000
 
#define NVVIOCONFIG_ANC_AUDIO_REPEAT   0x04000000
 
#define NVVIOCONFIG_ALLFIELDS
 
#define NVVIOCONFIG_VALIDFIELDS
 
#define NVVIOCONFIG_DRIVERFIELDS
 
#define NVVIOCONFIG_GAMMAFIELDS   ( NVVIOCONFIG_GAMMACORRECTION )
 
#define NVVIOCONFIG_RMCTRLFIELDS
 
#define NVVIOCONFIG_RMSKEWFIELDS   ( NVVIOCONFIG_SYNCDELAY )
 
#define NVVIOCONFIG_ALLOWSDIRUNNING_FIELDS
 
#define NVVIOCONFIG_RMMODESET_FIELDS
 
#define NVVIOCONFIG_VER1   MAKE_NVAPI_VERSION(NVVIOCONFIG_V1,1)
 
#define NVVIOCONFIG_VER2   MAKE_NVAPI_VERSION(NVVIOCONFIG_V2,2)
 
#define NVVIOCONFIG_VER3   MAKE_NVAPI_VERSION(NVVIOCONFIG_V3,3)
 
#define NVVIOCONFIG_VER   NVVIOCONFIG_VER3
 
#define NV_VIO_TOPOLOGY_VER   MAKE_NVAPI_VERSION(NV_VIO_TOPOLOGY,1)
 
#define NVVIOTOPOLOGY_VER   MAKE_NVAPI_VERSION(NVVIOTOPOLOGY,1)
 
#define NVVIOPCIINFO_VER1   MAKE_NVAPI_VERSION(NVVIOPCIINFO_V1,1)
 
#define NVVIOPCIINFO_VER   NVVIOPCIINFO_VER1
 
#define NV_LID_DOCK_PARAMS_VER   MAKE_NVAPI_VERSION(NV_LID_DOCK_PARAMS,1)
 
#define NV_DISPLAY_DRIVER_INFO_VER1   MAKE_NVAPI_VERSION(NV_DISPLAY_DRIVER_INFO_V1, 1)
 
#define NV_DISPLAY_DRIVER_INFO_VER2   MAKE_NVAPI_VERSION(NV_DISPLAY_DRIVER_INFO_V2, 2)
 
#define NV_DISPLAY_DRIVER_INFO_VER   NV_DISPLAY_DRIVER_INFO_VER2
 
#define NV_PHYSICAL_GPUS_VER1   MAKE_NVAPI_VERSION(NV_PHYSICAL_GPUS_V1, 1)
 
#define NV_PHYSICAL_GPUS_VER   NV_PHYSICAL_GPUS_VER1
 
#define NV_LOGICAL_GPUS_VER1   MAKE_NVAPI_VERSION(NV_LOGICAL_GPUS_V1, 1)
 
#define NV_LOGICAL_GPUS_VER   NV_LOGICAL_GPUS_VER1
 
#define NV_GPU_CLIENT_UTIL_DOMAINS_MAX_V1   (4)
 
#define NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_VER1   MAKE_NVAPI_VERSION(NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1, 1)
 
#define NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_VER   NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_VER1
 

Typedefs

typedef NvU32 NVVIOOWNERID
 
typedef enum _NVVIOOWNERTYPE NVVIOOWNERTYPE
 
typedef enum _NVVIOSIGNALFORMAT NVVIOSIGNALFORMAT
 
typedef enum _NVVIOVIDEOSTANDARD NVVIOVIDEOSTANDARD
 
typedef enum _NVVIOVIDEOTYPE NVVIOVIDEOTYPE
 
typedef enum _NVVIOINTERLACEMODE NVVIOINTERLACEMODE
 
typedef enum _NVVIODATAFORMAT NVVIODATAFORMAT
 
typedef enum _NVVIOOUTPUTAREA NVVIOOUTPUTAREA
 
typedef enum _NVVIOSYNCSOURCE NVVIOSYNCSOURCE
 
typedef enum _NVVIOCOMPSYNCTYPE NVVIOCOMPSYNCTYPE
 
typedef enum _NVVIOINPUTOUTPUTSTATUS NVVIOINPUTOUTPUTSTATUS
 
typedef enum _NVVIOSYNCSTATUS NVVIOSYNCSTATUS
 
typedef enum _NVVIOCAPTURESTATUS NVVIOCAPTURESTATUS
 
typedef enum _NVVIOSTATUSTYPE NVVIOSTATUSTYPE
 
typedef enum _NVVIOCONFIGTYPE NVVIOCONFIGTYPE
 
typedef enum _NVVIOCOLORSPACE NVVIOCOLORSPACE
 
typedef enum _NVVIOCOMPONENTSAMPLING NVVIOCOMPONENTSAMPLING
 
typedef enum _NVVIOBITSPERCOMPONENT NVVIOBITSPERCOMPONENT
 
typedef enum _NVVIOLINKID NVVIOLINKID
 
typedef enum _NVVIOANCPARITYCOMPUTATION NVVIOANCPARITYCOMPUTATION
 
typedef struct _NVVIOCAPS NVVIOCAPS
 
typedef struct _NVVIOCHANNELSTATUS NVVIOCHANNELSTATUS
 
typedef struct _NVVIOINPUTSTATUS NVVIOINPUTSTATUS
 
typedef struct _NVVIOOUTPUTSTATUS NVVIOOUTPUTSTATUS
 
typedef struct _NVVIOSTATUS NVVIOSTATUS
 
typedef struct _NVVIOOUTPUTREGION NVVIOOUTPUTREGION
 
typedef struct _NVVIOGAMMARAMP8 NVVIOGAMMARAMP8
 
typedef struct _NVVIOGAMMARAMP10 NVVIOGAMMARAMP10
 
typedef struct _NVVIOSYNCDELAY NVVIOSYNCDELAY
 
typedef struct _NVVIOVIDEOMODE NVVIOVIDEOMODE
 
typedef struct _NVVIOSIGNALFORMATDETAIL NVVIOSIGNALFORMATDETAIL
 
typedef struct _NVVIODATAFORMATDETAIL NVVIODATAFORMATDETAIL
 
typedef struct _NVVIOCOLORCONVERSION NVVIOCOLORCONVERSION
 
typedef struct _NVVIOGAMMACORRECTION NVVIOGAMMACORRECTION
 
typedef struct _NVVIOCOMPOSITERANGE NVVIOCOMPOSITERANGE
 
typedef struct _NVVIOOUTPUTCONFIG_V1 NVVIOOUTPUTCONFIG_V1
 
typedef struct _NVVIOOUTPUTCONFIG_V2 NVVIOOUTPUTCONFIG_V2
 
typedef struct _NVVIOOUTPUTCONFIG_V3 NVVIOOUTPUTCONFIG_V3
 
typedef struct _NVVIOSTREAM NVVIOSTREAM
 
typedef struct _NVVIOINPUTCONFIG NVVIOINPUTCONFIG
 
typedef struct _NVVIOCONFIG_V1 NVVIOCONFIG_V1
 
typedef struct _NVVIOCONFIG_V2 NVVIOCONFIG_V2
 
typedef struct _NVVIOCONFIG_V3 NVVIOCONFIG_V3
 
typedef NVVIOOUTPUTCONFIG_V3 NVVIOOUTPUTCONFIG
 
typedef NVVIOCONFIG_V3 NVVIOCONFIG
 
typedef struct _NV_VIO_TOPOLOGY NV_VIO_TOPOLOGY
 
typedef struct _NV_VIO_TOPOLOGY NVVIOTOPOLOGY
 
typedef enum _NVVIOPCILINKRATE NVVIOPCILINKRATE
 
typedef enum _NVVIOPCILINKWIDTH NVVIOPCILINKWIDTH
 
typedef struct _NVVIOPCIINFO NVVIOPCIINFO_V1
 
typedef NVVIOPCIINFO_V1 NVVIOPCIINFO
 
typedef struct _NV_DISPLAY_DRIVER_INFO NV_DISPLAY_DRIVER_INFO_V1
 
typedef struct _NV_DISPLAY_DRIVER_INFO_V2 NV_DISPLAY_DRIVER_INFO_V2
 
typedef NV_DISPLAY_DRIVER_INFO_V2 NV_DISPLAY_DRIVER_INFO
 
typedef struct _NV_PHYSICAL_GPU_HANDLE_DATA NV_PHYSICAL_GPU_HANDLE_DATA
 
typedef struct _NV_PHYSICAL_GPUS NV_PHYSICAL_GPUS_V1
 
typedef NV_PHYSICAL_GPUS_V1 NV_PHYSICAL_GPUS
 
typedef struct _NV_LOGICAL_GPU_HANDLE_DATA NV_LOGICAL_GPU_HANDLE_DATA
 
typedef struct _NV_LOGICAL_GPUS NV_LOGICAL_GPUS_V1
 
typedef NV_LOGICAL_GPUS_V1 NV_LOGICAL_GPUS
 
typedef struct _NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1 NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1
 
typedef NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1 NV_GPU_CLIENT_CALLBACK_SETTINGS_SUPER_V1
 
typedef struct _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1 NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1
 
typedef struct _NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1 NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1
 
typedef enum _NV_GPU_CLIENT_UTIL_DOMAIN_ID NV_GPU_CLIENT_UTIL_DOMAIN_ID
 
typedef struct _NV_GPU_CLIENT_UTILIZATION_DATA_V1 NV_GPU_CLIENT_UTILIZATION_DATA_V1
 
typedef struct _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1 NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1
 
typedef void(__cdecl * NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_V1) (NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1 *pData)
 
typedef struct _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1 NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1
 
typedef NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1 NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS
 

Enumerations

enum  _NVVIOOWNERTYPE { NVVIOOWNERTYPE_NONE , NVVIOOWNERTYPE_APPLICATION , NVVIOOWNERTYPE_DESKTOP }
 
enum  _NVVIOSIGNALFORMAT {
  NVVIOSIGNALFORMAT_NONE , NVVIOSIGNALFORMAT_487I_59_94_SMPTE259_NTSC , NVVIOSIGNALFORMAT_576I_50_00_SMPTE259_PAL , NVVIOSIGNALFORMAT_1035I_60_00_SMPTE260 ,
  NVVIOSIGNALFORMAT_1035I_59_94_SMPTE260 , NVVIOSIGNALFORMAT_1080I_50_00_SMPTE295 , NVVIOSIGNALFORMAT_1080I_60_00_SMPTE274 , NVVIOSIGNALFORMAT_1080I_59_94_SMPTE274 ,
  NVVIOSIGNALFORMAT_1080I_50_00_SMPTE274 , NVVIOSIGNALFORMAT_1080P_30_00_SMPTE274 , NVVIOSIGNALFORMAT_1080P_29_97_SMPTE274 , NVVIOSIGNALFORMAT_1080P_25_00_SMPTE274 ,
  NVVIOSIGNALFORMAT_1080P_24_00_SMPTE274 , NVVIOSIGNALFORMAT_1080P_23_976_SMPTE274 , NVVIOSIGNALFORMAT_720P_60_00_SMPTE296 , NVVIOSIGNALFORMAT_720P_59_94_SMPTE296 ,
  NVVIOSIGNALFORMAT_720P_50_00_SMPTE296 , NVVIOSIGNALFORMAT_1080I_48_00_SMPTE274 , NVVIOSIGNALFORMAT_1080I_47_96_SMPTE274 , NVVIOSIGNALFORMAT_720P_30_00_SMPTE296 ,
  NVVIOSIGNALFORMAT_720P_29_97_SMPTE296 , NVVIOSIGNALFORMAT_720P_25_00_SMPTE296 , NVVIOSIGNALFORMAT_720P_24_00_SMPTE296 , NVVIOSIGNALFORMAT_720P_23_98_SMPTE296 ,
  NVVIOSIGNALFORMAT_2048P_30_00_SMPTE372 , NVVIOSIGNALFORMAT_2048P_29_97_SMPTE372 , NVVIOSIGNALFORMAT_2048I_60_00_SMPTE372 , NVVIOSIGNALFORMAT_2048I_59_94_SMPTE372 ,
  NVVIOSIGNALFORMAT_2048P_25_00_SMPTE372 , NVVIOSIGNALFORMAT_2048I_50_00_SMPTE372 , NVVIOSIGNALFORMAT_2048P_24_00_SMPTE372 , NVVIOSIGNALFORMAT_2048P_23_98_SMPTE372 ,
  NVVIOSIGNALFORMAT_2048I_48_00_SMPTE372 , NVVIOSIGNALFORMAT_2048I_47_96_SMPTE372 , NVVIOSIGNALFORMAT_1080PSF_25_00_SMPTE274 , NVVIOSIGNALFORMAT_1080PSF_29_97_SMPTE274 ,
  NVVIOSIGNALFORMAT_1080PSF_30_00_SMPTE274 , NVVIOSIGNALFORMAT_1080PSF_24_00_SMPTE274 , NVVIOSIGNALFORMAT_1080PSF_23_98_SMPTE274 , NVVIOSIGNALFORMAT_1080P_50_00_SMPTE274_3G_LEVEL_A ,
  NVVIOSIGNALFORMAT_1080P_59_94_SMPTE274_3G_LEVEL_A , NVVIOSIGNALFORMAT_1080P_60_00_SMPTE274_3G_LEVEL_A , NVVIOSIGNALFORMAT_1080P_60_00_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080I_60_00_SMPTE274_3G_LEVEL_B ,
  NVVIOSIGNALFORMAT_2048I_60_00_SMPTE372_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080P_50_00_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080I_50_00_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_2048I_50_00_SMPTE372_3G_LEVEL_B ,
  NVVIOSIGNALFORMAT_1080P_30_00_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_2048P_30_00_SMPTE372_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080P_25_00_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_2048P_25_00_SMPTE372_3G_LEVEL_B ,
  NVVIOSIGNALFORMAT_1080P_24_00_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_2048P_24_00_SMPTE372_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080I_48_00_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_2048I_48_00_SMPTE372_3G_LEVEL_B ,
  NVVIOSIGNALFORMAT_1080P_59_94_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080I_59_94_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_2048I_59_94_SMPTE372_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080P_29_97_SMPTE274_3G_LEVEL_B ,
  NVVIOSIGNALFORMAT_2048P_29_97_SMPTE372_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080P_23_98_SMPTE274_3G_LEVEL_B , NVVIOSIGNALFORMAT_2048P_23_98_SMPTE372_3G_LEVEL_B , NVVIOSIGNALFORMAT_1080I_47_96_SMPTE274_3G_LEVEL_B ,
  NVVIOSIGNALFORMAT_2048I_47_96_SMPTE372_3G_LEVEL_B , NVVIOSIGNALFORMAT_END
}
 
enum  _NVVIOVIDEOSTANDARD {
  NVVIOVIDEOSTANDARD_SMPTE259 , NVVIOVIDEOSTANDARD_SMPTE260 , NVVIOVIDEOSTANDARD_SMPTE274 , NVVIOVIDEOSTANDARD_SMPTE295 ,
  NVVIOVIDEOSTANDARD_SMPTE296 , NVVIOVIDEOSTANDARD_SMPTE372
}
 
enum  _NVVIOVIDEOTYPE { NVVIOVIDEOTYPE_SD , NVVIOVIDEOTYPE_HD }
 
enum  _NVVIOINTERLACEMODE { NVVIOINTERLACEMODE_PROGRESSIVE , NVVIOINTERLACEMODE_INTERLACE , NVVIOINTERLACEMODE_PSF }
 
enum  _NVVIODATAFORMAT {
  NVVIODATAFORMAT_UNKNOWN = -1 , NVVIODATAFORMAT_R8G8B8_TO_YCRCB444 , NVVIODATAFORMAT_R8G8B8A8_TO_YCRCBA4444 , NVVIODATAFORMAT_R8G8B8Z10_TO_YCRCBZ4444 ,
  NVVIODATAFORMAT_R8G8B8_TO_YCRCB422 , NVVIODATAFORMAT_R8G8B8A8_TO_YCRCBA4224 , NVVIODATAFORMAT_R8G8B8Z10_TO_YCRCBZ4224 , NVVIODATAFORMAT_X8X8X8_444_PASSTHRU ,
  NVVIODATAFORMAT_X8X8X8A8_4444_PASSTHRU , NVVIODATAFORMAT_X8X8X8Z10_4444_PASSTHRU , NVVIODATAFORMAT_X10X10X10_444_PASSTHRU , NVVIODATAFORMAT_X10X8X8_444_PASSTHRU ,
  NVVIODATAFORMAT_X10X8X8A10_4444_PASSTHRU , NVVIODATAFORMAT_X10X8X8Z10_4444_PASSTHRU , NVVIODATAFORMAT_DUAL_R8G8B8_TO_DUAL_YCRCB422 , NVVIODATAFORMAT_DUAL_X8X8X8_TO_DUAL_422_PASSTHRU ,
  NVVIODATAFORMAT_R10G10B10_TO_YCRCB422 , NVVIODATAFORMAT_R10G10B10_TO_YCRCB444 , NVVIODATAFORMAT_X12X12X12_444_PASSTHRU , NVVIODATAFORMAT_X12X12X12_422_PASSTHRU ,
  NVVIODATAFORMAT_Y10CR10CB10_TO_YCRCB422 , NVVIODATAFORMAT_Y8CR8CB8_TO_YCRCB422 , NVVIODATAFORMAT_Y10CR8CB8A10_TO_YCRCBA4224 , NVVIODATAFORMAT_R10G10B10_TO_RGB444 ,
  NVVIODATAFORMAT_R12G12B12_TO_YCRCB444 , NVVIODATAFORMAT_R12G12B12_TO_YCRCB422
}
 
enum  _NVVIOOUTPUTAREA { NVVIOOUTPUTAREA_FULLSIZE , NVVIOOUTPUTAREA_SAFEACTION , NVVIOOUTPUTAREA_SAFETITLE }
 
enum  _NVVIOSYNCSOURCE { NVVIOSYNCSOURCE_SDISYNC , NVVIOSYNCSOURCE_COMPSYNC }
 
enum  _NVVIOCOMPSYNCTYPE { NVVIOCOMPSYNCTYPE_AUTO , NVVIOCOMPSYNCTYPE_BILEVEL , NVVIOCOMPSYNCTYPE_TRILEVEL }
 
enum  _NVVIOINPUTOUTPUTSTATUS { NVINPUTOUTPUTSTATUS_OFF , NVINPUTOUTPUTSTATUS_ERROR , NVINPUTOUTPUTSTATUS_SDI_SD , NVINPUTOUTPUTSTATUS_SDI_HD }
 
enum  _NVVIOSYNCSTATUS {
  NVVIOSYNCSTATUS_OFF , NVVIOSYNCSTATUS_ERROR , NVVIOSYNCSTATUS_SYNCLOSS , NVVIOSYNCSTATUS_COMPOSITE ,
  NVVIOSYNCSTATUS_SDI_SD , NVVIOSYNCSTATUS_SDI_HD
}
 
enum  _NVVIOCAPTURESTATUS { NVVIOSTATUS_STOPPED , NVVIOSTATUS_RUNNING , NVVIOSTATUS_ERROR }
 
enum  _NVVIOSTATUSTYPE { NVVIOSTATUSTYPE_IN , NVVIOSTATUSTYPE_OUT }
 
enum  _NVVIOCONFIGTYPE { NVVIOCONFIGTYPE_IN , NVVIOCONFIGTYPE_OUT }
 
enum  _NVVIOCOLORSPACE {
  NVVIOCOLORSPACE_UNKNOWN , NVVIOCOLORSPACE_YCBCR , NVVIOCOLORSPACE_YCBCRA , NVVIOCOLORSPACE_YCBCRD ,
  NVVIOCOLORSPACE_GBR , NVVIOCOLORSPACE_GBRA , NVVIOCOLORSPACE_GBRD
}
 
enum  _NVVIOCOMPONENTSAMPLING {
  NVVIOCOMPONENTSAMPLING_UNKNOWN , NVVIOCOMPONENTSAMPLING_4444 , NVVIOCOMPONENTSAMPLING_4224 , NVVIOCOMPONENTSAMPLING_444 ,
  NVVIOCOMPONENTSAMPLING_422
}
 
enum  _NVVIOBITSPERCOMPONENT { NVVIOBITSPERCOMPONENT_UNKNOWN , NVVIOBITSPERCOMPONENT_8 , NVVIOBITSPERCOMPONENT_10 , NVVIOBITSPERCOMPONENT_12 }
 
enum  _NVVIOLINKID {
  NVVIOLINKID_UNKNOWN , NVVIOLINKID_A , NVVIOLINKID_B , NVVIOLINKID_C ,
  NVVIOLINKID_D
}
 
enum  _NVVIOANCPARITYCOMPUTATION { NVVIOANCPARITYCOMPUTATION_AUTO , NVVIOANCPARITYCOMPUTATION_ON , NVVIOANCPARITYCOMPUTATION_OFF }
 
enum  _NVVIOPCILINKRATE { NVVIOPCILINKRATE_UNKNOWN = 0 , NVVIOPCILINKRATE_GEN1 = 1 , NVVIOPCILINKRATE_GEN2 = 2 , NVVIOPCILINKRATE_GEN3 = 3 }
 
enum  _NVVIOPCILINKWIDTH {
  NVVIOPCILINKWIDTH_UNKNOWN = 0 , NVVIOPCILINKWIDTH_x1 = 1 , NVVIOPCILINKWIDTH_x2 = 2 , NVVIOPCILINKWIDTH_x4 = 4 ,
  NVVIOPCILINKWIDTH_x8 = 8 , NVVIOPCILINKWIDTH_x16 = 16
}
 
enum  _NV_GPU_CLIENT_UTIL_DOMAIN_ID { NV_GPU_CLIENT_UTIL_DOMAIN_GRAPHICS = 0 , NV_GPU_CLIENT_UTIL_DOMAIN_FRAME_BUFFER = 1 , NV_GPU_CLIENT_UTIL_DOMAIN_VIDEO = 2 , NV_GPU_CLIENT_UTIL_DOMAIN_RSVD = 3 }
 

Functions

virtual bool INvAPI_DirectD3D12GraphicsCommandList::IsValid () const =0
 
virtual ID3D12GraphicsCommandList * INvAPI_DirectD3D12GraphicsCommandList::GetID3D12GraphicsCommandList () const =0
 
void INvAPI_DirectD3D12GraphicsCommandList::DispatchGraphics (NvU32 numDispatches)
 
void INvAPI_DirectD3D12GraphicsCommandList::SetMarker (void *pMarkerData, NvU32 markerSize)
 
 __nvapi_deprecated_function ("Do not use this function - it is deprecated in release 440.") NVAPI_INTERFACE NvAPI_VIO_GetCapabilities(NvVioHandle hVioHandle
 
 __nvapi_deprecated_function ("Do not use this function - it is deprecated in release 290. Instead, use NvAPI_VIO_SetConfig.") NVAPI_INTERFACE NvAPI_VIO_SetCSC(NvVioHandle hVioHandle
 
 __nvapi_deprecated_function ("Do not use this function - it is deprecated in release 290. Instead, use NvAPI_VIO_GetConfig.") NVAPI_INTERFACE NvAPI_VIO_GetCSC(NvVioHandle hVioHandle
 
NVAPI_INTERFACE NvAPI_GPU_ClientRegisterForUtilizationSampleUpdates (__in NvPhysicalGpuHandle hPhysicalGpu, __in NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS *pCallbackSettings)
 

Variables

NvU32 NV_EDID_V1::version
 
NvU8 NV_EDID_V1::EDID_Data [NV_EDID_DATA_SIZE]
 
NvU32 NV_EDID_V2::version
 
NvU8 NV_EDID_V2::EDID_Data [NV_EDID_DATA_SIZE]
 
NvU32 NV_EDID_V2::sizeofEDID
 
NvU32 NV_EDID_V3::version
 
NvU8 NV_EDID_V3::EDID_Data [NV_EDID_DATA_SIZE]
 
NvU32 NV_EDID_V3::sizeofEDID
 
NvU32 NV_EDID_V3::edidId
 
NvU32 NV_EDID_V3::offset
 
float NV_VIEWPORTF::x
 
float NV_VIEWPORTF::y
 
float NV_VIEWPORTF::w
 
float NV_VIEWPORTF::h
 
NvU32 tagNV_TIMINGEXT::flag
 
NvU16 tagNV_TIMINGEXT::rr
 
NvU32 tagNV_TIMINGEXT::rrx1k
 
NvU32 tagNV_TIMINGEXT::aspect
 
NvU16 tagNV_TIMINGEXT::rep
 
NvU32 tagNV_TIMINGEXT::status
 
NvU8 tagNV_TIMINGEXT::name [40]
 
NvU16 _NV_TIMING::HVisible
 
NvU16 _NV_TIMING::HBorder
 
NvU16 _NV_TIMING::HFrontPorch
 
NvU16 _NV_TIMING::HSyncWidth
 
NvU16 _NV_TIMING::HTotal
 
NvU8 _NV_TIMING::HSyncPol
 
NvU16 _NV_TIMING::VVisible
 
NvU16 _NV_TIMING::VBorder
 
NvU16 _NV_TIMING::VFrontPorch
 
NvU16 _NV_TIMING::VSyncWidth
 
NvU16 _NV_TIMING::VTotal
 
NvU8 _NV_TIMING::VSyncPol
 
NvU16 _NV_TIMING::interlaced
 
NvU32 _NV_TIMING::pclk
 
NV_TIMINGEXT _NV_TIMING::etc
 
NvU32 NV_VIEW_TARGET_INFO::version
 
NvU32 NV_VIEW_TARGET_INFO::count
 
NvU32   NV_VIEW_TARGET_INFO::deviceMask 
 
NvU32   NV_VIEW_TARGET_INFO::sourceId 
 
NvU32   NV_VIEW_TARGET_INFO::bPrimary:1 
 
NvU32   NV_VIEW_TARGET_INFO::bInterlaced:1 
 
NvU32   NV_VIEW_TARGET_INFO::bGDIPrimary:1 
 
NvU32   NV_VIEW_TARGET_INFO::bForceModeSet:1 
 
struct { 
 
   NvU32   NV_VIEW_TARGET_INFO::deviceMask 
 
   NvU32   NV_VIEW_TARGET_INFO::sourceId 
 
   NvU32   NV_VIEW_TARGET_INFO::bPrimary:1 
 
   NvU32   NV_VIEW_TARGET_INFO::bInterlaced:1 
 
   NvU32   NV_VIEW_TARGET_INFO::bGDIPrimary:1 
 
   NvU32   NV_VIEW_TARGET_INFO::bForceModeSet:1 
 
} NV_VIEW_TARGET_INFO::target [NVAPI_MAX_VIEW_TARGET] 
 
NvU32 NV_DISPLAY_PATH::deviceMask
 
NvU32 NV_DISPLAY_PATH::sourceId
 
NvU32 NV_DISPLAY_PATH::bPrimary:1
 
NV_GPU_CONNECTOR_TYPE NV_DISPLAY_PATH::connector
 
NvU32 NV_DISPLAY_PATH::width
 
NvU32 NV_DISPLAY_PATH::height
 
NvU32 NV_DISPLAY_PATH::depth
 
NV_FORMAT NV_DISPLAY_PATH::colorFormat
 
NV_ROTATE NV_DISPLAY_PATH::rotation
 
NV_SCALING NV_DISPLAY_PATH::scaling
 
NvU32 NV_DISPLAY_PATH::refreshRate
 
NvU32 NV_DISPLAY_PATH::interlaced:1
 
NV_DISPLAY_TV_FORMAT NV_DISPLAY_PATH::tvFormat
 
NvU32 NV_DISPLAY_PATH::posx
 
NvU32 NV_DISPLAY_PATH::posy
 
NvU32 NV_DISPLAY_PATH::bGDIPrimary:1
 
NvU32 NV_DISPLAY_PATH::bForceModeSet:1
 
NvU32 NV_DISPLAY_PATH::bFocusDisplay:1
 
NvU32 NV_DISPLAY_PATH::gpuId:24
 
NvU32 NV_DISPLAY_PATH_INFO_V3::version
 
NvU32 NV_DISPLAY_PATH_INFO_V3::count
 
NV_DISPLAY_PATH NV_DISPLAY_PATH_INFO_V3::path [NVAPI_MAX_DISPLAY_PATH]
 
NvU32 NV_DISPLAY_PATH_INFO::version
 
NvU32 NV_DISPLAY_PATH_INFO::count
 
NV_DISPLAY_PATH NV_DISPLAY_PATH_INFO::path [NVAPI_ADVANCED_MAX_DISPLAY_PATH]
 
NvS32 _NV_POSITION::x
 
NvS32 _NV_POSITION::y
 
NvU32 _NV_RESOLUTION::width
 
NvU32 _NV_RESOLUTION::height
 
NvU32 _NV_RESOLUTION::colorDepth
 
NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::version
 
NV_ROTATE _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::rotation
 
NV_SCALING _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::scaling
 
NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::refreshRate1K
 
NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::interlaced:1
 
NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::primary:1
 
NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::reservedBit1:1
 
NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::disableVirtualModeSupport:1
 
NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::isPreferredUnscaledTarget:1
 
NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::reserved:27
 
NV_GPU_CONNECTOR_TYPE _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::connector
 
NV_DISPLAY_TV_FORMAT _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::tvFormat
 
NV_TIMING_OVERRIDE _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::timingOverride
 
NV_TIMING _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::timing
 
NvU32 _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V1::displayId
 
NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO * _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V1::details
 
NvU32 _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V2::displayId
 
NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO * _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V2::details
 
NvU32 _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V2::targetId
 
NV_RESOLUTION _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::resolution
 
NV_FORMAT _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::colorFormat
 
NV_POSITION _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::position
 
NV_DISPLAYCONFIG_SPANNING_ORIENTATION _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::spanningOrientation
 
NvU32 _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::bGDIPrimary: 1
 
NvU32 _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::bSLIFocus: 1
 
NvU32 _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::reserved: 30
 
NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V1::version
 
NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V1::reserved_sourceId
 
NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V1::targetInfoCount
 
NV_DISPLAYCONFIG_PATH_TARGET_INFO_V1 * _NV_DISPLAYCONFIG_PATH_INFO_V1::targetInfo
 
NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1 * _NV_DISPLAYCONFIG_PATH_INFO_V1::sourceModeInfo
 
NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::version
 
NvU32   _NV_DISPLAYCONFIG_PATH_INFO_V2::sourceId 
 
NvU32   _NV_DISPLAYCONFIG_PATH_INFO_V2::reserved_sourceId 
 
union { 
 
   NvU32   _NV_DISPLAYCONFIG_PATH_INFO_V2::sourceId 
 
   NvU32   _NV_DISPLAYCONFIG_PATH_INFO_V2::reserved_sourceId 
 
};  
 
NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::targetInfoCount
 
NV_DISPLAYCONFIG_PATH_TARGET_INFO_V2 * _NV_DISPLAYCONFIG_PATH_INFO_V2::targetInfo
 
NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1 * _NV_DISPLAYCONFIG_PATH_INFO_V2::sourceModeInfo
 
NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::IsNonNVIDIAAdapter: 1
 
NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::reserved: 31
 
void * _NV_DISPLAYCONFIG_PATH_INFO_V2::pOSAdapterID
 
NvS32 NV_GPU_PERF_PSTATES20_PARAM_DELTA::value
 
NvS32   NV_GPU_PERF_PSTATES20_PARAM_DELTA::min 
 
NvS32   NV_GPU_PERF_PSTATES20_PARAM_DELTA::max 
 
struct { 
 
   NvS32   NV_GPU_PERF_PSTATES20_PARAM_DELTA::min 
 
   NvS32   NV_GPU_PERF_PSTATES20_PARAM_DELTA::max 
 
} NV_GPU_PERF_PSTATES20_PARAM_DELTA::valueRange 
 
NV_GPU_PUBLIC_CLOCK_ID NV_GPU_PSTATE20_CLOCK_ENTRY_V1::domainId
 
NV_GPU_PERF_PSTATE20_CLOCK_TYPE_ID NV_GPU_PSTATE20_CLOCK_ENTRY_V1::typeId
 
NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::bIsEditable:1
 
NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::reserved:31
 
NV_GPU_PERF_PSTATES20_PARAM_DELTA NV_GPU_PSTATE20_CLOCK_ENTRY_V1::freqDelta_kHz
 
NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::freq_kHz 
 
struct { 
 
   NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::freq_kHz 
 
}   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::single 
 
NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::minFreq_kHz 
 
NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::maxFreq_kHz 
 
NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::domainId 
 
NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::minVoltage_uV 
 
NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::maxVoltage_uV 
 
struct { 
 
   NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::minFreq_kHz 
 
   NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::maxFreq_kHz 
 
   NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::domainId 
 
   NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::minVoltage_uV 
 
   NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::maxVoltage_uV 
 
}   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::range 
 
union { 
 
   struct { 
 
      NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::freq_kHz 
 
   }   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::single 
 
   struct { 
 
      NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::minFreq_kHz 
 
      NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::maxFreq_kHz 
 
      NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::domainId 
 
      NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::minVoltage_uV 
 
      NvU32   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::maxVoltage_uV 
 
   }   NV_GPU_PSTATE20_CLOCK_ENTRY_V1::range 
 
} NV_GPU_PSTATE20_CLOCK_ENTRY_V1::data 
 
NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::domainId
 
NvU32 NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::bIsEditable:1
 
NvU32 NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::reserved:31
 
NvU32 NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::volt_uV
 
NV_GPU_PERF_PSTATES20_PARAM_DELTA NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::voltDelta_uV
 
NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::version
 
NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::bIsEditable:1
 
NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::reserved:31
 
NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::numPstates
 
NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::numClocks
 
NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::numBaseVoltages
 
NV_GPU_PERF_PSTATE_ID   NV_GPU_PERF_PSTATES20_INFO_V1::pstateId 
 
NvU32   NV_GPU_PERF_PSTATES20_INFO_V1::bIsEditable:1 
 
NvU32   NV_GPU_PERF_PSTATES20_INFO_V1::reserved:31 
 
NV_GPU_PSTATE20_CLOCK_ENTRY_V1   NV_GPU_PERF_PSTATES20_INFO_V1::clocks [NVAPI_MAX_GPU_PSTATE20_CLOCKS] 
 
NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1   NV_GPU_PERF_PSTATES20_INFO_V1::baseVoltages [NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES] 
 
struct { 
 
   NV_GPU_PERF_PSTATE_ID   NV_GPU_PERF_PSTATES20_INFO_V1::pstateId 
 
   NvU32   NV_GPU_PERF_PSTATES20_INFO_V1::bIsEditable:1 
 
   NvU32   NV_GPU_PERF_PSTATES20_INFO_V1::reserved:31 
 
   NV_GPU_PSTATE20_CLOCK_ENTRY_V1   NV_GPU_PERF_PSTATES20_INFO_V1::clocks [NVAPI_MAX_GPU_PSTATE20_CLOCKS] 
 
   NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1   NV_GPU_PERF_PSTATES20_INFO_V1::baseVoltages [NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES] 
 
} NV_GPU_PERF_PSTATES20_INFO_V1::pstates [NVAPI_MAX_GPU_PSTATE20_PSTATES] 
 
NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::version
 
NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::bIsEditable:1
 
NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::reserved:31
 
NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::numPstates
 
NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::numClocks
 
NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::numBaseVoltages
 
NV_GPU_PERF_PSTATE_ID   _NV_GPU_PERF_PSTATES20_INFO_V2::pstateId 
 
NvU32   _NV_GPU_PERF_PSTATES20_INFO_V2::bIsEditable:1 
 
NvU32   _NV_GPU_PERF_PSTATES20_INFO_V2::reserved:31 
 
NV_GPU_PSTATE20_CLOCK_ENTRY_V1   _NV_GPU_PERF_PSTATES20_INFO_V2::clocks [NVAPI_MAX_GPU_PSTATE20_CLOCKS] 
 
NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1   _NV_GPU_PERF_PSTATES20_INFO_V2::baseVoltages [NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES] 
 
struct { 
 
   NV_GPU_PERF_PSTATE_ID   _NV_GPU_PERF_PSTATES20_INFO_V2::pstateId 
 
   NvU32   _NV_GPU_PERF_PSTATES20_INFO_V2::bIsEditable:1 
 
   NvU32   _NV_GPU_PERF_PSTATES20_INFO_V2::reserved:31 
 
   NV_GPU_PSTATE20_CLOCK_ENTRY_V1   _NV_GPU_PERF_PSTATES20_INFO_V2::clocks [NVAPI_MAX_GPU_PSTATE20_CLOCKS] 
 
   NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1   _NV_GPU_PERF_PSTATES20_INFO_V2::baseVoltages [NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES] 
 
} _NV_GPU_PERF_PSTATES20_INFO_V2::pstates [NVAPI_MAX_GPU_PSTATE20_PSTATES] 
 
NvU32   _NV_GPU_PERF_PSTATES20_INFO_V2::numVoltages 
 
NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1   _NV_GPU_PERF_PSTATES20_INFO_V2::voltages [NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES] 
 
struct { 
 
   NvU32   _NV_GPU_PERF_PSTATES20_INFO_V2::numVoltages 
 
   NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1   _NV_GPU_PERF_PSTATES20_INFO_V2::voltages [NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES] 
 
} _NV_GPU_PERF_PSTATES20_INFO_V2::ov 
 
NvU32 NV_DISPLAY_DRIVER_VERSION::version
 
NvU32 NV_DISPLAY_DRIVER_VERSION::drvVersion
 
NvU32 NV_DISPLAY_DRIVER_VERSION::bldChangeListNum
 
NvAPI_ShortString NV_DISPLAY_DRIVER_VERSION::szBuildBranchString
 
NvAPI_ShortString NV_DISPLAY_DRIVER_VERSION::szAdapterString
 
NvU32 _NV_GPU_DISPLAYIDS::version
 
NV_MONITOR_CONN_TYPE _NV_GPU_DISPLAYIDS::connectorType
 
NvU32 _NV_GPU_DISPLAYIDS::displayId
 
NvU32 _NV_GPU_DISPLAYIDS::isDynamic: 1
 
NvU32 _NV_GPU_DISPLAYIDS::isMultiStreamRootNode: 1
 
NvU32 _NV_GPU_DISPLAYIDS::isActive: 1
 
NvU32 _NV_GPU_DISPLAYIDS::isCluster: 1
 
NvU32 _NV_GPU_DISPLAYIDS::isOSVisible: 1
 
NvU32 _NV_GPU_DISPLAYIDS::isWFD: 1
 
NvU32 _NV_GPU_DISPLAYIDS::isConnected: 1
 
NvU32 _NV_GPU_DISPLAYIDS::reservedInternal: 10
 
NvU32 _NV_GPU_DISPLAYIDS::isPhysicallyConnected: 1
 
NvU32 _NV_GPU_DISPLAYIDS::reserved: 14
 
NvU32 _NV_BOARD_INFO::version
 
NvU8 _NV_BOARD_INFO::BoardNum [16]
 
NvU32 NV_GPU_ARCH_INFO_V1::version
 
NvU32 NV_GPU_ARCH_INFO_V1::architecture
 
NvU32 NV_GPU_ARCH_INFO_V1::implementation
 
NvU32 NV_GPU_ARCH_INFO_V1::revision
 
NvU32 NV_GPU_ARCH_INFO_V2::version
 
NvU32   NV_GPU_ARCH_INFO_V2::architecture 
 
NV_GPU_ARCHITECTURE_ID   NV_GPU_ARCH_INFO_V2::architecture_id 
 
union { 
 
   NvU32   NV_GPU_ARCH_INFO_V2::architecture 
 
   NV_GPU_ARCHITECTURE_ID   NV_GPU_ARCH_INFO_V2::architecture_id 
 
};  
 
NvU32   NV_GPU_ARCH_INFO_V2::implementation 
 
NV_GPU_ARCH_IMPLEMENTATION_ID   NV_GPU_ARCH_INFO_V2::implementation_id 
 
union { 
 
   NvU32   NV_GPU_ARCH_INFO_V2::implementation 
 
   NV_GPU_ARCH_IMPLEMENTATION_ID   NV_GPU_ARCH_INFO_V2::implementation_id 
 
};  
 
NvU32   NV_GPU_ARCH_INFO_V2::revision 
 
NV_GPU_CHIP_REVISION   NV_GPU_ARCH_INFO_V2::revision_id 
 
union { 
 
   NvU32   NV_GPU_ARCH_INFO_V2::revision 
 
   NV_GPU_CHIP_REVISION   NV_GPU_ARCH_INFO_V2::revision_id 
 
};  
 
NvU32 NV_I2C_INFO_V1::version
 
NvU32 NV_I2C_INFO_V1::displayMask
 
NvU8 NV_I2C_INFO_V1::bIsDDCPort
 
NvU8 NV_I2C_INFO_V1::i2cDevAddress
 
NvU8 * NV_I2C_INFO_V1::pbI2cRegAddress
 
NvU32 NV_I2C_INFO_V1::regAddrSize
 
NvU8 * NV_I2C_INFO_V1::pbData
 
NvU32 NV_I2C_INFO_V1::cbSize
 
NvU32 NV_I2C_INFO_V1::i2cSpeed
 
NvU32 NV_I2C_INFO_V2::version
 
NvU32 NV_I2C_INFO_V2::displayMask
 
NvU8 NV_I2C_INFO_V2::bIsDDCPort
 
NvU8 NV_I2C_INFO_V2::i2cDevAddress
 
NvU8 * NV_I2C_INFO_V2::pbI2cRegAddress
 
NvU32 NV_I2C_INFO_V2::regAddrSize
 
NvU8 * NV_I2C_INFO_V2::pbData
 
NvU32 NV_I2C_INFO_V2::cbSize
 
NvU32 NV_I2C_INFO_V2::i2cSpeed
 
NV_I2C_SPEED NV_I2C_INFO_V2::i2cSpeedKhz
 
NvU32 NV_I2C_INFO_V3::version
 
NvU32 NV_I2C_INFO_V3::displayMask
 
NvU8 NV_I2C_INFO_V3::bIsDDCPort
 
NvU8 NV_I2C_INFO_V3::i2cDevAddress
 
NvU8 * NV_I2C_INFO_V3::pbI2cRegAddress
 
NvU32 NV_I2C_INFO_V3::regAddrSize
 
NvU8 * NV_I2C_INFO_V3::pbData
 
NvU32 NV_I2C_INFO_V3::cbSize
 
NvU32 NV_I2C_INFO_V3::i2cSpeed
 
NV_I2C_SPEED NV_I2C_INFO_V3::i2cSpeedKhz
 
NvU8 NV_I2C_INFO_V3::portId
 
NvU32 NV_I2C_INFO_V3::bIsPortIdSet
 
NvU32 NV_GPU_GET_HDCP_SUPPORT_STATUS::version
 
NV_GPU_HDCP_FUSE_STATE NV_GPU_GET_HDCP_SUPPORT_STATUS::hdcpFuseState
 
NV_GPU_HDCP_KEY_SOURCE NV_GPU_GET_HDCP_SUPPORT_STATUS::hdcpKeySource
 
NV_GPU_HDCP_KEY_SOURCE_STATE NV_GPU_GET_HDCP_SUPPORT_STATUS::hdcpKeySourceState
 
NvU32 NV_COMPUTE_GPU_TOPOLOGY_V1::version
 
NvU32 NV_COMPUTE_GPU_TOPOLOGY_V1::gpuCount
 
NvPhysicalGpuHandle   NV_COMPUTE_GPU_TOPOLOGY_V1::hPhysicalGpu 
 
NvU32   NV_COMPUTE_GPU_TOPOLOGY_V1::flags 
 
struct { 
 
   NvPhysicalGpuHandle   NV_COMPUTE_GPU_TOPOLOGY_V1::hPhysicalGpu 
 
   NvU32   NV_COMPUTE_GPU_TOPOLOGY_V1::flags 
 
} NV_COMPUTE_GPU_TOPOLOGY_V1::computeGpus [NVAPI_MAX_GPU_PER_TOPOLOGY] 
 
NvPhysicalGpuHandle _NV_COMPUTE_GPU::hPhysicalGpu
 
NvU32 _NV_COMPUTE_GPU::flags
 
NvU32 _NV_COMPUTE_GPU_TOPOLOGY_V2::version
 
NvU32 _NV_COMPUTE_GPU_TOPOLOGY_V2::gpuCount
 
NV_COMPUTE_GPU * _NV_COMPUTE_GPU_TOPOLOGY_V2::computeGpus
 
NvU32 NV_GPU_ECC_STATUS_INFO::version
 
NvU32 NV_GPU_ECC_STATUS_INFO::isSupported: 1
 
NV_ECC_CONFIGURATION NV_GPU_ECC_STATUS_INFO::configurationOptions
 
NvU32 NV_GPU_ECC_STATUS_INFO::isEnabled: 1
 
NvU32 NV_GPU_ECC_ERROR_INFO::version
 
NvU64   NV_GPU_ECC_ERROR_INFO::singleBitErrors 
 
NvU64   NV_GPU_ECC_ERROR_INFO::doubleBitErrors 
 
struct { 
 
   NvU64   NV_GPU_ECC_ERROR_INFO::singleBitErrors 
 
   NvU64   NV_GPU_ECC_ERROR_INFO::doubleBitErrors 
 
} NV_GPU_ECC_ERROR_INFO::current 
 
NvU64   NV_GPU_ECC_ERROR_INFO::singleBitErrors 
 
NvU64   NV_GPU_ECC_ERROR_INFO::doubleBitErrors 
 
struct { 
 
   NvU64   NV_GPU_ECC_ERROR_INFO::singleBitErrors 
 
   NvU64   NV_GPU_ECC_ERROR_INFO::doubleBitErrors 
 
} NV_GPU_ECC_ERROR_INFO::aggregate 
 
NvU32 NV_GPU_ECC_CONFIGURATION_INFO::version
 
NvU32 NV_GPU_ECC_CONFIGURATION_INFO::isEnabled: 1
 
NvU32 NV_GPU_ECC_CONFIGURATION_INFO::isEnabledByDefault: 1
 
NV_QSYNC_EVENT NV_QSYNC_EVENT_DATA::qsyncEvent
 
NvU32 NV_QSYNC_EVENT_DATA::reserved [7]
 
NvU32 NV_EVENT_REGISTER_CALLBACK::version
 
NV_EVENT_TYPE NV_EVENT_REGISTER_CALLBACK::eventId
 
void * NV_EVENT_REGISTER_CALLBACK::callbackParam
 
NVAPI_CALLBACK_QSYNCEVENT   NV_EVENT_REGISTER_CALLBACK::nvQSYNCEventCallback 
 
union { 
 
   NVAPI_CALLBACK_QSYNCEVENT   NV_EVENT_REGISTER_CALLBACK::nvQSYNCEventCallback 
 
} NV_EVENT_REGISTER_CALLBACK::nvCallBackFunc 
 
NvU32 NV_SCANOUT_INTENSITY_DATA_V1::version
 
NvU32 NV_SCANOUT_INTENSITY_DATA_V1::width
 
NvU32 NV_SCANOUT_INTENSITY_DATA_V1::height
 
float * NV_SCANOUT_INTENSITY_DATA_V1::blendingTexture
 
NvU32 NV_SCANOUT_INTENSITY_DATA_V2::version
 
NvU32 NV_SCANOUT_INTENSITY_DATA_V2::width
 
NvU32 NV_SCANOUT_INTENSITY_DATA_V2::height
 
float * NV_SCANOUT_INTENSITY_DATA_V2::blendingTexture
 
float * NV_SCANOUT_INTENSITY_DATA_V2::offsetTexture
 
NvU32 NV_SCANOUT_INTENSITY_DATA_V2::offsetTexChannels
 
NvU32 _NV_SCANOUT_INTENSITY_STATE_DATA::version
 
NvU32 _NV_SCANOUT_INTENSITY_STATE_DATA::bEnabled
 
NvU32 NV_SCANOUT_WARPING_DATA::version
 
float * NV_SCANOUT_WARPING_DATA::vertices
 
NV_GPU_WARPING_VERTICE_FORMAT NV_SCANOUT_WARPING_DATA::vertexFormat
 
int NV_SCANOUT_WARPING_DATA::numVertices
 
NvSBox * NV_SCANOUT_WARPING_DATA::textureRect
 
NvU32 _NV_SCANOUT_WARPING_STATE_DATA::version
 
NvU32 _NV_SCANOUT_WARPING_STATE_DATA::bEnabled
 
NvU32 _NV_SCANOUT_INFORMATION::version
 
NvSBox _NV_SCANOUT_INFORMATION::sourceDesktopRect
 
NvSBox _NV_SCANOUT_INFORMATION::sourceViewportRect
 
NvSBox _NV_SCANOUT_INFORMATION::targetViewportRect
 
NvU32 _NV_SCANOUT_INFORMATION::targetDisplayWidth
 
NvU32 _NV_SCANOUT_INFORMATION::targetDisplayHeight
 
NvU32 _NV_SCANOUT_INFORMATION::cloneImportance
 
NV_ROTATE _NV_SCANOUT_INFORMATION::sourceToTargetRotation
 
NvU32 _NV_GPU_VIRTUALIZATION_INFO::version
 
NV_VIRTUALIZATION_MODE _NV_GPU_VIRTUALIZATION_INFO::virtualizationMode
 
NvU32 _NV_GPU_VIRTUALIZATION_INFO::reserved
 
NvU32 _NV_LOGICAL_GPU_DATA_V1::version
 
void * _NV_LOGICAL_GPU_DATA_V1::pOSAdapterId
 
NvU32 _NV_LOGICAL_GPU_DATA_V1::physicalGpuCount
 
NvPhysicalGpuHandle _NV_LOGICAL_GPU_DATA_V1::physicalGpuHandles [NVAPI_MAX_PHYSICAL_GPUS]
 
NvU32 _NV_LOGICAL_GPU_DATA_V1::reserved [8]
 
NvU32 _NV_LICENSE_EXPIRY_DETAILS::year
 
NvU16 _NV_LICENSE_EXPIRY_DETAILS::month
 
NvU16 _NV_LICENSE_EXPIRY_DETAILS::day
 
NvU16 _NV_LICENSE_EXPIRY_DETAILS::hour
 
NvU16 _NV_LICENSE_EXPIRY_DETAILS::min
 
NvU16 _NV_LICENSE_EXPIRY_DETAILS::sec
 
NvU8 _NV_LICENSE_EXPIRY_DETAILS::status
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V1::version
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V1::isEnabled: 1
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V1::reserved: 31
 
NV_LICENSE_FEATURE_TYPE _NV_LICENSE_FEATURE_DETAILS_V1::featureCode
 
NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V1::licenseInfo
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V2::version
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V2::isEnabled: 1
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V2::reserved: 31
 
NV_LICENSE_FEATURE_TYPE _NV_LICENSE_FEATURE_DETAILS_V2::featureCode
 
NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V2::licenseInfo
 
NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V2::productName
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V3::version
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V3::isEnabled: 1
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V3::isFeatureEnabled: 1
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V3::reserved: 30
 
NV_LICENSE_FEATURE_TYPE _NV_LICENSE_FEATURE_DETAILS_V3::featureCode
 
NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V3::licenseInfo
 
NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V3::productName
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V4::version
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V4::isEnabled: 1
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V4::isFeatureEnabled: 1
 
NvU32 _NV_LICENSE_FEATURE_DETAILS_V4::reserved: 30
 
NV_LICENSE_FEATURE_TYPE _NV_LICENSE_FEATURE_DETAILS_V4::featureCode
 
NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V4::licenseInfo
 
NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V4::productName
 
NV_LICENSE_EXPIRY_DETAILS _NV_LICENSE_FEATURE_DETAILS_V4::licenseExpiry
 
NvU32 _NV_LICENSABLE_FEATURES_V1::version
 
NvU32 _NV_LICENSABLE_FEATURES_V1::isLicenseSupported: 1
 
NvU32 _NV_LICENSABLE_FEATURES_V1::reserved: 31
 
NvU32 _NV_LICENSABLE_FEATURES_V1::licensableFeatureCount
 
NvU8 _NV_LICENSABLE_FEATURES_V1::signature [NV_LICENSE_SIGNATURE_SIZE]
 
NV_LICENSE_FEATURE_DETAILS_V1 _NV_LICENSABLE_FEATURES_V1::licenseDetails [NV_LICENSE_MAX_COUNT]
 
NvU32 _NV_LICENSABLE_FEATURES_V2::version
 
NvU32 _NV_LICENSABLE_FEATURES_V2::isLicenseSupported: 1
 
NvU32 _NV_LICENSABLE_FEATURES_V2::reserved: 31
 
NvU32 _NV_LICENSABLE_FEATURES_V2::licensableFeatureCount
 
NvU8 _NV_LICENSABLE_FEATURES_V2::signature [NV_LICENSE_SIGNATURE_SIZE]
 
NV_LICENSE_FEATURE_DETAILS_V2 _NV_LICENSABLE_FEATURES_V2::licenseDetails [NV_LICENSE_MAX_COUNT]
 
NvU32 _NV_LICENSABLE_FEATURES_V3::version
 
NvU32 _NV_LICENSABLE_FEATURES_V3::isLicenseSupported: 1
 
NvU32 _NV_LICENSABLE_FEATURES_V3::reserved: 31
 
NvU32 _NV_LICENSABLE_FEATURES_V3::licensableFeatureCount
 
NvU8 _NV_LICENSABLE_FEATURES_V3::signature [NV_LICENSE_SIGNATURE_SIZE]
 
NV_LICENSE_FEATURE_DETAILS_V3 _NV_LICENSABLE_FEATURES_V3::licenseDetails [NV_LICENSE_MAX_COUNT]
 
NvU32 _NV_LICENSABLE_FEATURES_V4::version
 
NvU32 _NV_LICENSABLE_FEATURES_V4::isLicenseSupported: 1
 
NvU32 _NV_LICENSABLE_FEATURES_V4::reserved: 31
 
NvU32 _NV_LICENSABLE_FEATURES_V4::licensableFeatureCount
 
NvU8 _NV_LICENSABLE_FEATURES_V4::signature [NV_LICENSE_SIGNATURE_SIZE]
 
NV_LICENSE_FEATURE_DETAILS_V4 _NV_LICENSABLE_FEATURES_V4::licenseDetails [NV_LICENSE_MAX_COUNT]
 
NvU32 NVLINK_GET_CAPS_V1::version
 
NvU32 NVLINK_GET_CAPS_V1::capsTbl
 
NvU8 NVLINK_GET_CAPS_V1::lowestNvlinkVersion
 
NvU8 NVLINK_GET_CAPS_V1::highestNvlinkVersion
 
NvU8 NVLINK_GET_CAPS_V1::lowestNciVersion
 
NvU8 NVLINK_GET_CAPS_V1::highestNciVersion
 
NvU32 NVLINK_GET_CAPS_V1::linkMask
 
NvU32 NVLINK_DEVICE_INFO_V1::deviceIdFlags
 
NvU16 NVLINK_DEVICE_INFO_V1::domain
 
NvU16 NVLINK_DEVICE_INFO_V1::bus
 
NvU16 NVLINK_DEVICE_INFO_V1::device
 
NvU16 NVLINK_DEVICE_INFO_V1::function
 
NvU32 NVLINK_DEVICE_INFO_V1::pciDeviceId
 
NvU64 NVLINK_DEVICE_INFO_V1::deviceType
 
NvU8 NVLINK_DEVICE_INFO_V1::deviceUUID [16]
 
NvU32 NVLINK_LINK_STATUS_INFO_V1::capsTbl
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::phyType
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::subLinkWidth
 
NvU32 NVLINK_LINK_STATUS_INFO_V1::linkState
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::rxSublinkStatus
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::txSublinkStatus
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::nvlinkVersion
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::nciVersion
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::phyVersion
 
NvU32 NVLINK_LINK_STATUS_INFO_V1::nvlinkCommonClockSpeedMhz
 
NvU32 NVLINK_LINK_STATUS_INFO_V1::nvlinkRefClkSpeedMhz
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::nvlinkRefClkType
 
NvU32 NVLINK_LINK_STATUS_INFO_V1::nvlinkLinkClockMhz
 
NvU32 NVLINK_LINK_STATUS_INFO_V1::connected:1
 
NvU32 NVLINK_LINK_STATUS_INFO_V1::reserved:31
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::loopProperty
 
NvU8 NVLINK_LINK_STATUS_INFO_V1::remoteDeviceLinkNumber
 
NVLINK_DEVICE_INFO_V1 NVLINK_LINK_STATUS_INFO_V1::remoteDeviceInfo
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::capsTbl
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::phyType
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::subLinkWidth
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::linkState
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::rxSublinkStatus
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::txSublinkStatus
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::nvlinkVersion
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::nciVersion
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::phyVersion
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::nvlinkCommonClockSpeedMhz
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::nvlinkRefClkSpeedMhz
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::nvlinkRefClkType
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::nvlinkLinkClockMhz
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::connected:1
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::reserved:31
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::loopProperty
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::remoteDeviceLinkNumber
 
NVLINK_DEVICE_INFO_V1 NVLINK_LINK_STATUS_INFO_V2::remoteDeviceInfo
 
NvU8 NVLINK_LINK_STATUS_INFO_V2::localDeviceLinkNumber
 
NVLINK_DEVICE_INFO_V1 NVLINK_LINK_STATUS_INFO_V2::localDeviceInfo
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::nvlinkLineRateMbps
 
NvU32 NVLINK_LINK_STATUS_INFO_V2::reservedEx [8]
 
NvU32 NVLINK_GET_STATUS_V1::version
 
NvU32 NVLINK_GET_STATUS_V1::linkMask
 
NVLINK_LINK_STATUS_INFO_V1 NVLINK_GET_STATUS_V1::linkInfo [NVAPI_NVLINK_MAX_LINKS]
 
NvU32 NVLINK_GET_STATUS_V2::version
 
NvU32 NVLINK_GET_STATUS_V2::linkMask
 
NVLINK_LINK_STATUS_INFO_V2 NVLINK_GET_STATUS_V2::linkInfo [NVAPI_NVLINK_MAX_LINKS]
 
NvU32 _NV_GPU_INFO_V1::version
 
NvU32 _NV_GPU_INFO_V1::bIsExternalGpu:1
 
NvU32 _NV_GPU_INFO_V1::reserved:31
 
NvU32 _NV_GPU_INFO_V2::version
 
NvU32 _NV_GPU_INFO_V2::bIsExternalGpu:1
 
NvU32 _NV_GPU_INFO_V2::reserved0:31
 
NvU64 _NV_GPU_INFO_V2::reserved1
 
NvU32 _NV_GPU_INFO_V2::rayTracingCores
 
NvU32 _NV_GPU_INFO_V2::tensorCores
 
NvU32 _NV_GPU_INFO_V2::reserved2 [14]
 
NvU32 _NV_GPU_VR_READY_V1::version
 
NvU32 _NV_GPU_VR_READY_V1::isVRReady: 1
 
NvU32 _NV_GPU_VR_READY_V1::reserved: 31
 
NvU32 _NV_GPU_GSP_INFO_V1::version
 
NvU8 _NV_GPU_GSP_INFO_V1::firmwareVersion [NVAPI_GPU_MAX_BUILD_VERSION_LENGTH]
 
NvU32 _NV_GPU_GSP_INFO_V1::reserved
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V1::version
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V1::flags
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V1::numPstates
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V1::numClocks
 
NV_GPU_PERF_PSTATE_ID   NV_GPU_PERF_PSTATES_INFO_V1::pstateId 
 
NvU32   NV_GPU_PERF_PSTATES_INFO_V1::flags 
 
NV_GPU_PUBLIC_CLOCK_ID   NV_GPU_PERF_PSTATES_INFO_V1::domainId 
 
NvU32   NV_GPU_PERF_PSTATES_INFO_V1::flags 
 
NvU32   NV_GPU_PERF_PSTATES_INFO_V1::freq 
 
struct { 
 
   NV_GPU_PUBLIC_CLOCK_ID   NV_GPU_PERF_PSTATES_INFO_V1::domainId 
 
   NvU32   NV_GPU_PERF_PSTATES_INFO_V1::flags 
 
   NvU32   NV_GPU_PERF_PSTATES_INFO_V1::freq 
 
}   NV_GPU_PERF_PSTATES_INFO_V1::clocks [NVAPI_MAX_GPU_PERF_CLOCKS] 
 
struct { 
 
   NV_GPU_PERF_PSTATE_ID   NV_GPU_PERF_PSTATES_INFO_V1::pstateId 
 
   NvU32   NV_GPU_PERF_PSTATES_INFO_V1::flags 
 
   struct { 
 
      NV_GPU_PUBLIC_CLOCK_ID   NV_GPU_PERF_PSTATES_INFO_V1::domainId 
 
      NvU32   NV_GPU_PERF_PSTATES_INFO_V1::flags 
 
      NvU32   NV_GPU_PERF_PSTATES_INFO_V1::freq 
 
   }   NV_GPU_PERF_PSTATES_INFO_V1::clocks [NVAPI_MAX_GPU_PERF_CLOCKS] 
 
} NV_GPU_PERF_PSTATES_INFO_V1::pstates [NVAPI_MAX_GPU_PERF_PSTATES] 
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V2::version
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V2::flags
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V2::numPstates
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V2::numClocks
 
NvU32 NV_GPU_PERF_PSTATES_INFO_V2::numVoltages
 
NV_GPU_PERF_PSTATE_ID   NV_GPU_PERF_PSTATES_INFO_V2::pstateId 
 
NvU32   NV_GPU_PERF_PSTATES_INFO_V2::flags 
 
NV_GPU_PUBLIC_CLOCK_ID   NV_GPU_PERF_PSTATES_INFO_V2::domainId 
 
NvU32   NV_GPU_PERF_PSTATES_INFO_V2::flags 
 
NvU32   NV_GPU_PERF_PSTATES_INFO_V2::freq 
 
struct { 
 
   NV_GPU_PUBLIC_CLOCK_ID   NV_GPU_PERF_PSTATES_INFO_V2::domainId 
 
   NvU32   NV_GPU_PERF_PSTATES_INFO_V2::flags 
 
   NvU32   NV_GPU_PERF_PSTATES_INFO_V2::freq 
 
}   NV_GPU_PERF_PSTATES_INFO_V2::clocks [NVAPI_MAX_GPU_PERF_CLOCKS] 
 
NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID   NV_GPU_PERF_PSTATES_INFO_V2::domainId 
 
NvU32   NV_GPU_PERF_PSTATES_INFO_V2::flags 
 
NvU32   NV_GPU_PERF_PSTATES_INFO_V2::mvolt 
 
struct { 
 
   NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID   NV_GPU_PERF_PSTATES_INFO_V2::domainId 
 
   NvU32   NV_GPU_PERF_PSTATES_INFO_V2::flags 
 
   NvU32   NV_GPU_PERF_PSTATES_INFO_V2::mvolt 
 
}   NV_GPU_PERF_PSTATES_INFO_V2::voltages [NVAPI_MAX_GPU_PERF_VOLTAGES] 
 
struct { 
 
   NV_GPU_PERF_PSTATE_ID   NV_GPU_PERF_PSTATES_INFO_V2::pstateId 
 
   NvU32   NV_GPU_PERF_PSTATES_INFO_V2::flags 
 
   struct { 
 
      NV_GPU_PUBLIC_CLOCK_ID   NV_GPU_PERF_PSTATES_INFO_V2::domainId 
 
      NvU32   NV_GPU_PERF_PSTATES_INFO_V2::flags 
 
      NvU32   NV_GPU_PERF_PSTATES_INFO_V2::freq 
 
   }   NV_GPU_PERF_PSTATES_INFO_V2::clocks [NVAPI_MAX_GPU_PERF_CLOCKS] 
 
   struct { 
 
      NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID   NV_GPU_PERF_PSTATES_INFO_V2::domainId 
 
      NvU32   NV_GPU_PERF_PSTATES_INFO_V2::flags 
 
      NvU32   NV_GPU_PERF_PSTATES_INFO_V2::mvolt 
 
   }   NV_GPU_PERF_PSTATES_INFO_V2::voltages [NVAPI_MAX_GPU_PERF_VOLTAGES] 
 
} NV_GPU_PERF_PSTATES_INFO_V2::pstates [NVAPI_MAX_GPU_PERF_PSTATES] 
 
NvU32 NV_GPU_DYNAMIC_PSTATES_INFO_EX::version
 
NvU32 NV_GPU_DYNAMIC_PSTATES_INFO_EX::flags
 
NvU32   NV_GPU_DYNAMIC_PSTATES_INFO_EX::bIsPresent:1 
 
NvU32   NV_GPU_DYNAMIC_PSTATES_INFO_EX::percentage 
 
struct { 
 
   NvU32   NV_GPU_DYNAMIC_PSTATES_INFO_EX::bIsPresent:1 
 
   NvU32   NV_GPU_DYNAMIC_PSTATES_INFO_EX::percentage 
 
} NV_GPU_DYNAMIC_PSTATES_INFO_EX::utilization [NVAPI_MAX_GPU_UTILIZATIONS] 
 
NvU32 NV_GPU_THERMAL_SETTINGS_V1::version
 
NvU32 NV_GPU_THERMAL_SETTINGS_V1::count
 
NV_THERMAL_CONTROLLER   NV_GPU_THERMAL_SETTINGS_V1::controller 
 
NvU32   NV_GPU_THERMAL_SETTINGS_V1::defaultMinTemp 
 
NvU32   NV_GPU_THERMAL_SETTINGS_V1::defaultMaxTemp 
 
NvU32   NV_GPU_THERMAL_SETTINGS_V1::currentTemp 
 
NV_THERMAL_TARGET   NV_GPU_THERMAL_SETTINGS_V1::target 
 
struct { 
 
   NV_THERMAL_CONTROLLER   NV_GPU_THERMAL_SETTINGS_V1::controller 
 
   NvU32   NV_GPU_THERMAL_SETTINGS_V1::defaultMinTemp 
 
   NvU32   NV_GPU_THERMAL_SETTINGS_V1::defaultMaxTemp 
 
   NvU32   NV_GPU_THERMAL_SETTINGS_V1::currentTemp 
 
   NV_THERMAL_TARGET   NV_GPU_THERMAL_SETTINGS_V1::target 
 
} NV_GPU_THERMAL_SETTINGS_V1::sensor [NVAPI_MAX_THERMAL_SENSORS_PER_GPU] 
 
NvU32 NV_GPU_THERMAL_SETTINGS_V2::version
 
NvU32 NV_GPU_THERMAL_SETTINGS_V2::count
 
NV_THERMAL_CONTROLLER   NV_GPU_THERMAL_SETTINGS_V2::controller 
 
NvS32   NV_GPU_THERMAL_SETTINGS_V2::defaultMinTemp 
 
NvS32   NV_GPU_THERMAL_SETTINGS_V2::defaultMaxTemp 
 
NvS32   NV_GPU_THERMAL_SETTINGS_V2::currentTemp 
 
NV_THERMAL_TARGET   NV_GPU_THERMAL_SETTINGS_V2::target 
 
struct { 
 
   NV_THERMAL_CONTROLLER   NV_GPU_THERMAL_SETTINGS_V2::controller 
 
   NvS32   NV_GPU_THERMAL_SETTINGS_V2::defaultMinTemp 
 
   NvS32   NV_GPU_THERMAL_SETTINGS_V2::defaultMaxTemp 
 
   NvS32   NV_GPU_THERMAL_SETTINGS_V2::currentTemp 
 
   NV_THERMAL_TARGET   NV_GPU_THERMAL_SETTINGS_V2::target 
 
} NV_GPU_THERMAL_SETTINGS_V2::sensor [NVAPI_MAX_THERMAL_SENSORS_PER_GPU] 
 
NvU32 NV_GPU_CLOCK_FREQUENCIES_V1::version
 
NvU32 NV_GPU_CLOCK_FREQUENCIES_V1::reserved
 
NvU32   NV_GPU_CLOCK_FREQUENCIES_V1::bIsPresent:1 
 
NvU32   NV_GPU_CLOCK_FREQUENCIES_V1::reserved:31 
 
NvU32   NV_GPU_CLOCK_FREQUENCIES_V1::frequency 
 
struct { 
 
   NvU32   NV_GPU_CLOCK_FREQUENCIES_V1::bIsPresent:1 
 
   NvU32   NV_GPU_CLOCK_FREQUENCIES_V1::reserved:31 
 
   NvU32   NV_GPU_CLOCK_FREQUENCIES_V1::frequency 
 
} NV_GPU_CLOCK_FREQUENCIES_V1::domain [NVAPI_MAX_GPU_PUBLIC_CLOCKS] 
 
NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::version
 
NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::ClockType:4
 
NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::reserved:20
 
NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::reserved1:8
 
NvU32   NV_GPU_CLOCK_FREQUENCIES_V2::bIsPresent:1 
 
NvU32   NV_GPU_CLOCK_FREQUENCIES_V2::reserved:31 
 
NvU32   NV_GPU_CLOCK_FREQUENCIES_V2::frequency 
 
struct { 
 
   NvU32   NV_GPU_CLOCK_FREQUENCIES_V2::bIsPresent:1 
 
   NvU32   NV_GPU_CLOCK_FREQUENCIES_V2::reserved:31 
 
   NvU32   NV_GPU_CLOCK_FREQUENCIES_V2::frequency 
 
} NV_GPU_CLOCK_FREQUENCIES_V2::domain [NVAPI_MAX_GPU_PUBLIC_CLOCKS] 
 
NvU32 _NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM_V1::version
 
NvPhysicalGpuHandle _NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM_V1::hPhysicalGpu
 
NV_GPU_ILLUMINATION_ATTRIB _NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM_V1::Attribute
 
NvU32 _NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM_V1::bSupported
 
NvU32 _NV_GPU_GET_ILLUMINATION_PARM_V1::version
 
NvPhysicalGpuHandle _NV_GPU_GET_ILLUMINATION_PARM_V1::hPhysicalGpu
 
NV_GPU_ILLUMINATION_ATTRIB _NV_GPU_GET_ILLUMINATION_PARM_V1::Attribute
 
NvU32 _NV_GPU_GET_ILLUMINATION_PARM_V1::Value
 
NvU32 _NV_GPU_SET_ILLUMINATION_PARM_V1::version
 
NvPhysicalGpuHandle _NV_GPU_SET_ILLUMINATION_PARM_V1::hPhysicalGpu
 
NV_GPU_ILLUMINATION_ATTRIB _NV_GPU_SET_ILLUMINATION_PARM_V1::Attribute
 
NvU32 _NV_GPU_SET_ILLUMINATION_PARM_V1::Value
 
NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_MCUV10::i2cDevIdx
 
NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW::gpioPinRed
 
NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW::gpioPinGreen
 
NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW::gpioPinBlue
 
NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW::gpioPinWhite
 
NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_SINGLE_COLOR::gpioPinSingleColor
 
NV_GPU_CLIENT_ILLUM_DEVICE_TYPE _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::type
 
NvU32 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::ctrlModeMask
 
NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_MCUV10   _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::mcuv10 
 
NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW   _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::gpioPwmRgbwv10 
 
NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::gpioPwmSingleColorv10 
 
NvU8   _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::rsvd [64] 
 
union { 
 
   NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_MCUV10   _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::mcuv10 
 
   NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW   _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::gpioPwmRgbwv10 
 
   NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::gpioPwmSingleColorv10 
 
   NvU8   _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::rsvd [64] 
 
} _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::data 
 
NvU32 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_PARAMS_V1::version
 
NvU32 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_PARAMS_V1::numIllumDevices
 
NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_PARAMS_V1::rsvd [64]
 
NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_PARAMS_V1::devices [NV_GPU_CLIENT_ILLUM_DEVICE_NUM_DEVICES_MAX]
 
NvBool NV_GPU_CLIENT_ILLUM_DEVICE_SYNC_V1::bSync
 
NvU64 NV_GPU_CLIENT_ILLUM_DEVICE_SYNC_V1::timeStampms
 
NvU8 NV_GPU_CLIENT_ILLUM_DEVICE_SYNC_V1::rsvd [64]
 
NV_GPU_CLIENT_ILLUM_DEVICE_TYPE NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_V1::type
 
NV_GPU_CLIENT_ILLUM_DEVICE_SYNC_V1 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_V1::syncData
 
NvU8 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_V1::rsvd [64]
 
NvU32 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_PARAMS_V1::version
 
NvU32 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_PARAMS_V1::numIllumDevices
 
NvU8 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_PARAMS_V1::rsvd [64]
 
NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_V1 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_PARAMS_V1::devices [NV_GPU_CLIENT_ILLUM_DEVICE_NUM_DEVICES_MAX]
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGB::rsvd
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGBW::rsvd
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_SINGLE_COLOR::rsvd
 
NV_GPU_CLIENT_ILLUM_ZONE_TYPE _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::type
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::illumDeviceIdx
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::provIdx
 
NV_GPU_CLIENT_ILLUM_ZONE_LOCATION _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::zoneLocation
 
NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGB   _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rgb 
 
NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGBW   _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rgbw 
 
NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::singleColor 
 
NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rsvd [64] 
 
union { 
 
   NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGB   _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rgb 
 
   NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGBW   _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rgbw 
 
   NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::singleColor 
 
   NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rsvd [64] 
 
} _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::data 
 
NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_PARAMS_V1::version
 
NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_PARAMS_V1::numIllumZones
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_PARAMS_V1::rsvd [64]
 
NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_PARAMS_V1::zones [NV_GPU_CLIENT_ILLUM_ZONE_NUM_ZONES_MAX]
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS::colorR
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS::colorG
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS::colorB
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS::brightnessPct
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB::rgbParams
 
NV_GPU_CLIENT_ILLUM_PIECEWISE_LINEAR_CYCLE_TYPE _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::cycleType
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::grpCount
 
NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::riseTimems
 
NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::fallTimems
 
NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::ATimems
 
NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::BTimems
 
NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::grpIdleTimems
 
NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::phaseOffsetms
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGB::rgbParams [NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_COLOR_ENDPOINTS]
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGB::piecewiseLinearData
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::manualRGB 
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGB   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::piecewiseLinearRGB 
 
NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::rsvd [64] 
 
union { 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::manualRGB 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGB   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::piecewiseLinearRGB 
 
   NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::rsvd [64] 
 
} _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::data 
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED_PARAMS::brightnessPct
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED::colorFixedParams
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_COLOR_FIXED::colorFixedParams [NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_COLOR_ENDPOINTS]
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_COLOR_FIXED::piecewiseLinearData
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::manualColorFixed 
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_COLOR_FIXED   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::piecewiseLinearColorFixed 
 
NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::rsvd [64] 
 
union { 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::manualColorFixed 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_COLOR_FIXED   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::piecewiseLinearColorFixed 
 
   NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::rsvd [64] 
 
} _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::data 
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::colorR
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::colorG
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::colorB
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::colorW
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::brightnessPct
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW::rgbwParams
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGBW::rgbwParams [NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_COLOR_ENDPOINTS]
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGBW::piecewiseLinearData
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::manualRGBW 
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGBW   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::piecewiseLinearRGBW 
 
NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::rsvd [64] 
 
union { 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::manualRGBW 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGBW   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::piecewiseLinearRGBW 
 
   NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::rsvd [64] 
 
} _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::data 
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR_PARAMS::brightnessPct
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR::singleColorParams
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_SINGLE_COLOR::singleColorParams [NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_COLOR_ENDPOINTS]
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_SINGLE_COLOR::piecewiseLinearData
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::manualSingleColor 
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::piecewiseLinearSingleColor 
 
NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::rsvd [64] 
 
union { 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::manualSingleColor 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::piecewiseLinearSingleColor 
 
   NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::rsvd [64] 
 
} _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::data 
 
NV_GPU_CLIENT_ILLUM_ZONE_TYPE _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::type
 
NV_GPU_CLIENT_ILLUM_CTRL_MODE _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::ctrlMode
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rgb 
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::colorFixed 
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rgbw 
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::singleColor 
 
NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rsvd [64] 
 
union { 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rgb 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::colorFixed 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rgbw 
 
   NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::singleColor 
 
   NvU8   _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rsvd [64] 
 
} _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::data 
 
NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::version
 
NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::bDefault: 1
 
NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::rsvdField: 31
 
NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::numIllumZonesControl
 
NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::rsvd [64]
 
NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::zones [NV_GPU_CLIENT_ILLUM_ZONE_NUM_ZONES_MAX]
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::version
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::dpcd_ver
 
NV_DP_LINK_RATE _NV_DISPLAY_PORT_INFO_V1::maxLinkRate
 
NV_DP_LANE_COUNT _NV_DISPLAY_PORT_INFO_V1::maxLaneCount
 
NV_DP_LINK_RATE _NV_DISPLAY_PORT_INFO_V1::curLinkRate
 
NV_DP_LANE_COUNT _NV_DISPLAY_PORT_INFO_V1::curLaneCount
 
NV_DP_COLOR_FORMAT _NV_DISPLAY_PORT_INFO_V1::colorFormat
 
NV_DP_DYNAMIC_RANGE _NV_DISPLAY_PORT_INFO_V1::dynamicRange
 
NV_DP_COLORIMETRY _NV_DISPLAY_PORT_INFO_V1::colorimetry
 
NV_DP_BPC _NV_DISPLAY_PORT_INFO_V1::bpc
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isDp: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isInternalDp: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isColorCtrlSupported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is6BPCSupported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is8BPCSupported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is10BPCSupported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is12BPCSupported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is16BPCSupported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCrCb420Supported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCrCb422Supported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCrCb444Supported: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isRgb444SupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCbCr444SupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCbCr422SupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCbCr420SupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is6BPCSupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is8BPCSupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is10BPCSupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is12BPCSupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::is16BPCSupportedOnCurrentMode: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonxvYCC601Capable: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonxvYCC709Capable: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonsYCC601Capable: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonAdobeYCC601Capable: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonAdobeRGBCapable: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonBT2020RGBCapable: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonBT2020YCCCapable: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonBT2020cYCCCapable: 1
 
NvU32 _NV_DISPLAY_PORT_INFO_V1::reserved: 4
 
NvU32 NV_DISPLAY_PORT_CONFIG::version
 
NV_DP_LINK_RATE NV_DISPLAY_PORT_CONFIG::linkRate
 
NV_DP_LANE_COUNT NV_DISPLAY_PORT_CONFIG::laneCount
 
NV_DP_COLOR_FORMAT NV_DISPLAY_PORT_CONFIG::colorFormat
 
NV_DP_DYNAMIC_RANGE NV_DISPLAY_PORT_CONFIG::dynamicRange
 
NV_DP_COLORIMETRY NV_DISPLAY_PORT_CONFIG::colorimetry
 
NV_DP_BPC NV_DISPLAY_PORT_CONFIG::bpc
 
NvU32 NV_DISPLAY_PORT_CONFIG::isHPD: 1
 
NvU32 NV_DISPLAY_PORT_CONFIG::isSetDeferred: 1
 
NvU32 NV_DISPLAY_PORT_CONFIG::isChromaLpfOff: 1
 
NvU32 NV_DISPLAY_PORT_CONFIG::isDitherOff: 1
 
NvU32 NV_DISPLAY_PORT_CONFIG::testLinkTrain: 1
 
NvU32 NV_DISPLAY_PORT_CONFIG::testColorChange: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::version
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::isGpuHDMICapable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonUnderscanCapable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonBasicAudioCapable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonYCbCr444Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonYCbCr422Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonxvYCC601Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonxvYCC709Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonHDMI: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::reserved: 24
 
NvU32 _NV_HDMI_SUPPORT_INFO_V1::EDID861ExtRev
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::version
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isGpuHDMICapable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonUnderscanCapable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonBasicAudioCapable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonYCbCr444Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonYCbCr422Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonxvYCC601Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonxvYCC709Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonHDMI: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonsYCC601Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonAdobeYCC601Capable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonAdobeRGBCapable: 1
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::reserved: 21
 
NvU32 _NV_HDMI_SUPPORT_INFO_V2::EDID861ExtRev
 
NvU32 NV_INFOFRAME_PROPERTY::mode: 4
 
NvU32 NV_INFOFRAME_PROPERTY::blackList: 2
 
NvU32 NV_INFOFRAME_PROPERTY::reserved: 10
 
NvU32 NV_INFOFRAME_PROPERTY::version: 8
 
NvU32 NV_INFOFRAME_PROPERTY::length: 8
 
NvU32 NV_INFOFRAME_VIDEO::vic: 8
 
NvU32 NV_INFOFRAME_VIDEO::pixelRepeat: 5
 
NvU32 NV_INFOFRAME_VIDEO::colorSpace: 3
 
NvU32 NV_INFOFRAME_VIDEO::colorimetry: 3
 
NvU32 NV_INFOFRAME_VIDEO::extendedColorimetry: 4
 
NvU32 NV_INFOFRAME_VIDEO::rgbQuantizationRange: 3
 
NvU32 NV_INFOFRAME_VIDEO::yccQuantizationRange: 3
 
NvU32 NV_INFOFRAME_VIDEO::itContent: 2
 
NvU32 NV_INFOFRAME_VIDEO::contentTypes: 3
 
NvU32 NV_INFOFRAME_VIDEO::scanInfo: 3
 
NvU32 NV_INFOFRAME_VIDEO::activeFormatInfoPresent: 2
 
NvU32 NV_INFOFRAME_VIDEO::activeFormatAspectRatio: 5
 
NvU32 NV_INFOFRAME_VIDEO::picAspectRatio: 3
 
NvU32 NV_INFOFRAME_VIDEO::nonuniformScaling: 3
 
NvU32 NV_INFOFRAME_VIDEO::barInfo: 3
 
NvU32 NV_INFOFRAME_VIDEO::top_bar: 17
 
NvU32 NV_INFOFRAME_VIDEO::bottom_bar: 17
 
NvU32 NV_INFOFRAME_VIDEO::left_bar: 17
 
NvU32 NV_INFOFRAME_VIDEO::right_bar: 17
 
NvU32 NV_INFOFRAME_VIDEO::Future17: 2
 
NvU32 NV_INFOFRAME_VIDEO::Future47: 2
 
NvU32 NV_INFOFRAME_AUDIO::codingType: 5
 
NvU32 NV_INFOFRAME_AUDIO::codingExtensionType: 6
 
NvU32 NV_INFOFRAME_AUDIO::sampleSize: 3
 
NvU32 NV_INFOFRAME_AUDIO::sampleRate: 4
 
NvU32 NV_INFOFRAME_AUDIO::channelCount: 4
 
NvU32 NV_INFOFRAME_AUDIO::speakerPlacement: 9
 
NvU32 NV_INFOFRAME_AUDIO::downmixInhibit: 2
 
NvU32 NV_INFOFRAME_AUDIO::lfePlaybackLevel: 3
 
NvU32 NV_INFOFRAME_AUDIO::levelShift: 5
 
NvU32 NV_INFOFRAME_AUDIO::Future12: 2
 
NvU32 NV_INFOFRAME_AUDIO::Future2x: 4
 
NvU32 NV_INFOFRAME_AUDIO::Future3x: 4
 
NvU32 NV_INFOFRAME_AUDIO::Future52: 2
 
NvU32 NV_INFOFRAME_AUDIO::Future6: 9
 
NvU32 NV_INFOFRAME_AUDIO::Future7: 9
 
NvU32 NV_INFOFRAME_AUDIO::Future8: 9
 
NvU32 NV_INFOFRAME_AUDIO::Future9: 9
 
NvU32 NV_INFOFRAME_AUDIO::Future10: 9
 
NvU32 NV_INFOFRAME_DATA::version
 
NvU16 NV_INFOFRAME_DATA::size
 
NvU8 NV_INFOFRAME_DATA::cmd
 
NvU8 NV_INFOFRAME_DATA::type
 
NV_INFOFRAME_PROPERTY   NV_INFOFRAME_DATA::property 
 
NV_INFOFRAME_AUDIO   NV_INFOFRAME_DATA::audio 
 
NV_INFOFRAME_VIDEO   NV_INFOFRAME_DATA::video 
 
union { 
 
   NV_INFOFRAME_PROPERTY   NV_INFOFRAME_DATA::property 
 
   NV_INFOFRAME_AUDIO   NV_INFOFRAME_DATA::audio 
 
   NV_INFOFRAME_VIDEO   NV_INFOFRAME_DATA::video 
 
} NV_INFOFRAME_DATA::infoframe 
 
NvU32 _NV_COLOR_DATA_V1::version
 
NvU16 _NV_COLOR_DATA_V1::size
 
NvU8 _NV_COLOR_DATA_V1::cmd
 
NvU8   _NV_COLOR_DATA_V1::colorFormat 
 
NvU8   _NV_COLOR_DATA_V1::colorimetry 
 
struct { 
 
   NvU8   _NV_COLOR_DATA_V1::colorFormat 
 
   NvU8   _NV_COLOR_DATA_V1::colorimetry 
 
} _NV_COLOR_DATA_V1::data 
 
NvU32 _NV_COLOR_DATA_V2::version
 
NvU16 _NV_COLOR_DATA_V2::size
 
NvU8 _NV_COLOR_DATA_V2::cmd
 
NvU8   _NV_COLOR_DATA_V2::colorFormat 
 
NvU8   _NV_COLOR_DATA_V2::colorimetry 
 
NvU8   _NV_COLOR_DATA_V2::dynamicRange 
 
struct { 
 
   NvU8   _NV_COLOR_DATA_V2::colorFormat 
 
   NvU8   _NV_COLOR_DATA_V2::colorimetry 
 
   NvU8   _NV_COLOR_DATA_V2::dynamicRange 
 
} _NV_COLOR_DATA_V2::data 
 
NvU32 _NV_COLOR_DATA_V3::version
 
NvU16 _NV_COLOR_DATA_V3::size
 
NvU8 _NV_COLOR_DATA_V3::cmd
 
NvU8   _NV_COLOR_DATA_V3::colorFormat 
 
NvU8   _NV_COLOR_DATA_V3::colorimetry 
 
NvU8   _NV_COLOR_DATA_V3::dynamicRange 
 
NV_BPC   _NV_COLOR_DATA_V3::bpc 
 
struct { 
 
   NvU8   _NV_COLOR_DATA_V3::colorFormat 
 
   NvU8   _NV_COLOR_DATA_V3::colorimetry 
 
   NvU8   _NV_COLOR_DATA_V3::dynamicRange 
 
   NV_BPC   _NV_COLOR_DATA_V3::bpc 
 
} _NV_COLOR_DATA_V3::data 
 
NvU32 _NV_COLOR_DATA_V4::version
 
NvU16 _NV_COLOR_DATA_V4::size
 
NvU8 _NV_COLOR_DATA_V4::cmd
 
NvU8   _NV_COLOR_DATA_V4::colorFormat 
 
NvU8   _NV_COLOR_DATA_V4::colorimetry 
 
NvU8   _NV_COLOR_DATA_V4::dynamicRange 
 
NV_BPC   _NV_COLOR_DATA_V4::bpc 
 
NV_COLOR_SELECTION_POLICY   _NV_COLOR_DATA_V4::colorSelectionPolicy 
 
struct { 
 
   NvU8   _NV_COLOR_DATA_V4::colorFormat 
 
   NvU8   _NV_COLOR_DATA_V4::colorimetry 
 
   NvU8   _NV_COLOR_DATA_V4::dynamicRange 
 
   NV_BPC   _NV_COLOR_DATA_V4::bpc 
 
   NV_COLOR_SELECTION_POLICY   _NV_COLOR_DATA_V4::colorSelectionPolicy 
 
} _NV_COLOR_DATA_V4::data 
 
NvU32 _NV_COLOR_DATA_V5::version
 
NvU16 _NV_COLOR_DATA_V5::size
 
NvU8 _NV_COLOR_DATA_V5::cmd
 
NvU8   _NV_COLOR_DATA_V5::colorFormat 
 
NvU8   _NV_COLOR_DATA_V5::colorimetry 
 
NvU8   _NV_COLOR_DATA_V5::dynamicRange 
 
NV_BPC   _NV_COLOR_DATA_V5::bpc 
 
NV_COLOR_SELECTION_POLICY   _NV_COLOR_DATA_V5::colorSelectionPolicy 
 
NV_DESKTOP_COLOR_DEPTH   _NV_COLOR_DATA_V5::depth 
 
struct { 
 
   NvU8   _NV_COLOR_DATA_V5::colorFormat 
 
   NvU8   _NV_COLOR_DATA_V5::colorimetry 
 
   NvU8   _NV_COLOR_DATA_V5::dynamicRange 
 
   NV_BPC   _NV_COLOR_DATA_V5::bpc 
 
   NV_COLOR_SELECTION_POLICY   _NV_COLOR_DATA_V5::colorSelectionPolicy 
 
   NV_DESKTOP_COLOR_DEPTH   _NV_COLOR_DATA_V5::depth 
 
} _NV_COLOR_DATA_V5::data 
 
NvU32 _NV_HDR_CAPABILITIES_V1::version
 
NvU32 _NV_HDR_CAPABILITIES_V1::isST2084EotfSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V1::isTraditionalHdrGammaSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V1::isEdrSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V1::driverExpandDefaultHdrParameters:1
 
NvU32 _NV_HDR_CAPABILITIES_V1::isTraditionalSdrGammaSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V1::reserved:27
 
NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_CAPABILITIES_V1::static_metadata_descriptor_id
 
NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_x0 
 
NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_y0 
 
NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_x1 
 
NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_y1 
 
NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_x2 
 
NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_y2 
 
NvU16   _NV_HDR_CAPABILITIES_V1::displayWhitePoint_x 
 
NvU16   _NV_HDR_CAPABILITIES_V1::displayWhitePoint_y 
 
NvU16   _NV_HDR_CAPABILITIES_V1::desired_content_max_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V1::desired_content_min_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V1::desired_content_max_frame_average_luminance 
 
struct { 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_x0 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_y0 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_x1 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_y1 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_x2 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::displayPrimary_y2 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::displayWhitePoint_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::displayWhitePoint_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::desired_content_max_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::desired_content_min_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V1::desired_content_max_frame_average_luminance 
 
} _NV_HDR_CAPABILITIES_V1::display_data 
 
NvU32 _NV_HDR_CAPABILITIES_V2::version
 
NvU32 _NV_HDR_CAPABILITIES_V2::isST2084EotfSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V2::isTraditionalHdrGammaSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V2::isEdrSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V2::driverExpandDefaultHdrParameters:1
 
NvU32 _NV_HDR_CAPABILITIES_V2::isTraditionalSdrGammaSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V2::isDolbyVisionSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V2::reserved:26
 
NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_CAPABILITIES_V2::static_metadata_descriptor_id
 
NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_x0 
 
NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_y0 
 
NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_x1 
 
NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_y1 
 
NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_x2 
 
NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_y2 
 
NvU16   _NV_HDR_CAPABILITIES_V2::displayWhitePoint_x 
 
NvU16   _NV_HDR_CAPABILITIES_V2::displayWhitePoint_y 
 
NvU16   _NV_HDR_CAPABILITIES_V2::desired_content_max_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V2::desired_content_min_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V2::desired_content_max_frame_average_luminance 
 
struct { 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_x0 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_y0 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_x1 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_y1 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_x2 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::displayPrimary_y2 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::displayWhitePoint_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::displayWhitePoint_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::desired_content_max_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::desired_content_min_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::desired_content_max_frame_average_luminance 
 
} _NV_HDR_CAPABILITIES_V2::display_data 
 
NvU32   _NV_HDR_CAPABILITIES_V2::VSVDB_version: 3 
 
NvU32   _NV_HDR_CAPABILITIES_V2::dm_version: 8 
 
NvU32   _NV_HDR_CAPABILITIES_V2::supports_2160p60hz: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V2::supports_YUV422_12bit: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V2::supports_global_dimming: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V2::colorimetry: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V2::supports_backlight_control: 2 
 
NvU32   _NV_HDR_CAPABILITIES_V2::backlt_min_luma: 2 
 
NvU32   _NV_HDR_CAPABILITIES_V2::interface_supported_by_sink: 2 
 
NvU32   _NV_HDR_CAPABILITIES_V2::supports_10b_12b_444: 2 
 
NvU32   _NV_HDR_CAPABILITIES_V2::reserved: 9 
 
NvU16   _NV_HDR_CAPABILITIES_V2::target_min_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V2::target_max_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V2::cc_red_x 
 
NvU16   _NV_HDR_CAPABILITIES_V2::cc_red_y 
 
NvU16   _NV_HDR_CAPABILITIES_V2::cc_green_x 
 
NvU16   _NV_HDR_CAPABILITIES_V2::cc_green_y 
 
NvU16   _NV_HDR_CAPABILITIES_V2::cc_blue_x 
 
NvU16   _NV_HDR_CAPABILITIES_V2::cc_blue_y 
 
NvU16   _NV_HDR_CAPABILITIES_V2::cc_white_x 
 
NvU16   _NV_HDR_CAPABILITIES_V2::cc_white_y 
 
struct { 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::VSVDB_version: 3 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::dm_version: 8 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::supports_2160p60hz: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::supports_YUV422_12bit: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::supports_global_dimming: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::colorimetry: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::supports_backlight_control: 2 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::backlt_min_luma: 2 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::interface_supported_by_sink: 2 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::supports_10b_12b_444: 2 
 
   NvU32   _NV_HDR_CAPABILITIES_V2::reserved: 9 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::target_min_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::target_max_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::cc_red_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::cc_red_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::cc_green_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::cc_green_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::cc_blue_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::cc_blue_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::cc_white_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V2::cc_white_y 
 
} _NV_HDR_CAPABILITIES_V2::dv_static_metadata 
 
NvU32 _NV_HDR_CAPABILITIES_V3::version
 
NvU32 _NV_HDR_CAPABILITIES_V3::isST2084EotfSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V3::isTraditionalHdrGammaSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V3::isEdrSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V3::driverExpandDefaultHdrParameters:1
 
NvU32 _NV_HDR_CAPABILITIES_V3::isTraditionalSdrGammaSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V3::isDolbyVisionSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V3::isHdr10PlusSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V3::isHdr10PlusGamingSupported:1
 
NvU32 _NV_HDR_CAPABILITIES_V3::reserved:24
 
NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_CAPABILITIES_V3::static_metadata_descriptor_id
 
NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_x0 
 
NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_y0 
 
NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_x1 
 
NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_y1 
 
NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_x2 
 
NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_y2 
 
NvU16   _NV_HDR_CAPABILITIES_V3::displayWhitePoint_x 
 
NvU16   _NV_HDR_CAPABILITIES_V3::displayWhitePoint_y 
 
NvU16   _NV_HDR_CAPABILITIES_V3::desired_content_max_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V3::desired_content_min_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V3::desired_content_max_frame_average_luminance 
 
struct { 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_x0 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_y0 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_x1 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_y1 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_x2 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::displayPrimary_y2 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::displayWhitePoint_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::displayWhitePoint_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::desired_content_max_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::desired_content_min_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::desired_content_max_frame_average_luminance 
 
} _NV_HDR_CAPABILITIES_V3::display_data 
 
NvU32   _NV_HDR_CAPABILITIES_V3::VSVDB_version: 3 
 
NvU32   _NV_HDR_CAPABILITIES_V3::dm_version: 8 
 
NvU32   _NV_HDR_CAPABILITIES_V3::supports_2160p60hz: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V3::supports_YUV422_12bit: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V3::supports_global_dimming: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V3::colorimetry: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V3::supports_backlight_control: 2 
 
NvU32   _NV_HDR_CAPABILITIES_V3::backlt_min_luma: 2 
 
NvU32   _NV_HDR_CAPABILITIES_V3::interface_supported_by_sink: 2 
 
NvU32   _NV_HDR_CAPABILITIES_V3::supports_10b_12b_444: 2 
 
NvU32   _NV_HDR_CAPABILITIES_V3::parity: 1 
 
NvU32   _NV_HDR_CAPABILITIES_V3::reserved: 8 
 
NvU16   _NV_HDR_CAPABILITIES_V3::target_min_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V3::target_max_luminance 
 
NvU16   _NV_HDR_CAPABILITIES_V3::cc_red_x 
 
NvU16   _NV_HDR_CAPABILITIES_V3::cc_red_y 
 
NvU16   _NV_HDR_CAPABILITIES_V3::cc_green_x 
 
NvU16   _NV_HDR_CAPABILITIES_V3::cc_green_y 
 
NvU16   _NV_HDR_CAPABILITIES_V3::cc_blue_x 
 
NvU16   _NV_HDR_CAPABILITIES_V3::cc_blue_y 
 
NvU16   _NV_HDR_CAPABILITIES_V3::cc_white_x 
 
NvU16   _NV_HDR_CAPABILITIES_V3::cc_white_y 
 
struct { 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::VSVDB_version: 3 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::dm_version: 8 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::supports_2160p60hz: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::supports_YUV422_12bit: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::supports_global_dimming: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::colorimetry: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::supports_backlight_control: 2 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::backlt_min_luma: 2 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::interface_supported_by_sink: 2 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::supports_10b_12b_444: 2 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::parity: 1 
 
   NvU32   _NV_HDR_CAPABILITIES_V3::reserved: 8 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::target_min_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::target_max_luminance 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::cc_red_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::cc_red_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::cc_green_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::cc_green_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::cc_blue_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::cc_blue_y 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::cc_white_x 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::cc_white_y 
 
} _NV_HDR_CAPABILITIES_V3::dv_static_metadata 
 
NvU16   _NV_HDR_CAPABILITIES_V3::application_version: 2 
 
NvU16   _NV_HDR_CAPABILITIES_V3::full_frame_peak_luminance_index: 2 
 
NvU16   _NV_HDR_CAPABILITIES_V3::peak_luminance_index: 4 
 
NvU16   _NV_HDR_CAPABILITIES_V3::reserved: 8 
 
struct { 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::application_version: 2 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::full_frame_peak_luminance_index: 2 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::peak_luminance_index: 4 
 
   NvU16   _NV_HDR_CAPABILITIES_V3::reserved: 8 
 
} _NV_HDR_CAPABILITIES_V3::hdr10plus_vsvdb 
 
NvU32 _NV_HDR_COLOR_DATA_V1::version
 
NV_HDR_CMD _NV_HDR_COLOR_DATA_V1::cmd
 
NV_HDR_MODE _NV_HDR_COLOR_DATA_V1::hdrMode
 
NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_COLOR_DATA_V1::static_metadata_descriptor_id
 
NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_x0 
 
NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_y0 
 
NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_x1 
 
NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_y1 
 
NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_x2 
 
NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_y2 
 
NvU16   _NV_HDR_COLOR_DATA_V1::displayWhitePoint_x 
 
NvU16   _NV_HDR_COLOR_DATA_V1::displayWhitePoint_y 
 
NvU16   _NV_HDR_COLOR_DATA_V1::max_display_mastering_luminance 
 
NvU16   _NV_HDR_COLOR_DATA_V1::min_display_mastering_luminance 
 
NvU16   _NV_HDR_COLOR_DATA_V1::max_content_light_level 
 
NvU16   _NV_HDR_COLOR_DATA_V1::max_frame_average_light_level 
 
struct { 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_x0 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_y0 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_x1 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_y1 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_x2 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::displayPrimary_y2 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::displayWhitePoint_x 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::displayWhitePoint_y 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::max_display_mastering_luminance 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::min_display_mastering_luminance 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::max_content_light_level 
 
   NvU16   _NV_HDR_COLOR_DATA_V1::max_frame_average_light_level 
 
} _NV_HDR_COLOR_DATA_V1::mastering_display_data 
 
NvU32 _NV_HDR_COLOR_DATA_V2::version
 
NV_HDR_CMD _NV_HDR_COLOR_DATA_V2::cmd
 
NV_HDR_MODE _NV_HDR_COLOR_DATA_V2::hdrMode
 
NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_COLOR_DATA_V2::static_metadata_descriptor_id
 
NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_x0 
 
NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_y0 
 
NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_x1 
 
NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_y1 
 
NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_x2 
 
NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_y2 
 
NvU16   _NV_HDR_COLOR_DATA_V2::displayWhitePoint_x 
 
NvU16   _NV_HDR_COLOR_DATA_V2::displayWhitePoint_y 
 
NvU16   _NV_HDR_COLOR_DATA_V2::max_display_mastering_luminance 
 
NvU16   _NV_HDR_COLOR_DATA_V2::min_display_mastering_luminance 
 
NvU16   _NV_HDR_COLOR_DATA_V2::max_content_light_level 
 
NvU16   _NV_HDR_COLOR_DATA_V2::max_frame_average_light_level 
 
struct { 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_x0 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_y0 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_x1 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_y1 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_x2 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::displayPrimary_y2 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::displayWhitePoint_x 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::displayWhitePoint_y 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::max_display_mastering_luminance 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::min_display_mastering_luminance 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::max_content_light_level 
 
   NvU16   _NV_HDR_COLOR_DATA_V2::max_frame_average_light_level 
 
} _NV_HDR_COLOR_DATA_V2::mastering_display_data 
 
NV_COLOR_FORMAT _NV_HDR_COLOR_DATA_V2::hdrColorFormat
 
NV_DYNAMIC_RANGE _NV_HDR_COLOR_DATA_V2::hdrDynamicRange
 
NV_BPC _NV_HDR_COLOR_DATA_V2::hdrBpc
 
NvU32 _NV_HDR_METADATA_V1::version
 
NvU16 _NV_HDR_METADATA_V1::displayPrimary_x0
 
NvU16 _NV_HDR_METADATA_V1::displayPrimary_y0
 
NvU16 _NV_HDR_METADATA_V1::displayPrimary_x1
 
NvU16 _NV_HDR_METADATA_V1::displayPrimary_y1
 
NvU16 _NV_HDR_METADATA_V1::displayPrimary_x2
 
NvU16 _NV_HDR_METADATA_V1::displayPrimary_y2
 
NvU16 _NV_HDR_METADATA_V1::displayWhitePoint_x
 
NvU16 _NV_HDR_METADATA_V1::displayWhitePoint_y
 
NvU16 _NV_HDR_METADATA_V1::max_display_mastering_luminance
 
NvU16 _NV_HDR_METADATA_V1::min_display_mastering_luminance
 
NvU16 _NV_HDR_METADATA_V1::max_content_light_level
 
NvU16 _NV_HDR_METADATA_V1::max_frame_average_light_level
 
NvU32 NV_TIMING_FLAG::isInterlaced: 4
 
NvU32 NV_TIMING_FLAG::reserved0: 12
 
NvU32   NV_TIMING_FLAG::tvFormat: 8 
 
NvU32   NV_TIMING_FLAG::ceaId: 8 
 
NvU32   NV_TIMING_FLAG::nvPsfId: 8 
 
union { 
 
   NvU32   NV_TIMING_FLAG::tvFormat: 8 
 
   NvU32   NV_TIMING_FLAG::ceaId: 8 
 
   NvU32   NV_TIMING_FLAG::nvPsfId: 8 
 
};  
 
NvU32 NV_TIMING_FLAG::scaling: 8
 
NvU32 _NV_TIMING_INPUT::version
 
NvU32 _NV_TIMING_INPUT::width
 
NvU32 _NV_TIMING_INPUT::height
 
float _NV_TIMING_INPUT::rr
 
NV_TIMING_FLAG _NV_TIMING_INPUT::flag
 
NV_TIMING_OVERRIDE _NV_TIMING_INPUT::type
 
NvU8 _NV_MONITOR_CAPS_VCDB::quantizationRangeYcc: 1
 
NvU8 _NV_MONITOR_CAPS_VCDB::quantizationRangeRgb: 1
 
NvU8 _NV_MONITOR_CAPS_VCDB::scanInfoPreferredVideoFormat: 2
 
NvU8 _NV_MONITOR_CAPS_VCDB::scanInfoITVideoFormats: 2
 
NvU8 _NV_MONITOR_CAPS_VCDB::scanInfoCEVideoFormats: 2
 
NvU8 _NV_MONITOR_CAPS_VSDB::sourcePhysicalAddressB: 4
 
NvU8 _NV_MONITOR_CAPS_VSDB::sourcePhysicalAddressA: 4
 
NvU8 _NV_MONITOR_CAPS_VSDB::sourcePhysicalAddressD: 4
 
NvU8 _NV_MONITOR_CAPS_VSDB::sourcePhysicalAddressC: 4
 
NvU8 _NV_MONITOR_CAPS_VSDB::supportDualDviOperation: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::reserved6: 2
 
NvU8 _NV_MONITOR_CAPS_VSDB::supportDeepColorYCbCr444: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::supportDeepColor30bits: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::supportDeepColor36bits: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::supportDeepColor48bits: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::supportAI: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::maxTmdsClock
 
NvU8 _NV_MONITOR_CAPS_VSDB::cnc0SupportGraphicsTextContent: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::cnc1SupportPhotoContent: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::cnc2SupportCinemaContent: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::cnc3SupportGameContent: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::reserved8: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::hasVicEntries: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::hasInterlacedLatencyField: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::hasLatencyField: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::videoLatency
 
NvU8 _NV_MONITOR_CAPS_VSDB::audioLatency
 
NvU8 _NV_MONITOR_CAPS_VSDB::interlacedVideoLatency
 
NvU8 _NV_MONITOR_CAPS_VSDB::interlacedAudioLatency
 
NvU8 _NV_MONITOR_CAPS_VSDB::reserved13: 7
 
NvU8 _NV_MONITOR_CAPS_VSDB::has3dEntries: 1
 
NvU8 _NV_MONITOR_CAPS_VSDB::hdmi3dLength: 5
 
NvU8 _NV_MONITOR_CAPS_VSDB::hdmiVicLength: 3
 
NvU8 _NV_MONITOR_CAPS_VSDB::hdmi_vic [7]
 
NvU8 _NV_MONITOR_CAPS_VSDB::hdmi_3d [31]
 
NvU8 _NV_MONITOR_CAPS_GENERIC::supportVRR: 1
 
NvU8 _NV_MONITOR_CAPS_GENERIC::supportULMB: 1
 
NvU8 _NV_MONITOR_CAPS_GENERIC::isTrueGsync: 1
 
NvU8 _NV_MONITOR_CAPS_GENERIC::isRLACapable: 1
 
NvU8 _NV_MONITOR_CAPS_GENERIC::currentlyCapableOfVRR: 1
 
NvU8 _NV_MONITOR_CAPS_GENERIC::reserved: 3
 
NvU32 _NV_MONITOR_CAPABILITIES_V1::version
 
NvU16 _NV_MONITOR_CAPABILITIES_V1::size
 
NvU32 _NV_MONITOR_CAPABILITIES_V1::infoType
 
NvU32 _NV_MONITOR_CAPABILITIES_V1::connectorType
 
NvU8 _NV_MONITOR_CAPABILITIES_V1::bIsValidInfo: 1
 
NV_MONITOR_CAPS_VSDB   _NV_MONITOR_CAPABILITIES_V1::vsdb 
 
NV_MONITOR_CAPS_VCDB   _NV_MONITOR_CAPABILITIES_V1::vcdb 
 
NV_MONITOR_CAPS_GENERIC   _NV_MONITOR_CAPABILITIES_V1::caps 
 
union { 
 
   NV_MONITOR_CAPS_VSDB   _NV_MONITOR_CAPABILITIES_V1::vsdb 
 
   NV_MONITOR_CAPS_VCDB   _NV_MONITOR_CAPABILITIES_V1::vcdb 
 
   NV_MONITOR_CAPS_GENERIC   _NV_MONITOR_CAPABILITIES_V1::caps 
 
} _NV_MONITOR_CAPABILITIES_V1::data 
 
NvU32 _NV_MONITOR_COLOR_DATA::version
 
NV_DP_COLOR_FORMAT _NV_MONITOR_COLOR_DATA::colorFormat
 
NV_DP_BPC _NV_MONITOR_COLOR_DATA::backendBitDepths
 
NvU32 NV_CUSTOM_DISPLAY::version
 
NvU32 NV_CUSTOM_DISPLAY::width
 
NvU32 NV_CUSTOM_DISPLAY::height
 
NvU32 NV_CUSTOM_DISPLAY::depth
 
NV_FORMAT NV_CUSTOM_DISPLAY::colorFormat
 
NV_VIEWPORTF NV_CUSTOM_DISPLAY::srcPartition
 
float NV_CUSTOM_DISPLAY::xRatio
 
float NV_CUSTOM_DISPLAY::yRatio
 
NV_TIMING NV_CUSTOM_DISPLAY::timing
 
NvU32 NV_CUSTOM_DISPLAY::hwModeSetOnly: 1
 
NvU32 _NV_EDID_DATA_V1::version
 
NvU8 * _NV_EDID_DATA_V1::pEDID
 
NvU32 _NV_EDID_DATA_V1::sizeOfEDID
 
NvU32 _NV_EDID_DATA_V2::version
 
NvU8 * _NV_EDID_DATA_V2::pEDID
 
NvU32 _NV_EDID_DATA_V2::sizeOfEDID
 
NvU32 _NV_EDID_DATA_V2::reserved [8]
 
NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::version
 
NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::maxFrameInterval
 
NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::bDisableAdaptiveSync: 1
 
NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::bDisableFrameSplitting: 1
 
NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::reserved: 30
 
NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::lastFlipRefreshCount
 
NvU64 _NV_GET_ADAPTIVE_SYNC_DATA_V1::lastFlipTimeStamp
 
NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::reservedEx [4]
 
NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::version
 
NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::maxFrameInterval
 
NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::bDisableAdaptiveSync: 1
 
NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::bDisableFrameSplitting: 1
 
NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::reserved: 30
 
NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::reservedEx [7]
 
NvU32 _NV_GET_VIRTUAL_REFRESH_RATE_DATA_V1::version
 
NvU32 _NV_GET_VIRTUAL_REFRESH_RATE_DATA_V1::frameIntervalUs
 
NvU32 _NV_GET_VIRTUAL_REFRESH_RATE_DATA_V1::reservedEx [8]
 
NvU32 _NV_SET_VIRTUAL_REFRESH_RATE_DATA_V1::version
 
NvU32 _NV_SET_VIRTUAL_REFRESH_RATE_DATA_V1::frameIntervalUs
 
NvU32 _NV_SET_VIRTUAL_REFRESH_RATE_DATA_V1::reservedEx [8]
 
NvU32 NV_SET_PREFERRED_STEREO_DISPLAY_V1::version
 
NvU32 NV_SET_PREFERRED_STEREO_DISPLAY_V1::displayId
 
NvU32 NV_SET_PREFERRED_STEREO_DISPLAY_V1::reserved
 
NvU32 NV_GET_PREFERRED_STEREO_DISPLAY_V1::version
 
NvU32 NV_GET_PREFERRED_STEREO_DISPLAY_V1::displayId
 
NvU32 NV_GET_PREFERRED_STEREO_DISPLAY_V1::reserved
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::version
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::displayId
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::isAcquired: 1
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::isMosaic: 1
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::reserved: 30
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::version
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::displayId
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bSetPosition: 1
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bRemovePosition: 1
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bPositionIsAvailable: 1
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bSetName: 1
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bRemoveName: 1
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bNameIsAvailable: 1
 
NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::reserved: 26
 
NvS32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::positionX
 
NvS32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::positionY
 
NvAPI_ShortString _NV_MANAGED_DEDICATED_DISPLAY_METADATA::name
 
NvU32 _NV_GET_VRR_INFO_V1::version
 
NvU32 _NV_GET_VRR_INFO_V1::bIsVRREnabled: 1
 
NvU32 _NV_GET_VRR_INFO_V1::bIsVRRPossible: 1
 
NvU32 _NV_GET_VRR_INFO_V1::bIsVRRRequested: 1
 
NvU32 _NV_GET_VRR_INFO_V1::bIsVRRIndicatorEnabled: 1
 
NvU32 _NV_GET_VRR_INFO_V1::bIsDisplayInVRRMode: 1
 
NvU32 _NV_GET_VRR_INFO_V1::reserved: 27
 
NvU32 _NV_GET_VRR_INFO_V1::reservedEx [4]
 
NvU32 NV_MOSAIC_TOPO_DETAILS::version
 
NvLogicalGpuHandle NV_MOSAIC_TOPO_DETAILS::hLogicalGPU
 
NvU32 NV_MOSAIC_TOPO_DETAILS::validityMask
 
NvU32 NV_MOSAIC_TOPO_DETAILS::rowCount
 
NvU32 NV_MOSAIC_TOPO_DETAILS::colCount
 
NvPhysicalGpuHandle   NV_MOSAIC_TOPO_DETAILS::hPhysicalGPU 
 
NvU32   NV_MOSAIC_TOPO_DETAILS::displayOutputId 
 
NvS32   NV_MOSAIC_TOPO_DETAILS::overlapX 
 
NvS32   NV_MOSAIC_TOPO_DETAILS::overlapY 
 
struct { 
 
   NvPhysicalGpuHandle   NV_MOSAIC_TOPO_DETAILS::hPhysicalGPU 
 
   NvU32   NV_MOSAIC_TOPO_DETAILS::displayOutputId 
 
   NvS32   NV_MOSAIC_TOPO_DETAILS::overlapX 
 
   NvS32   NV_MOSAIC_TOPO_DETAILS::overlapY 
 
} NV_MOSAIC_TOPO_DETAILS::gpuLayout [NVAPI_MAX_MOSAIC_DISPLAY_ROWS][NVAPI_MAX_MOSAIC_DISPLAY_COLUMNS] 
 
NvU32 NV_MOSAIC_TOPO_BRIEF::version
 
NV_MOSAIC_TOPO NV_MOSAIC_TOPO_BRIEF::topo
 
NvU32 NV_MOSAIC_TOPO_BRIEF::enabled
 
NvU32 NV_MOSAIC_TOPO_BRIEF::isPossible
 
NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::version
 
NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::width
 
NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::height
 
NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::bpp
 
NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::freq
 
NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::version
 
NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::width
 
NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::height
 
NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::bpp
 
NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::freq
 
NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::rrx1k
 
NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::version
 
NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::topoBriefsCount
 
NV_MOSAIC_TOPO_BRIEF _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::topoBriefs [NV_MOSAIC_TOPO_MAX]
 
NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::displaySettingsCount
 
NV_MOSAIC_DISPLAY_SETTING_V1 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::displaySettings [NV_MOSAIC_DISPLAY_SETTINGS_MAX]
 
NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::version
 
NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::topoBriefsCount
 
NV_MOSAIC_TOPO_BRIEF _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::topoBriefs [NV_MOSAIC_TOPO_MAX]
 
NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::displaySettingsCount
 
NV_MOSAIC_DISPLAY_SETTING_V2 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::displaySettings [NV_MOSAIC_DISPLAY_SETTINGS_MAX]
 
NvU32 NV_MOSAIC_TOPO_GROUP::version
 
NV_MOSAIC_TOPO_BRIEF NV_MOSAIC_TOPO_GROUP::brief
 
NvU32 NV_MOSAIC_TOPO_GROUP::count
 
NV_MOSAIC_TOPO_DETAILS NV_MOSAIC_TOPO_GROUP::topos [NV_MOSAIC_MAX_TOPO_PER_TOPO_GROUP]
 
NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::displayId
 
NvS32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::overlapX
 
NvS32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::overlapY
 
NV_ROTATE _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::rotation
 
NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::cloneGroup
 
NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::version
 
NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::displayId
 
NvS32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::overlapX
 
NvS32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::overlapY
 
NV_ROTATE _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::rotation
 
NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::cloneGroup
 
NV_PIXEL_SHIFT_TYPE _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::pixelShiftType
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::version
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::rows
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::columns
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::displayCount
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::applyWithBezelCorrect: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::immersiveGaming: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::baseMosaic: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::driverReloadAllowed: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::acceleratePrimaryDisplay: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V1::reserved: 27
 
NV_MOSAIC_GRID_TOPO_DISPLAY_V1 _NV_MOSAIC_GRID_TOPO_V1::displays [NV_MOSAIC_MAX_DISPLAYS]
 
NV_MOSAIC_DISPLAY_SETTING_V1 _NV_MOSAIC_GRID_TOPO_V1::displaySettings
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::version
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::rows
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::columns
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::displayCount
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::applyWithBezelCorrect: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::immersiveGaming: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::baseMosaic: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::driverReloadAllowed: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::acceleratePrimaryDisplay: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::pixelShift: 1
 
NvU32 _NV_MOSAIC_GRID_TOPO_V2::reserved: 26
 
NV_MOSAIC_GRID_TOPO_DISPLAY_V2 _NV_MOSAIC_GRID_TOPO_V2::displays [NV_MOSAIC_MAX_DISPLAYS]
 
NV_MOSAIC_DISPLAY_SETTING_V1 _NV_MOSAIC_GRID_TOPO_V2::displaySettings
 
NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::version
 
NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::errorFlags
 
NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::warningFlags
 
NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::displayCount
 
NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::displayId 
 
NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::errorFlags 
 
NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::warningFlags 
 
NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::supportsRotation: 1 
 
NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::reserved: 31 
 
struct { 
 
   NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::displayId 
 
   NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::errorFlags 
 
   NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::warningFlags 
 
   NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::supportsRotation: 1 
 
   NvU32   NV_MOSAIC_DISPLAY_TOPO_STATUS::reserved: 31 
 
} NV_MOSAIC_DISPLAY_TOPO_STATUS::displays [NVAPI_MAX_DISPLAYS] 
 
NvU32 NV_MOSAIC_TOPOLOGY::version
 
NvU32 NV_MOSAIC_TOPOLOGY::rowCount
 
NvU32 NV_MOSAIC_TOPOLOGY::colCount
 
NvPhysicalGpuHandle   NV_MOSAIC_TOPOLOGY::hPhysicalGPU 
 
NvU32   NV_MOSAIC_TOPOLOGY::displayOutputId 
 
NvS32   NV_MOSAIC_TOPOLOGY::overlapX 
 
NvS32   NV_MOSAIC_TOPOLOGY::overlapY 
 
struct { 
 
   NvPhysicalGpuHandle   NV_MOSAIC_TOPOLOGY::hPhysicalGPU 
 
   NvU32   NV_MOSAIC_TOPOLOGY::displayOutputId 
 
   NvS32   NV_MOSAIC_TOPOLOGY::overlapX 
 
   NvS32   NV_MOSAIC_TOPOLOGY::overlapY 
 
} NV_MOSAIC_TOPOLOGY::gpuLayout [NVAPI_MAX_MOSAIC_DISPLAY_ROWS][NVAPI_MAX_MOSAIC_DISPLAY_COLUMNS] 
 
NvU32 NV_MOSAIC_SUPPORTED_TOPOLOGIES::version
 
NvU32 NV_MOSAIC_SUPPORTED_TOPOLOGIES::totalCount
 
NV_MOSAIC_TOPOLOGY NV_MOSAIC_SUPPORTED_TOPOLOGIES::topos [NVAPI_MAX_MOSAIC_TOPOS]
 
NvU32 _NV_GSYNC_CAPABILITIES_V1::version
 
NvU32 _NV_GSYNC_CAPABILITIES_V1::boardId
 
NvU32 _NV_GSYNC_CAPABILITIES_V1::revision
 
NvU32 _NV_GSYNC_CAPABILITIES_V1::capFlags
 
NvU32 _NV_GSYNC_CAPABILITIES_V2::version
 
NvU32 _NV_GSYNC_CAPABILITIES_V2::boardId
 
NvU32 _NV_GSYNC_CAPABILITIES_V2::revision
 
NvU32 _NV_GSYNC_CAPABILITIES_V2::capFlags
 
NvU32 _NV_GSYNC_CAPABILITIES_V2::extendedRevision
 
NvU32 _NV_GSYNC_CAPABILITIES_V3::version
 
NvU32 _NV_GSYNC_CAPABILITIES_V3::boardId
 
NvU32 _NV_GSYNC_CAPABILITIES_V3::revision
 
NvU32 _NV_GSYNC_CAPABILITIES_V3::capFlags
 
NvU32 _NV_GSYNC_CAPABILITIES_V3::extendedRevision
 
NvU32 _NV_GSYNC_CAPABILITIES_V3::bIsMulDivSupported: 1
 
NvU32 _NV_GSYNC_CAPABILITIES_V3::reserved: 31
 
NvU32 _NV_GSYNC_CAPABILITIES_V3::maxMulDivValue
 
NvU32 _NV_GSYNC_GPU::version
 
NvPhysicalGpuHandle _NV_GSYNC_GPU::hPhysicalGpu
 
NVAPI_GSYNC_GPU_TOPOLOGY_CONNECTOR _NV_GSYNC_GPU::connector
 
NvPhysicalGpuHandle _NV_GSYNC_GPU::hProxyPhysicalGpu
 
NvU32 _NV_GSYNC_GPU::isSynced: 1
 
NvU32 _NV_GSYNC_GPU::reserved: 31
 
NvU32 _NV_GSYNC_DISPLAY::version
 
NvU32 _NV_GSYNC_DISPLAY::displayId
 
NvU32 _NV_GSYNC_DISPLAY::isMasterable: 1
 
NvU32 _NV_GSYNC_DISPLAY::reserved: 31
 
NVAPI_GSYNC_DISPLAY_SYNC_STATE _NV_GSYNC_DISPLAY::syncState
 
NvU32 _NV_GSYNC_DELAY::version
 
NvU32 _NV_GSYNC_DELAY::numLines
 
NvU32 _NV_GSYNC_DELAY::numPixels
 
NvU32 _NV_GSYNC_DELAY::maxLines
 
NvU32 _NV_GSYNC_DELAY::minPixels
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::version
 
NVAPI_GSYNC_POLARITY _NV_GSYNC_CONTROL_PARAMS_V1::polarity
 
NVAPI_GSYNC_VIDEO_MODE _NV_GSYNC_CONTROL_PARAMS_V1::vmode
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::interval
 
NVAPI_GSYNC_SYNC_SOURCE _NV_GSYNC_CONTROL_PARAMS_V1::source
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::interlaceMode:1
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::syncSourceIsOutput:1
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::reserved:30
 
NV_GSYNC_DELAY _NV_GSYNC_CONTROL_PARAMS_V1::syncSkew
 
NV_GSYNC_DELAY _NV_GSYNC_CONTROL_PARAMS_V1::startupDelay
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::version
 
NVAPI_GSYNC_POLARITY _NV_GSYNC_CONTROL_PARAMS_V2::polarity
 
NVAPI_GSYNC_VIDEO_MODE _NV_GSYNC_CONTROL_PARAMS_V2::vmode
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::interval
 
NVAPI_GSYNC_SYNC_SOURCE _NV_GSYNC_CONTROL_PARAMS_V2::source
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::interlaceMode:1
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::syncSourceIsOutput:1
 
NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::reserved:30
 
NV_GSYNC_DELAY _NV_GSYNC_CONTROL_PARAMS_V2::syncSkew
 
NV_GSYNC_DELAY _NV_GSYNC_CONTROL_PARAMS_V2::startupDelay
 
NVAPI_GSYNC_MULTIPLY_DIVIDE_MODE _NV_GSYNC_CONTROL_PARAMS_V2::multiplyDivideMode
 
NvU8 _NV_GSYNC_CONTROL_PARAMS_V2::multiplyDivideValue
 
NvU32 _NV_GSYNC_STATUS::version
 
NvU32 _NV_GSYNC_STATUS::bIsSynced
 
NvU32 _NV_GSYNC_STATUS::bIsStereoSynced
 
NvU32 _NV_GSYNC_STATUS::bIsSyncSignalAvailable
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V1::version
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V1::refreshRate
 
NVAPI_GSYNC_RJ45_IO _NV_GSYNC_STATUS_PARAMS_V1::RJ45_IO [NVAPI_MAX_RJ45_PER_GSYNC]
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V1::RJ45_Ethernet [NVAPI_MAX_RJ45_PER_GSYNC]
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V1::houseSyncIncoming
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V1::bHouseSync
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V2::version
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V2::refreshRate
 
NVAPI_GSYNC_RJ45_IO _NV_GSYNC_STATUS_PARAMS_V2::RJ45_IO [NVAPI_MAX_RJ45_PER_GSYNC]
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V2::RJ45_Ethernet [NVAPI_MAX_RJ45_PER_GSYNC]
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V2::houseSyncIncoming
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V2::bHouseSync
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V2::bInternalSlave: 1
 
NvU32 _NV_GSYNC_STATUS_PARAMS_V2::reserved: 31
 
NvU32 _NV_DX_VIDEO_STEREO_INFO::dwVersion
 
NVDX_ObjectHandle _NV_DX_VIDEO_STEREO_INFO::hSurface
 
NVDX_ObjectHandle _NV_DX_VIDEO_STEREO_INFO::hLinkedSurface
 
NV_STEREO_VIDEO_FORMAT _NV_DX_VIDEO_STEREO_INFO::eFormat
 
NvS32 _NV_DX_VIDEO_STEREO_INFO::sViewOffset
 
BOOL _NV_DX_VIDEO_STEREO_INFO::bStereoEnable
 
NvU32 _NV_JOIN_PRESENT_BARRIER_PARAMS::dwVersion
 
NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::dwVersion
 
NV_PRESENT_BARRIER_SYNC_MODE _NV_PRESENT_BARRIER_FRAME_STATISTICS::SyncMode
 
NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::PresentCount
 
NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::PresentInSyncCount
 
NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::FlipInSyncCount
 
NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::RefreshCount
 
D3D11_FILL_MODE NvAPI_D3D11_RASTERIZER_DESC_EX::FillMode
 
D3D11_CULL_MODE NvAPI_D3D11_RASTERIZER_DESC_EX::CullMode
 
BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::FrontCounterClockwise
 
INT NvAPI_D3D11_RASTERIZER_DESC_EX::DepthBias
 
FLOAT NvAPI_D3D11_RASTERIZER_DESC_EX::DepthBiasClamp
 
FLOAT NvAPI_D3D11_RASTERIZER_DESC_EX::SlopeScaledDepthBias
 
BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::DepthClipEnable
 
BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::ScissorEnable
 
BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::MultisampleEnable
 
BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::AntialiasedLineEnable
 
NvU32 NvAPI_D3D11_RASTERIZER_DESC_EX::ForcedSampleCount
 
bool NvAPI_D3D11_RASTERIZER_DESC_EX::ProgrammableSamplePositionsEnable
 
bool NvAPI_D3D11_RASTERIZER_DESC_EX::InterleavedSamplingEnable
 
NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::SampleCount
 
NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::SamplePositionsX [16]
 
NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::SamplePositionsY [16]
 
bool NvAPI_D3D11_RASTERIZER_DESC_EX::ConservativeRasterEnable
 
NVAPI_QUAD_FILLMODE NvAPI_D3D11_RASTERIZER_DESC_EX::QuadFillMode
 
bool NvAPI_D3D11_RASTERIZER_DESC_EX::PostZCoverageEnable
 
bool NvAPI_D3D11_RASTERIZER_DESC_EX::CoverageToColorEnable
 
NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::CoverageToColorRTIndex
 
bool NvAPI_D3D11_RASTERIZER_DESC_EX::TargetIndepentRasterWithDepth
 
NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::reserved [63]
 
NVAPI_ANSEL_FEATURE NVAPI_ANSEL_FEATURE_CONFIGURATION_STRUCT::featureId
 
NVAPI_ANSEL_FEATURE_STATE NVAPI_ANSEL_FEATURE_CONFIGURATION_STRUCT::featureState
 
UINT NVAPI_ANSEL_FEATURE_CONFIGURATION_STRUCT::hotkey
 
NvU32 NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::version
 
NVAPI_ANSEL_HOTKEY_MODIFIER NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::hotkeyModifier
 
UINT NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::keyEnable
 
UINT NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::numAnselFeatures
 
NVAPI_ANSEL_FEATURE_CONFIGURATION_STRUCT * NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::pAnselFeatures
 
BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::TargetIndependentRasterWithDepth
 
BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::ProgrammableSamplePositions
 
BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::InterleavedSampling
 
BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::ConservativeRaster
 
BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::PostZCoverage
 
BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::CoverageToColor
 
UINT _NV_CUSTOM_SEMANTIC::version
 
NV_CUSTOM_SEMANTIC_TYPE _NV_CUSTOM_SEMANTIC::NVCustomSemanticType
 
NvAPI_LongString _NV_CUSTOM_SEMANTIC::NVCustomSemanticNameString
 
BOOL _NV_CUSTOM_SEMANTIC::RegisterSpecified
 
NvU32 _NV_CUSTOM_SEMANTIC::RegisterNum
 
NvU32 _NV_CUSTOM_SEMANTIC::RegisterMask
 
NvU32 _NV_CUSTOM_SEMANTIC::Reserved
 
UINT NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::version
 
BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::UseViewportMask
 
BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::OffsetRtIndexByVpIndex
 
BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::ForceFastGS
 
BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::DontUseViewportOrder
 
BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::UseAttributeSkipMask
 
BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::UseCoordinateSwizzle
 
NvAPI_D3D11_SWIZZLE_MODE * NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::pCoordinateSwizzling
 
NvU32 NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::pCustomSemantics
 
BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::ConvertToFastGS
 
BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::UseSpecificShaderExt
 
UINT NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V1::version
 
NvU32 NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V1::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V1::pCustomSemantics
 
UINT NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V2::version
 
NvU32 NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V2::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V2::pCustomSemantics
 
BOOL NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V2::UseWithFastGS
 
UINT NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::version
 
NvU32 NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::pCustomSemantics
 
BOOL NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::UseWithFastGS
 
BOOL NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::UseSpecificShaderExt
 
UINT NvAPI_D3D11_CREATE_HULL_SHADER_EX_V1::version
 
NvU32 NvAPI_D3D11_CREATE_HULL_SHADER_EX_V1::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_HULL_SHADER_EX_V1::pCustomSemantics
 
BOOL NvAPI_D3D11_CREATE_HULL_SHADER_EX_V1::UseWithFastGS
 
UINT NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::version
 
NvU32 NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::pCustomSemantics
 
BOOL NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::UseWithFastGS
 
BOOL NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::UseSpecificShaderExt
 
UINT NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V1::version
 
NvU32 NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V1::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V1::pCustomSemantics
 
UINT NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V2::version
 
NvU32 NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V2::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V2::pCustomSemantics
 
BOOL NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V2::UseWithFastGS
 
UINT NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::version
 
NvU32 NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::pCustomSemantics
 
BOOL NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::UseWithFastGS
 
BOOL NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::UseSpecificShaderExt
 
UINT NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V1::version
 
NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V1::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V1::pCustomSemantics
 
UINT NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::version
 
NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::pCustomSemantics
 
NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::bEnableSuperSamplingPredicationForVRS: 1
 
NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::bEnableSuperSamplingPredicationForVRSAllAttributes: 1
 
NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::reserved: 30
 
NvU32 NvAPI_D3D11_CREATE_FASTGS_EXPLICIT_DESC_V1::version
 
NvU32 NvAPI_D3D11_CREATE_FASTGS_EXPLICIT_DESC_V1::flags
 
NvAPI_D3D11_SWIZZLE_MODE * NvAPI_D3D11_CREATE_FASTGS_EXPLICIT_DESC_V1::pCoordinateSwizzling
 
NvU32 NVAPI_D3D12_PSO_EXTENSION_DESC_V1::baseVersion
 
NV_PSO_EXTENSION NVAPI_D3D12_PSO_EXTENSION_DESC_V1::psoExtension
 
NvU32 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::version
 
bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::ProgrammableSamplePositionsEnable
 
bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::InterleavedSamplingEnable
 
NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::SampleCount
 
NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::SamplePositionsX [16]
 
NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::SamplePositionsY [16]
 
NVAPI_QUAD_FILLMODE NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::QuadFillMode
 
bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::PostZCoverageEnable
 
bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::CoverageToColorEnable
 
NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::CoverageToColorRTIndex
 
bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::TargetIndepentRasterWithDepth
 
NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::ForcedSampleCount
 
NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::reserved [62]
 
NvU32 NVAPI_D3D12_PSO_CREATE_FASTGS_EXPLICIT_DESC_V1::version
 
NvU32 NVAPI_D3D12_PSO_CREATE_FASTGS_EXPLICIT_DESC_V1::flags
 
NvAPI_D3D11_SWIZZLE_MODE * NVAPI_D3D12_PSO_CREATE_FASTGS_EXPLICIT_DESC_V1::pCoordinateSwizzling
 
NvU32 NVAPI_D3D12_PSO_REQUEST_FAST_GEOMETRY_SHADER_DESC_V1::version
 
NvU32 NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::version
 
BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::UseViewportMask
 
BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::OffsetRtIndexByVpIndex
 
BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::ForceFastGS
 
BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::DontUseViewportOrder
 
BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::UseAttributeSkipMask
 
BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::UseCoordinateSwizzle
 
NvAPI_D3D11_SWIZZLE_MODE * NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::pCoordinateSwizzling
 
NvU32 NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::pCustomSemantics
 
BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::ConvertToFastGS
 
BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::UseSpecificShaderExt
 
NvU32 NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V1::version
 
NvU32 NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V1::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V1::pCustomSemantics
 
BOOL NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V2::UseWithFastGS
 
BOOL NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V3::UseSpecificShaderExt
 
NvU32 NVAPI_D3D12_PSO_HULL_SHADER_DESC_V1::version
 
NvU32 NVAPI_D3D12_PSO_HULL_SHADER_DESC_V1::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NVAPI_D3D12_PSO_HULL_SHADER_DESC_V1::pCustomSemantics
 
BOOL NVAPI_D3D12_PSO_HULL_SHADER_DESC_V1::UseWithFastGS
 
BOOL NVAPI_D3D12_PSO_HULL_SHADER_DESC_V2::UseSpecificShaderExt
 
NvU32 NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V1::version
 
NvU32 NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V1::NumCustomSemantics
 
NV_CUSTOM_SEMANTIC * NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V1::pCustomSemantics
 
BOOL NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V2::UseWithFastGS
 
BOOL NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V3::UseSpecificShaderExt
 
NvU32 NVAPI_D3D12_PSO_ENABLE_DEPTH_BOUND_TEST_DESC_V1::version
 
bool NVAPI_D3D12_PSO_ENABLE_DEPTH_BOUND_TEST_DESC_V1::EnableDBT
 
NvU32 NVAPI_D3D12_PSO_SET_SHADER_EXTENSION_SLOT_DESC_V1::version
 
NvU32 NVAPI_D3D12_PSO_SET_SHADER_EXTENSION_SLOT_DESC_V1::uavSlot
 
NvU32 NVAPI_D3D12_PSO_SET_SHADER_EXTENSION_SLOT_DESC_V1::registerSpace
 
NvU32 _NV_HEAP_PARAMS_V1::version
 
NV_D3D12_HEAP_FLAGS _NV_HEAP_PARAMS_V1::NVHeapFlags
 
NvU32 NVAPI_UAV_INFO_V1::version
 
NvU32 NVAPI_UAV_INFO_V1::surfaceHandle
 
NvU64 NVAPI_UAV_INFO_V1::gpuVAStart
 
NvU64 NVAPI_UAV_INFO_V1::gpuVASize
 
NvU32 NVAPI_UAV_INFO_V2::version
 
NvU32 NVAPI_UAV_INFO_V2::surfaceHandle
 
NvU64 NVAPI_UAV_INFO_V2::gpuVAStart
 
NvU64 NVAPI_UAV_INFO_V2::gpuVASize
 
NvU64 NVAPI_UAV_INFO_V2::outFlags
 
NvU32 NV_GET_GPU_VIRTUAL_ADDRESS_V1::version
 
NVDX_ObjectHandle NV_GET_GPU_VIRTUAL_ADDRESS_V1::hResource
 
NvU64 NV_GET_GPU_VIRTUAL_ADDRESS_V1::gpuVAStart
 
NvU64 NV_GET_GPU_VIRTUAL_ADDRESS_V1::gpuVASize
 
GUID NVAPI_META_COMMAND_DESC::Id
 
LPCWSTR NVAPI_META_COMMAND_DESC::Name
 
NV_D3D_GRAPHICS_STATES NVAPI_META_COMMAND_DESC::InitializationDirtyState
 
NV_D3D_GRAPHICS_STATES NVAPI_META_COMMAND_DESC::ExecutionDirtyState
 
NvU64 NV_META_COMMAND_TENSOR_DESC::DataType
 
NvU64 NV_META_COMMAND_TENSOR_DESC::Layout
 
NvU64 NV_META_COMMAND_TENSOR_DESC::Flags
 
NvU64 NV_META_COMMAND_TENSOR_DESC::DimensionCount
 
NvU64 NV_META_COMMAND_TENSOR_DESC::Size [NV_META_COMMAND_MAX_TENSOR_DIM]
 
NvU64 NV_META_COMMAND_TENSOR_DESC::Stride [NV_META_COMMAND_MAX_TENSOR_DIM]
 
NvU64 NV_META_COMMAND_ACTIVATION_DESC::Function
 
float NV_META_COMMAND_ACTIVATION_DESC::Params [NV_META_COMMAND_ACTIVATION_MAX_PARAMS]
 
NV_META_COMMAND_BOOL NV_META_COMMAND_OPTIONAL_TENSOR_DESC::IsNull
 
NV_META_COMMAND_BOOL NV_META_COMMAND_OPTIONAL_ACTIVATION_DESC::IsNull
 
NV_META_COMMAND_PADDING_MODE NV_META_COMMAND_PADDING_DESC::Mode
 
float NV_META_COMMAND_PADDING_DESC::ConstantPadVal
 
NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DescIn
 
NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DescFilter
 
NV_META_COMMAND_OPTIONAL_TENSOR_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DescBias
 
NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DescOut
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Mode
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Direction
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Precision
 
NV_META_COMMAND_OPTIONAL_ACTIVATION_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Activation
 
NV_META_COMMAND_PADDING_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Padding
 
NV_META_COMMAND_BOOL NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::PerChannelScaling
 
float NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Alpha1
 
float NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Alpha2
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Stride [NV_META_COMMAND_NUM_SPATIAL_DIM]
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Dilation [NV_META_COMMAND_NUM_SPATIAL_DIM]
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::StartPadding [NV_META_COMMAND_NUM_SPATIAL_DIM]
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::EndPadding [NV_META_COMMAND_NUM_SPATIAL_DIM]
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DimensionCount
 
NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::GroupCount
 
NV_META_COMMAND_CONVOLUTION_POOL_MODE NV_META_COMMAND_CONVOLUTION_FUSE_DESC::PoolMode
 
NV_META_COMMAND_CONVOLUTION_UPSAMPLE_MODE NV_META_COMMAND_CONVOLUTION_FUSE_DESC::UpsampleMode
 
NV_META_COMMAND_CONVOLUTION_SKIP_MODE NV_META_COMMAND_CONVOLUTION_FUSE_DESC::SkipMode
 
NV_META_COMMAND_BOOL NV_META_COMMAND_CONVOLUTION_FUSE_DESC::OutputPrepool
 
NV_META_COMMAND_CONVOLUTION_FUSE_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_FUSED_DESC::FuseDesc
 
NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_GEMM_DESC::DescA
 
NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_GEMM_DESC::DescB
 
NV_META_COMMAND_OPTIONAL_TENSOR_DESC NV_META_COMMAND_CREATE_GEMM_DESC::DescC
 
NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_GEMM_DESC::DescOut
 
NvU64 NV_META_COMMAND_CREATE_GEMM_DESC::Precision
 
NvU64 NV_META_COMMAND_CREATE_GEMM_DESC::TransA
 
NvU64 NV_META_COMMAND_CREATE_GEMM_DESC::TransB
 
float NV_META_COMMAND_CREATE_GEMM_DESC::Alpha
 
float NV_META_COMMAND_CREATE_GEMM_DESC::Beta
 
NV_META_COMMAND_OPTIONAL_ACTIVATION_DESC NV_META_COMMAND_CREATE_GEMM_DESC::Activation
 
NVDX_ObjectHandle   NV_D3D11_META_COMMAND_RESOURCE::ResourceHandle 
 
NvU64   NV_D3D11_META_COMMAND_RESOURCE::unused 
 
union { 
 
   NVDX_ObjectHandle   NV_D3D11_META_COMMAND_RESOURCE::ResourceHandle 
 
   NvU64   NV_D3D11_META_COMMAND_RESOURCE::unused 
 
};  
 
NvU64 NV_D3D11_META_COMMAND_RESOURCE::Offset
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_INITIALIZE_CONVOLUTION_EX_DESC::PersistentResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::InputResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::FilterResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::BiasResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::OutputResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::Alpha1Resource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::Alpha2Resource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::SkipConnectionResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::PersistentResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::TemporaryResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_INITIALIZE_GEMM_DESC::PersistentResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::AResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::BResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::CResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::OutputResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::PersistentResource
 
NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::TemporaryResource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_INITIALIZE_CONVOLUTION_EX_DESC::PersistentResource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::InputResource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::FilterResource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::BiasResource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::OutputResource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::Alpha1Resource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::Alpha2Resource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::SkipConnectionResource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::PersistentResource
 
D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::TemporaryResource
 
NvU64 NV_D3D12_META_COMMAND_INITIALIZE_GEMM_DESC::PersistentResource
 
NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::AResource
 
NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::BResource
 
NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::CResource
 
NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::OutputResource
 
NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::PersistentResource
 
NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::TemporaryResource
 
NvU32 _NV_RESOURCE_PARAMS_V1::version
 
NV_D3D12_RESOURCE_FLAGS _NV_RESOURCE_PARAMS_V1::NVResourceFlags
 
NvU32 _NV_MULTIGPU_CAPS_V1::multiGPUVersion
 
NvU32 _NV_MULTIGPU_CAPS_V1::reserved
 
NvU32 _NV_MULTIGPU_CAPS_V1::nTotalGPUs
 
NvU32 _NV_MULTIGPU_CAPS_V1::nSLIGPUs
 
NvU32 _NV_MULTIGPU_CAPS_V1::videoBridgePresent
 
NvU32 _NV_MULTIGPU_CAPS_V2::multiGPUVersion
 
NvU32   _NV_MULTIGPU_CAPS_V2::reserved 
 
NvU32   _NV_MULTIGPU_CAPS_V2::version 
 
union { 
 
   NvU32   _NV_MULTIGPU_CAPS_V2::reserved 
 
   NvU32   _NV_MULTIGPU_CAPS_V2::version 
 
};  
 
NvU32 _NV_MULTIGPU_CAPS_V2::nTotalGPUs
 
NvU32 _NV_MULTIGPU_CAPS_V2::nSLIGPUs
 
NvU32 _NV_MULTIGPU_CAPS_V2::videoBridgePresent
 
NvU32 _NV_MULTIGPU_CAPS_V2::NvLinkPresent
 
NvU32 _NV_MULTIGPU_CAPS_V2::fastNvLinkReads
 
NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V1::version
 
NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V1::bSinglePassStereoSupported
 
NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V2::version
 
NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V2::bSinglePassStereoSupported: 1
 
NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V2::bSinglePassStereoXYZWSupported: 1
 
NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V2::reserved: 30
 
NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::version
 
NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::bMultiViewSupported: 1
 
NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::bSinglePassStereoSupported: 1
 
NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::bSinglePassStereoXYZWSupported: 1
 
NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::reserved: 29
 
NvU32 _NV_MULTIVIEW_PARAMS_V1::version
 
NvU32 _NV_MULTIVIEW_PARAMS_V1::numViews
 
NvU32 _NV_MULTIVIEW_PARAMS_V1::renderTargetIndexOffset [NV_MULTIVIEW_MAX_SUPPORTED_VIEWS]
 
NvU8 _NV_MULTIVIEW_PARAMS_V1::independentViewportMaskEnable
 
NvU32 _NV_QUERY_MODIFIED_W_SUPPORT_PARAMS::version
 
NvU32 _NV_QUERY_MODIFIED_W_SUPPORT_PARAMS::bModifiedWSupported
 
float _NV_MODIFIED_W_COEFFICIENTS::fA
 
float _NV_MODIFIED_W_COEFFICIENTS::fB
 
float _NV_MODIFIED_W_COEFFICIENTS::fAReserved
 
float _NV_MODIFIED_W_COEFFICIENTS::fBReserved
 
float _NV_MODIFIED_W_COEFFICIENTS::fReserved [2]
 
NvU32 _NV_MODIFIED_W_PARAMS::version
 
NvU32 _NV_MODIFIED_W_PARAMS::numEntries
 
NV_MODIFIED_W_COEFFICIENTS _NV_MODIFIED_W_PARAMS::modifiedWCoefficients [NV_MODIFIED_W_MAX_VIEWPORTS]
 
NvU32 _NV_MODIFIED_W_PARAMS::id
 
NvU32 _NV_MODIFIED_W_PARAMS::reserved [NV_MODIFIED_W_MAX_VIEWPORTS]
 
NvU32 _NV_D3D_LATELATCH_OBJECT_DESC_V1::version
 
NvU32 _NV_D3D_LATELATCH_OBJECT_DESC_V1::numBuffers
 
D3D11_BUFFER_DESC ** _NV_D3D_LATELATCH_OBJECT_DESC_V1::ppBufferDesc
 
ID3DLateLatchObject ** _NV_D3D_LATELATCH_OBJECT_DESC_V1::ppD3DLateLatchObject
 
NvU32 _NV_QUERY_LATELATCH_SUPPORT_PARAMS::version
 
NvU32 _NV_QUERY_LATELATCH_SUPPORT_PARAMS::bLateLatchSupported
 
__in NvU32 _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::version
 
__in ID3D12Device * _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::pDevice
 
__in ID3D12Resource * _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::pSwapChainBuffer
 
__in NvU32 _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::companionBufferCount
 
__inout ID3D12Resource ** _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::ppCompanionResources
 
__in NvU32 _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::version
 
__in ID3D12Device * _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pDevice
 
__in ID3D12Resource * _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pSwapChainBuffer
 
__inout NvU32 * _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pPartitionCount
 
__inout RECT * _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pViewport
 
__inout NvU32 * _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pNodeMask
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V1::bExclusiveScissorRectsSupported: 1
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V1::bVariablePixelRateShadingSupported: 1
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V1::reservedBits: 30
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V1::reserved [7]
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::bExclusiveScissorRectsSupported: 1
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::bVariablePixelRateShadingSupported: 1
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::bFastUAVClearSupported: 1
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::reservedBits: 29
 
NvU16 _NV_D3D1x_GRAPHICS_CAPS_V2::majorSMVersion
 
NvU16 _NV_D3D1x_GRAPHICS_CAPS_V2::minorSMVersion
 
NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::reserved [14]
 
NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::bExclusiveScissorRectsSupported: 1
 
NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::bVariablePixelRateShadingSupported: 1
 
NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::bFastUAVClearSupported: 1
 
NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::reservedBits: 29
 
NvU16 _NV_D3D12_GRAPHICS_CAPS_V1::majorSMVersion
 
NvU16 _NV_D3D12_GRAPHICS_CAPS_V1::minorSMVersion
 
NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::reserved [6]
 
bool _NV_D3D11_EXCLUSIVE_SCISSOR_RECT_DESC_V1::enableExclusiveScissorRect
 
D3D11_RECT _NV_D3D11_EXCLUSIVE_SCISSOR_RECT_DESC_V1::scissorRect
 
NvU32 _NV_D3D11_EXCLUSIVE_SCISSOR_RECTS_DESC_V1::version
 
NvU32 _NV_D3D11_EXCLUSIVE_SCISSOR_RECTS_DESC_V1::numRects
 
NV_D3D11_EXCLUSIVE_SCISSOR_RECT_DESC_V1 * _NV_D3D11_EXCLUSIVE_SCISSOR_RECTS_DESC_V1::pRects
 
bool _NV_D3D11_VIEWPORT_SHADING_RATE_DESC_V1::enableVariablePixelShadingRate
 
NV_PIXEL_SHADING_RATE _NV_D3D11_VIEWPORT_SHADING_RATE_DESC_V1::shadingRateTable [NV_MAX_PIXEL_SHADING_RATES]
 
NvU32 _NV_D3D11_VIEWPORTS_SHADING_RATE_DESC_V1::version
 
NvU32 _NV_D3D11_VIEWPORTS_SHADING_RATE_DESC_V1::numViewports
 
NV_D3D11_VIEWPORT_SHADING_RATE_DESC_V1 * _NV_D3D11_VIEWPORTS_SHADING_RATE_DESC_V1::pViewports
 
UINT _NV_TEX2D_SRRV::MipSlice
 
UINT _NV_TEX2D_ARRAY_SRRV::MipSlice
 
UINT _NV_TEX2D_ARRAY_SRRV::FirstArraySlice
 
UINT _NV_TEX2D_ARRAY_SRRV::ArraySize
 
NvU32 _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::version
 
DXGI_FORMAT _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::Format
 
NV_SRRV_DIMENSION _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::ViewDimension
 
NV_TEX2D_SRRV   _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::Texture2D 
 
NV_TEX2D_ARRAY_SRRV   _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::Texture2DArray 
 
union { 
 
   NV_TEX2D_SRRV   _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::Texture2D 
 
   NV_TEX2D_ARRAY_SRRV   _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::Texture2DArray 
 
};  
 
NvU8 _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X1::Y [2]
 
struct _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X1 _NV_PIXEL_SRSO_1x2::X1
 
NvU8 _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X2::YS [2][2]
 
struct _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X2 _NV_PIXEL_SRSO_1x2::X2
 
NvU8 _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X4::YS [2][4]
 
struct _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X4 _NV_PIXEL_SRSO_1x2::X4
 
NvU8 _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X8::YS [2][8]
 
struct _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X8 _NV_PIXEL_SRSO_1x2::X8
 
NvU8 _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X1::X [2]
 
struct _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X1 _NV_PIXEL_SRSO_2x1::X1
 
NvU8 _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X2::XS [2][2]
 
struct _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X2 _NV_PIXEL_SRSO_2x1::X2
 
NvU8 _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X4::XS [2][4]
 
struct _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X4 _NV_PIXEL_SRSO_2x1::X4
 
NvU8 _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X1::YX [2][2]
 
struct _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X1 _NV_PIXEL_SRSO_2x2::X1
 
NvU8 _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X2::YXS [2][2][2]
 
struct _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X2 _NV_PIXEL_SRSO_2x2::X2
 
NvU8 _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X4::YXS [2][2][4]
 
struct _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X4 _NV_PIXEL_SRSO_2x2::X4
 
NvU8 _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X1::YX [4][2]
 
struct _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X1 _NV_PIXEL_SRSO_2x4::X1
 
NvU8 _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X2::YXS [4][2][2]
 
struct _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X2 _NV_PIXEL_SRSO_2x4::X2
 
NvU8 _NV_PIXEL_SRSO_4x2::NV_PIXEL_SRSO_4x2_X1::YX [2][4]
 
struct _NV_PIXEL_SRSO_4x2::NV_PIXEL_SRSO_4x2_X1 _NV_PIXEL_SRSO_4x2::X1
 
NvU8 _NV_PIXEL_SRSO_4x4::NV_PIXEL_SRSO_4x4_X1::YX [4][4]
 
struct _NV_PIXEL_SRSO_4x4::NV_PIXEL_SRSO_4x4_X1 _NV_PIXEL_SRSO_4x4::X1
 
NvU32 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::version
 
NV_PIXEL_SRSO_1x2 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_1x2
 
NV_PIXEL_SRSO_2x1 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_2x1
 
NV_PIXEL_SRSO_2x2 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_2x2
 
NV_PIXEL_SRSO_2x4 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_2x4
 
NV_PIXEL_SRSO_4x2 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_4x2
 
NV_PIXEL_SRSO_4x4 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_4x4
 
NvU32 _NV_VRS_HELPER_LATCH_GAZE_PARAMS_V1::version
 
NvU32 _NV_VRS_HELPER_LATCH_GAZE_PARAMS_V1::flags
 
NvU32 _NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1::version
 
NV_PIXEL_SHADING_RATE _NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1::InnerMostRegionShadingRate
 
NV_PIXEL_SHADING_RATE _NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1::MiddleRegionShadingRate
 
NV_PIXEL_SHADING_RATE _NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1::PeripheralRegionShadingRate
 
NvU32 _NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1::version
 
float _NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1::fInnermostRadii [2]
 
float _NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1::fMiddleRadii [2]
 
float _NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1::fPeripheralRadii [2]
 
NvU32 _NV_FOVEATED_RENDERING_DESC_V1::version
 
NvU32 _NV_FOVEATED_RENDERING_DESC_V1::flags
 
NV_FOVEATED_RENDERING_SHADING_RATE_PRESET _NV_FOVEATED_RENDERING_DESC_V1::ShadingRatePreset
 
NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1 _NV_FOVEATED_RENDERING_DESC_V1::ShadingRateCustomPresetDesc
 
NV_FOVEATED_RENDERING_FOVEATION_PATTERN_PRESET _NV_FOVEATED_RENDERING_DESC_V1::FoveationPatternPreset
 
NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1 _NV_FOVEATED_RENDERING_DESC_V1::FoveationPatternCustomPresetDesc
 
NvU32 _NV_FOVEATED_RENDERING_DESC_V1::GazeDataDeviceId
 
NvU32 _NV_VRS_HELPER_ENABLE_PARAMS_V1::version
 
NvU32 _NV_VRS_HELPER_ENABLE_PARAMS_V1::flags
 
NV_VRS_RENDER_MODE _NV_VRS_HELPER_ENABLE_PARAMS_V1::RenderMode
 
NV_VRS_CONTENT_TYPE _NV_VRS_HELPER_ENABLE_PARAMS_V1::ContentType
 
NV_FOVEATED_RENDERING_DESC_V1 _NV_VRS_HELPER_ENABLE_PARAMS_V1::sFoveatedRenderingDesc
 
NvU32 _NV_VRS_HELPER_DISABLE_PARAMS_V1::version
 
NvU32 _NV_VRS_HELPER_DISABLE_PARAMS_V1::reserved
 
NvU32 _NV_VRS_HELPER_GET_SHADING_RATE_RESOURCE_PARAMS_V1::version
 
IUnknown ** _NV_VRS_HELPER_GET_SHADING_RATE_RESOURCE_PARAMS_V1::ppShadingRateResource
 
NV_PIXEL_SHADING_RATE _NV_VRS_HELPER_GET_SHADING_RATE_RESOURCE_PARAMS_V1::shadingRateTable [NV_MAX_PIXEL_SHADING_RATES]
 
NvU32 _NV_VRS_HELPER_PURGE_INTERNAL_RESOURCES_PARAMS_V1::version
 
NvU32 _NV_VRS_HELPER_PURGE_INTERNAL_RESOURCES_PARAMS_V1::reserved
 
NvU32 _NV_VRS_HELPER_INIT_PARAMS_V1::version
 
NvU32 _NV_VRS_HELPER_INIT_PARAMS_V1::flags
 
ID3DNvVRSHelper_V1 ** _NV_VRS_HELPER_INIT_PARAMS_V1::ppVRSHelper
 
NvU32 _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::version
 
NvU32 _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::GazeDataValidityFlags
 
float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fGazeOrigin_mm [3]
 
float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fGazeDirection [3]
 
float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fGazeNormalizedLocation [2]
 
float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fGazeVelocity [2]
 
float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fPupilDiameter_mm
 
float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fEyeOpenness
 
BOOL _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::bInSaccade
 
NvU32 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::version
 
NvU32 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::flags
 
NvU64 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::Timestamp
 
NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sMonoData 
 
NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sLeftEye 
 
NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sRightEye 
 
struct { 
 
   NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sLeftEye 
 
   NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sRightEye 
 
}   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sStereoData 
 
union { 
 
   NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sMonoData 
 
   struct { 
 
      NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sLeftEye 
 
      NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sRightEye 
 
   }   _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sStereoData 
 
};  
 
NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V2::version
 
NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V2::GazeDataDeviceId
 
NV_GAZE_DATA_TYPE _NV_GAZE_HANDLER_INIT_PARAMS_V2::GazeDataType
 
NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V2::flags
 
float _NV_GAZE_HANDLER_INIT_PARAMS_V2::fHorizontalFOV
 
float _NV_GAZE_HANDLER_INIT_PARAMS_V2::fVericalFOV
 
ID3DNvGazeHandler_V2 ** _NV_GAZE_HANDLER_INIT_PARAMS_V2::ppNvGazeHandler
 
NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V1::version
 
NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V1::GazeDataDeviceId
 
NV_GAZE_DATA_TYPE _NV_GAZE_HANDLER_INIT_PARAMS_V1::GazeDataType
 
NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V1::flags
 
float _NV_GAZE_HANDLER_INIT_PARAMS_V1::fHorizontalFOV
 
float _NV_GAZE_HANDLER_INIT_PARAMS_V1::fVericalFOV
 
ID3DNvGazeHandler_V1 ** _NV_GAZE_HANDLER_INIT_PARAMS_V1::ppNvGazeHandler
 
float _NV_MRS_CUSTOM_CONFIG_V1::centerWidth
 
float _NV_MRS_CUSTOM_CONFIG_V1::centerHeight
 
float _NV_MRS_CUSTOM_CONFIG_V1::centerX
 
float _NV_MRS_CUSTOM_CONFIG_V1::centerY
 
float _NV_MRS_CUSTOM_CONFIG_V1::densityScaleX [3]
 
float _NV_MRS_CUSTOM_CONFIG_V1::densityScaleY [3]
 
float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::centerWidth [2]
 
float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::centerHeight
 
float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::centerX [2]
 
float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::centerY
 
float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::densityScaleX [5]
 
float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::densityScaleY [3]
 
float _NV_LMS_CUSTOM_CONFIG_V1::warpLeft
 
float _NV_LMS_CUSTOM_CONFIG_V1::warpRight
 
float _NV_LMS_CUSTOM_CONFIG_V1::warpUp
 
float _NV_LMS_CUSTOM_CONFIG_V1::warpDown
 
float _NV_LMS_CUSTOM_CONFIG_V1::relativeSizeLeft
 
float _NV_LMS_CUSTOM_CONFIG_V1::relativeSizeRight
 
float _NV_LMS_CUSTOM_CONFIG_V1::relativeSizeUp
 
float _NV_LMS_CUSTOM_CONFIG_V1::relativeSizeDown
 
NV_LMS_CUSTOM_CONFIG_V1 _NV_LMS_INSTANCED_STEREO_CONFIG_V1::sLeftConfig
 
NV_LMS_CUSTOM_CONFIG_V1 _NV_LMS_INSTANCED_STEREO_CONFIG_V1::sRightConfig
 
NvU32 _NV_CUSTOM_RECTS_V1::numViewports [NV_SMP_ASSIST_MINIMAL_LEVEL_NUM_EYE_INDICES]
 
D3D11_VIEWPORT * _NV_CUSTOM_RECTS_V1::pViewports [NV_SMP_ASSIST_MINIMAL_LEVEL_NUM_EYE_INDICES]
 
D3D11_RECT * _NV_CUSTOM_RECTS_V1::pScissors [NV_SMP_ASSIST_MINIMAL_LEVEL_NUM_EYE_INDICES]
 
NvU32 _NV_SMP_ASSIST_ENABLE_PARAMS_V1::version
 
NV_SMP_ASSIST_EYE_INDEX _NV_SMP_ASSIST_ENABLE_PARAMS_V1::eEyeIndex
 
NvU32 _NV_SMP_ASSIST_DISABLE_PARAMS_V1::version
 
NvU32 _NV_SMP_ASSIST_DISABLE_PARAMS_V1::Reserved
 
float _NV_SMP_ASSIST_FASTGSCBDATA_V1::NDCSplitsX [2]
 
float _NV_SMP_ASSIST_FASTGSCBDATA_V1::NDCSplitsY [2]
 
float _NV_SMP_ASSIST_FASTGSCBDATA_MRS_INSTANCED_STEREO_V1::NDCSplitsX [4]
 
float _NV_SMP_ASSIST_FASTGSCBDATA_MRS_INSTANCED_STEREO_V1::NDCSplitsY [2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowSplitsX [2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowSplitsY [2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowX [3][2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowY [3][2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowZ [2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipSplitsX [2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipSplitsY [2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipX [3][2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipY [3][2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipZ [2]
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectOriginX
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectOriginY
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectSizeWidth
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectSizeHeight
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectSizeInvWidth
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectSizeInvHeight
 
float _NV_SMP_ASSIST_REMAPCBDATA_V1::Padding [2]
 
NvU32 _NV_SMP_ASSIST_GET_CONSTANTS_V3::version
 
NV_SMP_ASSIST_EYE_INDEX _NV_SMP_ASSIST_GET_CONSTANTS_V3::eEyeIndex
 
NvU32 _NV_SMP_ASSIST_GET_CONSTANTS_V3::numViewports
 
D3D11_VIEWPORT * _NV_SMP_ASSIST_GET_CONSTANTS_V3::pViewports
 
D3D11_RECT * _NV_SMP_ASSIST_GET_CONSTANTS_V3::pScissors
 
NV_SMP_ASSIST_TYPE _NV_SMP_ASSIST_GET_CONSTANTS_V3::eSMPAssistType
 
NV_SMP_ASSIST_LEVEL _NV_SMP_ASSIST_GET_CONSTANTS_V3::eSMPAssistLevel
 
NV_MRS_CUSTOM_CONFIG_V1   _NV_SMP_ASSIST_GET_CONSTANTS_V3::sMRSConfig 
 
NV_LMS_CUSTOM_CONFIG_V1   _NV_SMP_ASSIST_GET_CONSTANTS_V3::sLMSConfig 
 
union { 
 
   NV_MRS_CUSTOM_CONFIG_V1   _NV_SMP_ASSIST_GET_CONSTANTS_V3::sMRSConfig 
 
   NV_LMS_CUSTOM_CONFIG_V1   _NV_SMP_ASSIST_GET_CONSTANTS_V3::sLMSConfig 
 
};  
 
float _NV_SMP_ASSIST_GET_CONSTANTS_V3::projectionSizeWidth
 
float _NV_SMP_ASSIST_GET_CONSTANTS_V3::projectionSizeHeight
 
NV_SMP_ASSIST_FASTGSCBDATA_V1 * _NV_SMP_ASSIST_GET_CONSTANTS_V3::pFastGSCBData
 
NV_SMP_ASSIST_REMAPCBDATA_V1 * _NV_SMP_ASSIST_GET_CONSTANTS_V3::pRemapCBData
 
D3D11_VIEWPORT _NV_SMP_ASSIST_GET_CONSTANTS_V3::boundingViewport
 
D3D11_RECT _NV_SMP_ASSIST_GET_CONSTANTS_V3::boundingScissor
 
NV_MRS_INSTANCED_STEREO_CONFIG_V1   _NV_SMP_ASSIST_GET_CONSTANTS_V3::sMRS_ISConfig 
 
NV_LMS_INSTANCED_STEREO_CONFIG_V1   _NV_SMP_ASSIST_GET_CONSTANTS_V3::sLMS_ISConfig 
 
union { 
 
   NV_MRS_INSTANCED_STEREO_CONFIG_V1   _NV_SMP_ASSIST_GET_CONSTANTS_V3::sMRS_ISConfig 
 
   NV_LMS_INSTANCED_STEREO_CONFIG_V1   _NV_SMP_ASSIST_GET_CONSTANTS_V3::sLMS_ISConfig 
 
};  
 
NV_SMP_ASSIST_FASTGSCBDATA_MRS_INSTANCED_STEREO_V1 * _NV_SMP_ASSIST_GET_CONSTANTS_V3::pFastGSCBDataMRS_IS
 
NvU32 _NV_SMP_ASSIST_SETUP_PARAMS_V1::version
 
NV_MRS_CONFIG   _NV_SMP_ASSIST_SETUP_PARAMS_V1::eMRSConfig 
 
NV_LMS_CONFIG   _NV_SMP_ASSIST_SETUP_PARAMS_V1::eLMSConfig 
 
NV_MRS_CUSTOM_CONFIG_V1   _NV_SMP_ASSIST_SETUP_PARAMS_V1::sMRSCustomConfig 
 
NV_LMS_CUSTOM_CONFIG_V1   _NV_SMP_ASSIST_SETUP_PARAMS_V1::sLMSCustomConfig 
 
NV_CUSTOM_RECTS_V1   _NV_SMP_ASSIST_SETUP_PARAMS_V1::sCustomRects 
 
union { 
 
   NV_MRS_CONFIG   _NV_SMP_ASSIST_SETUP_PARAMS_V1::eMRSConfig 
 
   NV_LMS_CONFIG   _NV_SMP_ASSIST_SETUP_PARAMS_V1::eLMSConfig 
 
   NV_MRS_CUSTOM_CONFIG_V1   _NV_SMP_ASSIST_SETUP_PARAMS_V1::sMRSCustomConfig 
 
   NV_LMS_CUSTOM_CONFIG_V1   _NV_SMP_ASSIST_SETUP_PARAMS_V1::sLMSCustomConfig 
 
   NV_CUSTOM_RECTS_V1   _NV_SMP_ASSIST_SETUP_PARAMS_V1::sCustomRects 
 
};  
 
float _NV_SMP_ASSIST_SETUP_PARAMS_V1::resolutionScale
 
D3D11_VIEWPORT _NV_SMP_ASSIST_SETUP_PARAMS_V1::boundingBox
 
float _NV_SMP_ASSIST_SETUP_PARAMS_V1::vpOffsets [2]
 
NvU32 _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::version
 
NV_SMP_ASSIST_TYPE _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::eSMPAssistType
 
float _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::leftCoeffs [4]
 
float _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::leftConst
 
float _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::rightCoeffs [4]
 
float _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::rightConst
 
NvU32 _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::version
 
NV_SMP_ASSIST_TYPE _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::eSMPAssistType
 
NV_SMP_ASSIST_LEVEL _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::eSMPAssistLevel
 
NvU32 _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::flags
 
ID3DNvSMPAssist ** _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::ppD3DNvSMPAssist
 
NvU32 _NV_QUERY_SMP_ASSIST_SUPPORT_PARAMS_V1::version
 
NV_SMP_ASSIST_TYPE _NV_QUERY_SMP_ASSIST_SUPPORT_PARAMS_V1::eSMPAssistType
 
NV_SMP_ASSIST_LEVEL _NV_QUERY_SMP_ASSIST_SUPPORT_PARAMS_V1::eSMPAssistLevel
 
NvBool _NV_QUERY_SMP_ASSIST_SUPPORT_PARAMS_V1::bSMPAssistSupported
 
NvU32 _NV_GET_SLEEP_STATUS_PARAMS::version
 
NvBool _NV_GET_SLEEP_STATUS_PARAMS::bLowLatencyMode
 
NvBool _NV_GET_SLEEP_STATUS_PARAMS::bFsVrr
 
NvBool _NV_GET_SLEEP_STATUS_PARAMS::bCplVsyncOn
 
NvU32 _NV_GET_SLEEP_STATUS_PARAMS::sleepIntervalUs
 
NvBool _NV_GET_SLEEP_STATUS_PARAMS::bUseGameSleep
 
NvU8 _NV_GET_SLEEP_STATUS_PARAMS::rsvd [121]
 
NvU32 _NV_SET_SLEEP_MODE_PARAMS::version
 
NvBool _NV_SET_SLEEP_MODE_PARAMS::bLowLatencyMode
 
NvBool _NV_SET_SLEEP_MODE_PARAMS::bLowLatencyBoost
 
NvU32 _NV_SET_SLEEP_MODE_PARAMS::minimumIntervalUs
 
NvBool _NV_SET_SLEEP_MODE_PARAMS::bUseMarkersToOptimize
 
NvU8 _NV_SET_SLEEP_MODE_PARAMS::rsvd [31]
 
NvU32 _NV_SET_REFLEX_SYNC_PARAMS::version
 
NvU32 _NV_SET_REFLEX_SYNC_PARAMS::bEnable:1
 
NvU32 _NV_SET_REFLEX_SYNC_PARAMS::bDisable:1
 
NvU32 _NV_SET_REFLEX_SYNC_PARAMS::flagsRsvd:30
 
NvU32 _NV_SET_REFLEX_SYNC_PARAMS::vblankIntervalUs
 
NvS32 _NV_SET_REFLEX_SYNC_PARAMS::timeInQueueUs
 
NvU32 _NV_SET_REFLEX_SYNC_PARAMS::timeInQueueUsTarget
 
NvU8 _NV_SET_REFLEX_SYNC_PARAMS::rsvd [28]
 
NvU32 _NV_LATENCY_RESULT_PARAMS::version
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::frameID
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::inputSampleTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::simStartTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::simEndTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::renderSubmitStartTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::renderSubmitEndTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::presentStartTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::presentEndTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::driverStartTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::driverEndTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::osRenderQueueStartTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::osRenderQueueEndTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::gpuRenderStartTime
 
NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::gpuRenderEndTime
 
NvU32 _NV_LATENCY_RESULT_PARAMS::FrameReport::gpuActiveRenderTimeUs
 
NvU32 _NV_LATENCY_RESULT_PARAMS::FrameReport::gpuFrameTimeUs
 
NvU8 _NV_LATENCY_RESULT_PARAMS::FrameReport::rsvd [120]
 
struct _NV_LATENCY_RESULT_PARAMS::FrameReport _NV_LATENCY_RESULT_PARAMS::frameReport [64]
 
NvU8 _NV_LATENCY_RESULT_PARAMS::rsvd [32]
 
NvU32 _NV_LATENCY_MARKER_PARAMS::version
 
NvU64 _NV_LATENCY_MARKER_PARAMS::frameID
 
NV_LATENCY_MARKER_TYPE _NV_LATENCY_MARKER_PARAMS::markerType
 
NvU64 _NV_LATENCY_MARKER_PARAMS::rsvd0
 
NvU8 _NV_LATENCY_MARKER_PARAMS::rsvd [56]
 
NvU32 _NV_ASYNC_FRAME_MARKER_PARAMS_V1::version
 
NvU64 _NV_ASYNC_FRAME_MARKER_PARAMS_V1::frameID
 
NV_LATENCY_MARKER_TYPE _NV_ASYNC_FRAME_MARKER_PARAMS_V1::markerType
 
NvU64 _NV_ASYNC_FRAME_MARKER_PARAMS_V1::presentFrameID
 
NvU8 _NV_ASYNC_FRAME_MARKER_PARAMS_V1::rsvd [56]
 
size_t NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::structSizeIn
 
size_t NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::structSizeOut
 
ID3D12Device * NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::pDevice
 
const void * NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::pCubin
 
NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::size
 
NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::blockX
 
NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::blockY
 
NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::blockZ
 
NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::dynSharedMemBytes
 
const char * NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::pShaderName
 
NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::flags
 
NVDX_ObjectHandle NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::hShader
 
size_t NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::structSizeIn
 
size_t NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::structSizeOut
 
ID3D12Device * NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::pDevice
 
D3D12_CPU_DESCRIPTOR_HANDLE NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::texDesc
 
D3D12_CPU_DESCRIPTOR_HANDLE NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::smpDesc
 
NvU64 NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::textureHandle
 
size_t NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::structSizeIn
 
size_t NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::structSizeOut
 
ID3D12Device * NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::pDevice
 
NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_TYPE NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::type
 
D3D12_CPU_DESCRIPTOR_HANDLE NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::desc
 
NvU64 NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::handle
 
NvU32 _NVAPI_DIM3::x
 
NvU32 _NVAPI_DIM3::y
 
NvU32 _NVAPI_DIM3::z
 
NVDX_ObjectHandle _NVAPI_CU_KERNEL_LAUNCH_PARAMS::hFunction
 
NVAPI_DIM3 _NVAPI_CU_KERNEL_LAUNCH_PARAMS::gridDim
 
NVAPI_DIM3 _NVAPI_CU_KERNEL_LAUNCH_PARAMS::blockDim
 
NvU32 _NVAPI_CU_KERNEL_LAUNCH_PARAMS::dynSharedMemBytes
 
void const * _NVAPI_CU_KERNEL_LAUNCH_PARAMS::pParams
 
NvU32 _NVAPI_CU_KERNEL_LAUNCH_PARAMS::paramSize
 
NVDX_ObjectHandle _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::hFunction
 
NVAPI_DIM3 _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::gridDim
 
NVAPI_DIM3 _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::blockDim
 
NvU32 _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::dynSharedMemBytes
 
void const * _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::pParams
 
NvU32 _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::paramSize
 
void ** _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::kernelParams
 
NvU32 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT::count
 
NvU32 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT::subdivisionLevel
 
NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_FORMAT _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT::format
 
NvU32 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DESC::byteOffset
 
NvU16 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DESC::subdivisionLevel
 
NvU16 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DESC::format
 
NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_BUILD_FLAGS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::flags
 
NvU32 _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::numDMMUsageCounts
 
const NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT * _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::pDMMUsageCounts
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::inputBuffer
 
D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::perDMMDescs
 
NvU64 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO::resultDataMaxSizeInBytes
 
NvU64 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO::scratchDataSizeInBytes
 
NvU32 _NVAPI_GET_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::version
 
const NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS * _NVAPI_GET_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::pDesc
 
NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO * _NVAPI_GET_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::pInfo
 
NvU32 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT::count
 
NvU32 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT::subdivisionLevel
 
NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_FORMAT _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT::format
 
NvU32 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_DESC::byteOffset
 
NvU16 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_DESC::subdivisionLevel
 
NvU16 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_DESC::format
 
NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_BUILD_FLAGS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::flags
 
NvU32 _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::numOMMUsageCounts
 
const NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT * _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::pOMMUsageCounts
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::inputBuffer
 
D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::perOMMDescs
 
NvU64 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO::resultDataMaxSizeInBytes
 
NvU64 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO::scratchDataSizeInBytes
 
NvU32 _NVAPI_GET_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::version
 
const NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS * _NVAPI_GET_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::pDesc
 
NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO * _NVAPI_GET_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::pInfo
 
NvU32 _NVAPI_D3D12_SET_CREATE_PIPELINE_STATE_OPTIONS_PARAMS_V1::version
 
NvU32 _NVAPI_D3D12_SET_CREATE_PIPELINE_STATE_OPTIONS_PARAMS_V1::flags
 
NvU32 _NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_V1::version
 
NVAPI_D3D12_SERIALIZED_DATA_TYPE_EX _NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_V1::serializedDataType
 
const D3D12_SERIALIZED_DATA_DRIVER_MATCHING_IDENTIFIER * _NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_V1::pIdentifierToCheck
 
D3D12_DRIVER_MATCHING_IDENTIFIER_STATUS _NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_V1::checkStatus
 
D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::opacityMicromapIndexBuffer
 
DXGI_FORMAT _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::opacityMicromapIndexFormat
 
NvU32 _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::opacityMicromapBaseLocation
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::opacityMicromapArray
 
NvU32 _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::numOMMUsageCounts
 
const NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT * _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::pOMMUsageCounts
 
D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::triangleMicromapIndexBuffer
 
DXGI_FORMAT _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::triangleMicromapIndexFormat
 
NvU32 _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::triangleMicromapBaseLocation
 
D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::trianglePrimitiveFlagsBuffer
 
D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::vertexBiasAndScaleBuffer
 
DXGI_FORMAT _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::vertexBiasAndScaleFormat
 
D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::vertexDisplacementVectorBuffer
 
DXGI_FORMAT _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::vertexDisplacementVectorFormat
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::displacementMicromapArray
 
NvU32 _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::numDMMUsageCounts
 
const NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT * _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::pDMMUsageCounts
 
D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_TRIANGLES_DESC::triangles
 
NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_TRIANGLES_DESC::dmmAttachment
 
D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_TRIANGLES_DESC::triangles
 
NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_TRIANGLES_DESC::ommAttachment
 
NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_EX _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::type
 
D3D12_RAYTRACING_GEOMETRY_FLAGS _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::flags
 
D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC   _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::triangles 
 
D3D12_RAYTRACING_GEOMETRY_AABBS_DESC   _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::aabbs 
 
NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_TRIANGLES_DESC   _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::ommTriangles 
 
NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_TRIANGLES_DESC   _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::dmmTriangles 
 
union { 
 
   D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC   _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::triangles 
 
   D3D12_RAYTRACING_GEOMETRY_AABBS_DESC   _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::aabbs 
 
   NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_TRIANGLES_DESC   _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::ommTriangles 
 
   NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_TRIANGLES_DESC   _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::dmmTriangles 
 
};  
 
D3D12_RAYTRACING_ACCELERATION_STRUCTURE_TYPE _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::type
 
NVAPI_D3D12_RAYTRACING_ACCELERATION_STRUCTURE_BUILD_FLAGS_EX _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::flags
 
NvU32 _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::numDescs
 
D3D12_ELEMENTS_LAYOUT _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::descsLayout
 
NvU32 _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::geometryDescStrideInBytes
 
D3D12_GPU_VIRTUAL_ADDRESS   _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::instanceDescs 
 
const NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX *   _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::pGeometryDescs 
 
const NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX *const *   _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::ppGeometryDescs 
 
union { 
 
   D3D12_GPU_VIRTUAL_ADDRESS   _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::instanceDescs 
 
   const NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX *   _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::pGeometryDescs 
 
   const NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX *const *   _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::ppGeometryDescs 
 
};  
 
NvU32 _NVAPI_GET_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO_EX_PARAMS_V1::version
 
const NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX * _NVAPI_GET_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO_EX_PARAMS_V1::pDesc
 
D3D12_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO * _NVAPI_GET_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO_EX_PARAMS_V1::pInfo
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_DESC::destOpacityMicromapArrayData
 
NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_DESC::inputs
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_DESC::scratchOpacityMicromapArrayData
 
NvU64 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_CURRENT_SIZE_DESC::currentSizeInBytes
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_DESC::destBuffer
 
NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_TYPE _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_DESC::infoType
 
NvU32 _NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::version
 
const NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_DESC * _NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::pDesc
 
NvU32 _NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::numPostbuildInfoDescs
 
const NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_DESC * _NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::pPostbuildInfoDescs
 
NvU32 _NVAPI_RELOCATE_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::version
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_RELOCATE_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::opacityMicromapArray
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_DESC::destDisplacementMicromapArrayData
 
NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_DESC::inputs
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_DESC::scratchDisplacementMicromapArrayData
 
NvU64 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_CURRENT_SIZE_DESC::currentSizeInBytes
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_DESC::destBuffer
 
NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_TYPE _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_DESC::infoType
 
NvU32 _NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::version
 
const NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_DESC * _NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::pDesc
 
NvU32 _NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::numPostbuildInfoDescs
 
const NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_DESC * _NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::pPostbuildInfoDescs
 
NvU32 _NVAPI_RELOCATE_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::version
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_RELOCATE_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::displacementMicromapArray
 
NvU32 _NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::version
 
const NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_DESC * _NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::pDesc
 
NvU32 _NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::numSources
 
const D3D12_GPU_VIRTUAL_ADDRESS * _NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::pSources
 
NvU32 _NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::version
 
const NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_DESC * _NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::pDesc
 
NvU32 _NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::numSources
 
const D3D12_GPU_VIRTUAL_ADDRESS * _NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::pSources
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX::destAccelerationStructureData
 
NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX::inputs
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX::sourceAccelerationStructureData
 
D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX::scratchAccelerationStructureData
 
NvU32 _NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_V1::version
 
const NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX * _NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_V1::pDesc
 
NvU32 _NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_V1::numPostbuildInfoDescs
 
const D3D12_RAYTRACING_ACCELERATION_STRUCTURE_POSTBUILD_INFO_DESC * _NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_V1::pPostbuildInfoDescs
 
NvU64 _NV_D3D12_WORKSTATION_FEATURE_RDMA_PROPERTIES::rdmaHeapSize
 
NvU32 _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::version
 
NV_D3D12_WORKSTATION_FEATURE_TYPE _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::workstationFeatureType
 
NvBool _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::supported
 
NV_D3D12_WORKSTATION_FEATURE_RDMA_PROPERTIES   _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::rdmaInfo 
 
union { 
 
   NV_D3D12_WORKSTATION_FEATURE_RDMA_PROPERTIES   _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::rdmaInfo 
 
};  
 
NvU32 _NVVIOCAPS::version
 
NvAPI_String _NVVIOCAPS::adapterName
 
NvU32 _NVVIOCAPS::adapterClass
 
NvU32 _NVVIOCAPS::adapterCaps
 
NvU32 _NVVIOCAPS::dipSwitch
 
NvU32 _NVVIOCAPS::dipSwitchReserved
 
NvU32 _NVVIOCAPS::boardID
 
NvU32   _NVVIOCAPS::majorVersion 
 
NvU32   _NVVIOCAPS::minorVersion 
 
struct { 
 
   NvU32   _NVVIOCAPS::majorVersion 
 
   NvU32   _NVVIOCAPS::minorVersion 
 
} _NVVIOCAPS::driver 
 
NvU32   _NVVIOCAPS::majorVersion 
 
NvU32   _NVVIOCAPS::minorVersion 
 
struct { 
 
   NvU32   _NVVIOCAPS::majorVersion 
 
   NvU32   _NVVIOCAPS::minorVersion 
 
} _NVVIOCAPS::firmWare 
 
NVVIOOWNERID _NVVIOCAPS::ownerId
 
NVVIOOWNERTYPE _NVVIOCAPS::ownerType
 
NvU32 _NVVIOCHANNELSTATUS::smpte352
 
NVVIOSIGNALFORMAT _NVVIOCHANNELSTATUS::signalFormat
 
NVVIOBITSPERCOMPONENT _NVVIOCHANNELSTATUS::bitsPerComponent
 
NVVIOCOMPONENTSAMPLING _NVVIOCHANNELSTATUS::samplingFormat
 
NVVIOCOLORSPACE _NVVIOCHANNELSTATUS::colorSpace
 
NVVIOLINKID _NVVIOCHANNELSTATUS::linkID
 
NVVIOCHANNELSTATUS _NVVIOINPUTSTATUS::vidIn [NVAPI_MAX_VIO_JACKS][NVAPI_MAX_VIO_CHANNELS_PER_JACK]
 
NVVIOCAPTURESTATUS _NVVIOINPUTSTATUS::captureStatus
 
NVVIOINPUTOUTPUTSTATUS _NVVIOOUTPUTSTATUS::vid1Out
 
NVVIOINPUTOUTPUTSTATUS _NVVIOOUTPUTSTATUS::vid2Out
 
NVVIOSYNCSTATUS _NVVIOOUTPUTSTATUS::sdiSyncIn
 
NVVIOSYNCSTATUS _NVVIOOUTPUTSTATUS::compSyncIn
 
NvU32 _NVVIOOUTPUTSTATUS::syncEnable
 
NVVIOSYNCSOURCE _NVVIOOUTPUTSTATUS::syncSource
 
NVVIOSIGNALFORMAT _NVVIOOUTPUTSTATUS::syncFormat
 
NvU32 _NVVIOOUTPUTSTATUS::frameLockEnable
 
NvU32 _NVVIOOUTPUTSTATUS::outputVideoLocked
 
NvU32 _NVVIOOUTPUTSTATUS::dataIntegrityCheckErrorCount
 
NvU32 _NVVIOOUTPUTSTATUS::dataIntegrityCheckEnabled
 
NvU32 _NVVIOOUTPUTSTATUS::dataIntegrityCheckFailed
 
NvU32 _NVVIOOUTPUTSTATUS::uSyncSourceLocked
 
NvU32 _NVVIOOUTPUTSTATUS::uPowerOn
 
NvU32 _NVVIOSTATUS::version
 
NVVIOSTATUSTYPE _NVVIOSTATUS::nvvioStatusType
 
NVVIOINPUTSTATUS   _NVVIOSTATUS::inStatus 
 
NVVIOOUTPUTSTATUS   _NVVIOSTATUS::outStatus 
 
union { 
 
   NVVIOINPUTSTATUS   _NVVIOSTATUS::inStatus 
 
   NVVIOOUTPUTSTATUS   _NVVIOSTATUS::outStatus 
 
} _NVVIOSTATUS::vioStatus 
 
NvU32 _NVVIOOUTPUTREGION::x
 
NvU32 _NVVIOOUTPUTREGION::y
 
NvU32 _NVVIOOUTPUTREGION::width
 
NvU32 _NVVIOOUTPUTREGION::height
 
NvU16 _NVVIOGAMMARAMP8::uRed [256]
 
NvU16 _NVVIOGAMMARAMP8::uGreen [256]
 
NvU16 _NVVIOGAMMARAMP8::uBlue [256]
 
NvU16 _NVVIOGAMMARAMP10::uRed [1024]
 
NvU16 _NVVIOGAMMARAMP10::uGreen [1024]
 
NvU16 _NVVIOGAMMARAMP10::uBlue [1024]
 
NvU32 _NVVIOSYNCDELAY::version
 
NvU32 _NVVIOSYNCDELAY::horizontalDelay
 
NvU32 _NVVIOSYNCDELAY::verticalDelay
 
NvU32 _NVVIOVIDEOMODE::horizontalPixels
 
NvU32 _NVVIOVIDEOMODE::verticalLines
 
float _NVVIOVIDEOMODE::fFrameRate
 
NVVIOINTERLACEMODE _NVVIOVIDEOMODE::interlaceMode
 
NVVIOVIDEOSTANDARD _NVVIOVIDEOMODE::videoStandard
 
NVVIOVIDEOTYPE _NVVIOVIDEOMODE::videoType
 
NVVIOSIGNALFORMAT _NVVIOSIGNALFORMATDETAIL::signalFormat
 
NVVIOVIDEOMODE _NVVIOSIGNALFORMATDETAIL::videoMode
 
NVVIODATAFORMAT _NVVIODATAFORMATDETAIL::dataFormat
 
NvU32 _NVVIODATAFORMATDETAIL::vioCaps
 
NvU32 _NVVIOCOLORCONVERSION::version
 
float _NVVIOCOLORCONVERSION::colorMatrix [3][3]
 
float _NVVIOCOLORCONVERSION::colorOffset [3]
 
float _NVVIOCOLORCONVERSION::colorScale [3]
 
NvU32 _NVVIOCOLORCONVERSION::compositeSafe
 
NvU32 _NVVIOGAMMACORRECTION::version
 
NvU32 _NVVIOGAMMACORRECTION::vioGammaCorrectionType
 
NVVIOGAMMARAMP8   _NVVIOGAMMACORRECTION::gammaRamp8 
 
NVVIOGAMMARAMP10   _NVVIOGAMMACORRECTION::gammaRamp10 
 
union { 
 
   NVVIOGAMMARAMP8   _NVVIOGAMMACORRECTION::gammaRamp8 
 
   NVVIOGAMMARAMP10   _NVVIOGAMMACORRECTION::gammaRamp10 
 
} _NVVIOGAMMACORRECTION::gammaRamp 
 
float _NVVIOGAMMACORRECTION::fGammaValueR
 
float _NVVIOGAMMACORRECTION::fGammaValueG
 
float _NVVIOGAMMACORRECTION::fGammaValueB
 
NvU32 _NVVIOCOMPOSITERANGE::uRange
 
NvU32 _NVVIOCOMPOSITERANGE::uEnabled
 
NvU32 _NVVIOCOMPOSITERANGE::uMin
 
NvU32 _NVVIOCOMPOSITERANGE::uMax
 
NVVIOSIGNALFORMAT _NVVIOOUTPUTCONFIG_V1::signalFormat
 
NVVIODATAFORMAT _NVVIOOUTPUTCONFIG_V1::dataFormat
 
NVVIOOUTPUTREGION _NVVIOOUTPUTCONFIG_V1::outputRegion
 
NVVIOOUTPUTAREA _NVVIOOUTPUTCONFIG_V1::outputArea
 
NVVIOCOLORCONVERSION _NVVIOOUTPUTCONFIG_V1::colorConversion
 
NVVIOGAMMACORRECTION _NVVIOOUTPUTCONFIG_V1::gammaCorrection
 
NvU32 _NVVIOOUTPUTCONFIG_V1::syncEnable
 
NVVIOSYNCSOURCE _NVVIOOUTPUTCONFIG_V1::syncSource
 
NVVIOSYNCDELAY _NVVIOOUTPUTCONFIG_V1::syncDelay
 
NVVIOCOMPSYNCTYPE _NVVIOOUTPUTCONFIG_V1::compositeSyncType
 
NvU32 _NVVIOOUTPUTCONFIG_V1::frameLockEnable
 
NvU32 _NVVIOOUTPUTCONFIG_V1::psfSignalFormat
 
NvU32 _NVVIOOUTPUTCONFIG_V1::enable422Filter
 
NvU32 _NVVIOOUTPUTCONFIG_V1::compositeTerminate
 
NvU32 _NVVIOOUTPUTCONFIG_V1::enableDataIntegrityCheck
 
NvU32 _NVVIOOUTPUTCONFIG_V1::cscOverride
 
NvU32 _NVVIOOUTPUTCONFIG_V1::flipQueueLength
 
NvU32 _NVVIOOUTPUTCONFIG_V1::enableANCTimeCodeGeneration
 
NvU32 _NVVIOOUTPUTCONFIG_V1::enableComposite
 
NvU32 _NVVIOOUTPUTCONFIG_V1::enableAlphaKeyComposite
 
NVVIOCOMPOSITERANGE _NVVIOOUTPUTCONFIG_V1::compRange
 
NvU8 _NVVIOOUTPUTCONFIG_V1::reservedData [256]
 
NvU32 _NVVIOOUTPUTCONFIG_V1::enableFullColorRange
 
NvU32 _NVVIOOUTPUTCONFIG_V1::enableRGBData
 
NVVIOSIGNALFORMAT _NVVIOOUTPUTCONFIG_V2::signalFormat
 
NVVIODATAFORMAT _NVVIOOUTPUTCONFIG_V2::dataFormat
 
NVVIOOUTPUTREGION _NVVIOOUTPUTCONFIG_V2::outputRegion
 
NVVIOOUTPUTAREA _NVVIOOUTPUTCONFIG_V2::outputArea
 
NVVIOCOLORCONVERSION _NVVIOOUTPUTCONFIG_V2::colorConversion
 
NVVIOGAMMACORRECTION _NVVIOOUTPUTCONFIG_V2::gammaCorrection
 
NvU32 _NVVIOOUTPUTCONFIG_V2::syncEnable
 
NVVIOSYNCSOURCE _NVVIOOUTPUTCONFIG_V2::syncSource
 
NVVIOSYNCDELAY _NVVIOOUTPUTCONFIG_V2::syncDelay
 
NVVIOCOMPSYNCTYPE _NVVIOOUTPUTCONFIG_V2::compositeSyncType
 
NvU32 _NVVIOOUTPUTCONFIG_V2::frameLockEnable
 
NvU32 _NVVIOOUTPUTCONFIG_V2::psfSignalFormat
 
NvU32 _NVVIOOUTPUTCONFIG_V2::enable422Filter
 
NvU32 _NVVIOOUTPUTCONFIG_V2::compositeTerminate
 
NvU32 _NVVIOOUTPUTCONFIG_V2::enableDataIntegrityCheck
 
NvU32 _NVVIOOUTPUTCONFIG_V2::cscOverride
 
NvU32 _NVVIOOUTPUTCONFIG_V2::flipQueueLength
 
NvU32 _NVVIOOUTPUTCONFIG_V2::enableANCTimeCodeGeneration
 
NvU32 _NVVIOOUTPUTCONFIG_V2::enableComposite
 
NvU32 _NVVIOOUTPUTCONFIG_V2::enableAlphaKeyComposite
 
NVVIOCOMPOSITERANGE _NVVIOOUTPUTCONFIG_V2::compRange
 
NvU8 _NVVIOOUTPUTCONFIG_V2::reservedData [256]
 
NvU32 _NVVIOOUTPUTCONFIG_V2::enableFullColorRange
 
NvU32 _NVVIOOUTPUTCONFIG_V2::enableRGBData
 
NVVIOANCPARITYCOMPUTATION _NVVIOOUTPUTCONFIG_V2::ancParityComputation
 
NVVIOSIGNALFORMAT _NVVIOOUTPUTCONFIG_V3::signalFormat
 
NVVIODATAFORMAT _NVVIOOUTPUTCONFIG_V3::dataFormat
 
NVVIOOUTPUTREGION _NVVIOOUTPUTCONFIG_V3::outputRegion
 
NVVIOOUTPUTAREA _NVVIOOUTPUTCONFIG_V3::outputArea
 
NVVIOCOLORCONVERSION _NVVIOOUTPUTCONFIG_V3::colorConversion
 
NVVIOGAMMACORRECTION _NVVIOOUTPUTCONFIG_V3::gammaCorrection
 
NvU32 _NVVIOOUTPUTCONFIG_V3::syncEnable
 
NVVIOSYNCSOURCE _NVVIOOUTPUTCONFIG_V3::syncSource
 
NVVIOSYNCDELAY _NVVIOOUTPUTCONFIG_V3::syncDelay
 
NVVIOCOMPSYNCTYPE _NVVIOOUTPUTCONFIG_V3::compositeSyncType
 
NvU32 _NVVIOOUTPUTCONFIG_V3::frameLockEnable
 
NvU32 _NVVIOOUTPUTCONFIG_V3::psfSignalFormat
 
NvU32 _NVVIOOUTPUTCONFIG_V3::enable422Filter
 
NvU32 _NVVIOOUTPUTCONFIG_V3::compositeTerminate
 
NvU32 _NVVIOOUTPUTCONFIG_V3::enableDataIntegrityCheck
 
NvU32 _NVVIOOUTPUTCONFIG_V3::cscOverride
 
NvU32 _NVVIOOUTPUTCONFIG_V3::flipQueueLength
 
NvU32 _NVVIOOUTPUTCONFIG_V3::enableANCTimeCodeGeneration
 
NvU32 _NVVIOOUTPUTCONFIG_V3::enableComposite
 
NvU32 _NVVIOOUTPUTCONFIG_V3::enableAlphaKeyComposite
 
NVVIOCOMPOSITERANGE _NVVIOOUTPUTCONFIG_V3::compRange
 
NvU8 _NVVIOOUTPUTCONFIG_V3::reservedData [256]
 
NvU32 _NVVIOOUTPUTCONFIG_V3::enableFullColorRange
 
NvU32 _NVVIOOUTPUTCONFIG_V3::enableRGBData
 
NVVIOANCPARITYCOMPUTATION _NVVIOOUTPUTCONFIG_V3::ancParityComputation
 
NvU32 _NVVIOOUTPUTCONFIG_V3::enableAudioBlanking
 
NvU32 _NVVIOSTREAM::bitsPerComponent
 
NVVIOCOMPONENTSAMPLING _NVVIOSTREAM::sampling
 
NvU32 _NVVIOSTREAM::expansionEnable
 
NvU32 _NVVIOSTREAM::numLinks
 
NvU32   _NVVIOSTREAM::jack 
 
NvU32   _NVVIOSTREAM::channel 
 
struct { 
 
   NvU32   _NVVIOSTREAM::jack 
 
   NvU32   _NVVIOSTREAM::channel 
 
} _NVVIOSTREAM::links [NVAPI_MAX_VIO_LINKS_PER_STREAM] 
 
NvU32 _NVVIOINPUTCONFIG::numRawCaptureImages
 
NVVIOSIGNALFORMAT _NVVIOINPUTCONFIG::signalFormat
 
NvU32 _NVVIOINPUTCONFIG::numStreams
 
NVVIOSTREAM _NVVIOINPUTCONFIG::streams [NVAPI_MAX_VIO_STREAMS]
 
NvU32 _NVVIOINPUTCONFIG::bTestMode
 
NvU32 _NVVIOCONFIG_V1::version
 
NvU32 _NVVIOCONFIG_V1::fields
 
NVVIOCONFIGTYPE _NVVIOCONFIG_V1::nvvioConfigType
 
NVVIOINPUTCONFIG   _NVVIOCONFIG_V1::inConfig 
 
NVVIOOUTPUTCONFIG_V1   _NVVIOCONFIG_V1::outConfig 
 
union { 
 
   NVVIOINPUTCONFIG   _NVVIOCONFIG_V1::inConfig 
 
   NVVIOOUTPUTCONFIG_V1   _NVVIOCONFIG_V1::outConfig 
 
} _NVVIOCONFIG_V1::vioConfig 
 
NvU32 _NVVIOCONFIG_V2::version
 
NvU32 _NVVIOCONFIG_V2::fields
 
NVVIOCONFIGTYPE _NVVIOCONFIG_V2::nvvioConfigType
 
NVVIOINPUTCONFIG   _NVVIOCONFIG_V2::inConfig 
 
NVVIOOUTPUTCONFIG_V2   _NVVIOCONFIG_V2::outConfig 
 
union { 
 
   NVVIOINPUTCONFIG   _NVVIOCONFIG_V2::inConfig 
 
   NVVIOOUTPUTCONFIG_V2   _NVVIOCONFIG_V2::outConfig 
 
} _NVVIOCONFIG_V2::vioConfig 
 
NvU32 _NVVIOCONFIG_V3::version
 
NvU32 _NVVIOCONFIG_V3::fields
 
NVVIOCONFIGTYPE _NVVIOCONFIG_V3::nvvioConfigType
 
NVVIOINPUTCONFIG   _NVVIOCONFIG_V3::inConfig 
 
NVVIOOUTPUTCONFIG_V3   _NVVIOCONFIG_V3::outConfig 
 
union { 
 
   NVVIOINPUTCONFIG   _NVVIOCONFIG_V3::inConfig 
 
   NVVIOOUTPUTCONFIG_V3   _NVVIOCONFIG_V3::outConfig 
 
} _NVVIOCONFIG_V3::vioConfig 
 
NvPhysicalGpuHandle NVVIOTOPOLOGYTARGET::hPhysicalGpu
 
NvVioHandle NVVIOTOPOLOGYTARGET::hVioHandle
 
NvU32 NVVIOTOPOLOGYTARGET::vioId
 
NvU32 NVVIOTOPOLOGYTARGET::outputId
 
NvU32 _NV_VIO_TOPOLOGY::version
 
NvU32 _NV_VIO_TOPOLOGY::vioTotalDeviceCount
 
NVVIOTOPOLOGYTARGET _NV_VIO_TOPOLOGY::vioTarget [NVAPI_MAX_VIO_DEVICES]
 
NVVIOCAPS * pAdapterCaps
 
NvU32 vioClass
 
NvU32 NVVIOOWNERTYPE ownerType
 
NvU32 bRelease
 
NvU32 * pWait
 
NVVIOCONFIG * pConfig
 
NVVIOCOLORCONVERSION * pCSC
 
NVVIOGAMMACORRECTION * pGamma
 
const NVVIOSYNCDELAY * pSyncDelay
 
NvU32 _NVVIOPCIINFO::version
 
NvU32 _NVVIOPCIINFO::pciDeviceId
 
NvU32 _NVVIOPCIINFO::pciSubSystemId
 
NvU32 _NVVIOPCIINFO::pciRevisionId
 
NvU32 _NVVIOPCIINFO::pciDomain
 
NvU32 _NVVIOPCIINFO::pciBus
 
NvU32 _NVVIOPCIINFO::pciSlot
 
NVVIOPCILINKWIDTH _NVVIOPCIINFO::pciLinkWidth
 
NVVIOPCILINKRATE _NVVIOPCIINFO::pciLinkRate
 
__inout NVVIOPCIINFO * pVioPCIInfo
 
NvU32 srcEnumIndex
 
NvU32 NvU32 destEnumIndex
 
NvU32 NvU32 NvU32 * pbCompatible
 
NvU32 * vioDeviceCount
 
NvU32 enumIndex
 
NvU32 NVVIOSIGNALFORMATDETAIL * pSignalFormatDetail
 
NvU32 NVVIODATAFORMATDETAIL * pDataFormatDetail
 
NvU32 _NVAPI_STEREO_CAPS::version
 
NvU32 _NVAPI_STEREO_CAPS::supportsWindowedModeOff: 1
 
NvU32 _NVAPI_STEREO_CAPS::supportsWindowedModeAutomatic: 1
 
NvU32 _NVAPI_STEREO_CAPS::supportsWindowedModePersistent: 1
 
NvU32 _NVAPI_STEREO_CAPS::reserved: 29
 
NvU32 _NVAPI_STEREO_CAPS::reserved2 [3]
 
NvU32 _NVDRS_GPU_SUPPORT::geforce: 1
 
NvU32 _NVDRS_GPU_SUPPORT::quadro: 1
 
NvU32 _NVDRS_GPU_SUPPORT::nvs: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved4: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved5: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved6: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved7: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved8: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved9: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved10: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved11: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved12: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved13: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved14: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved15: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved16: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved17: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved18: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved19: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved20: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved21: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved22: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved23: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved24: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved25: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved26: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved27: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved28: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved29: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved30: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved31: 1
 
NvU32 _NVDRS_GPU_SUPPORT::reserved32: 1
 
NvU32 _NVDRS_BINARY_SETTING::valueLength
 
NvU8 _NVDRS_BINARY_SETTING::valueData [NVAPI_BINARY_DATA_MAX]
 
NvU32 _NVDRS_SETTING_VALUES::version
 
NvU32 _NVDRS_SETTING_VALUES::numSettingValues
 
NVDRS_SETTING_TYPE _NVDRS_SETTING_VALUES::settingType
 
NvU32   _NVDRS_SETTING_VALUES::u32DefaultValue 
 
NVDRS_BINARY_SETTING   _NVDRS_SETTING_VALUES::binaryDefaultValue 
 
NvAPI_UnicodeString   _NVDRS_SETTING_VALUES::wszDefaultValue 
 
union { 
 
   NvU32   _NVDRS_SETTING_VALUES::u32DefaultValue 
 
   NVDRS_BINARY_SETTING   _NVDRS_SETTING_VALUES::binaryDefaultValue 
 
   NvAPI_UnicodeString   _NVDRS_SETTING_VALUES::wszDefaultValue 
 
};  
 
NvU32   _NVDRS_SETTING_VALUES::u32Value 
 
NVDRS_BINARY_SETTING   _NVDRS_SETTING_VALUES::binaryValue 
 
NvAPI_UnicodeString   _NVDRS_SETTING_VALUES::wszValue 
 
union { 
 
   NvU32   _NVDRS_SETTING_VALUES::u32Value 
 
   NVDRS_BINARY_SETTING   _NVDRS_SETTING_VALUES::binaryValue 
 
   NvAPI_UnicodeString   _NVDRS_SETTING_VALUES::wszValue 
 
} _NVDRS_SETTING_VALUES::settingValues [NVAPI_SETTING_MAX_VALUES] 
 
NvU32 _NVDRS_SETTING_V1::version
 
NvAPI_UnicodeString _NVDRS_SETTING_V1::settingName
 
NvU32 _NVDRS_SETTING_V1::settingId
 
NVDRS_SETTING_TYPE _NVDRS_SETTING_V1::settingType
 
NVDRS_SETTING_LOCATION _NVDRS_SETTING_V1::settingLocation
 
NvU32 _NVDRS_SETTING_V1::isCurrentPredefined
 
NvU32 _NVDRS_SETTING_V1::isPredefinedValid
 
NvU32   _NVDRS_SETTING_V1::u32PredefinedValue 
 
NVDRS_BINARY_SETTING   _NVDRS_SETTING_V1::binaryPredefinedValue 
 
NvAPI_UnicodeString   _NVDRS_SETTING_V1::wszPredefinedValue 
 
union { 
 
   NvU32   _NVDRS_SETTING_V1::u32PredefinedValue 
 
   NVDRS_BINARY_SETTING   _NVDRS_SETTING_V1::binaryPredefinedValue 
 
   NvAPI_UnicodeString   _NVDRS_SETTING_V1::wszPredefinedValue 
 
};  
 
NvU32   _NVDRS_SETTING_V1::u32CurrentValue 
 
NVDRS_BINARY_SETTING   _NVDRS_SETTING_V1::binaryCurrentValue 
 
NvAPI_UnicodeString   _NVDRS_SETTING_V1::wszCurrentValue 
 
union { 
 
   NvU32   _NVDRS_SETTING_V1::u32CurrentValue 
 
   NVDRS_BINARY_SETTING   _NVDRS_SETTING_V1::binaryCurrentValue 
 
   NvAPI_UnicodeString   _NVDRS_SETTING_V1::wszCurrentValue 
 
};  
 
NvU32 _NVDRS_APPLICATION_V1::version
 
NvU32 _NVDRS_APPLICATION_V1::isPredefined
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V1::appName
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V1::userFriendlyName
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V1::launcher
 
NvU32 _NVDRS_APPLICATION_V2::version
 
NvU32 _NVDRS_APPLICATION_V2::isPredefined
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V2::appName
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V2::userFriendlyName
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V2::launcher
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V2::fileInFolder
 
NvU32 _NVDRS_APPLICATION_V3::version
 
NvU32 _NVDRS_APPLICATION_V3::isPredefined
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V3::appName
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V3::userFriendlyName
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V3::launcher
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V3::fileInFolder
 
NvU32 _NVDRS_APPLICATION_V3::isMetro:1
 
NvU32 _NVDRS_APPLICATION_V3::isCommandLine:1
 
NvU32 _NVDRS_APPLICATION_V3::reserved:30
 
NvU32 _NVDRS_APPLICATION_V4::version
 
NvU32 _NVDRS_APPLICATION_V4::isPredefined
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V4::appName
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V4::userFriendlyName
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V4::launcher
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V4::fileInFolder
 
NvU32 _NVDRS_APPLICATION_V4::isMetro:1
 
NvU32 _NVDRS_APPLICATION_V4::isCommandLine:1
 
NvU32 _NVDRS_APPLICATION_V4::reserved:30
 
NvAPI_UnicodeString _NVDRS_APPLICATION_V4::commandLine
 
NvU32 _NVDRS_PROFILE_V1::version
 
NvAPI_UnicodeString _NVDRS_PROFILE_V1::profileName
 
NVDRS_GPU_SUPPORT _NVDRS_PROFILE_V1::gpuSupport
 
NvU32 _NVDRS_PROFILE_V1::isPredefined
 
NvU32 _NVDRS_PROFILE_V1::numOfApps
 
NvU32 _NVDRS_PROFILE_V1::numOfSettings
 
NvU32 NV_CHIPSET_INFO_v4::version
 
NvU32 NV_CHIPSET_INFO_v4::vendorId
 
NvU32 NV_CHIPSET_INFO_v4::deviceId
 
NvAPI_ShortString NV_CHIPSET_INFO_v4::szVendorName
 
NvAPI_ShortString NV_CHIPSET_INFO_v4::szChipsetName
 
NvU32 NV_CHIPSET_INFO_v4::flags
 
NvU32 NV_CHIPSET_INFO_v4::subSysVendorId
 
NvU32 NV_CHIPSET_INFO_v4::subSysDeviceId
 
NvAPI_ShortString NV_CHIPSET_INFO_v4::szSubSysVendorName
 
NvU32 NV_CHIPSET_INFO_v4::HBvendorId
 
NvU32 NV_CHIPSET_INFO_v4::HBdeviceId
 
NvU32 NV_CHIPSET_INFO_v4::HBsubSysVendorId
 
NvU32 NV_CHIPSET_INFO_v4::HBsubSysDeviceId
 
NvU32 NV_CHIPSET_INFO_v3::version
 
NvU32 NV_CHIPSET_INFO_v3::vendorId
 
NvU32 NV_CHIPSET_INFO_v3::deviceId
 
NvAPI_ShortString NV_CHIPSET_INFO_v3::szVendorName
 
NvAPI_ShortString NV_CHIPSET_INFO_v3::szChipsetName
 
NvU32 NV_CHIPSET_INFO_v3::flags
 
NvU32 NV_CHIPSET_INFO_v3::subSysVendorId
 
NvU32 NV_CHIPSET_INFO_v3::subSysDeviceId
 
NvAPI_ShortString NV_CHIPSET_INFO_v3::szSubSysVendorName
 
NvU32 NV_CHIPSET_INFO_v2::version
 
NvU32 NV_CHIPSET_INFO_v2::vendorId
 
NvU32 NV_CHIPSET_INFO_v2::deviceId
 
NvAPI_ShortString NV_CHIPSET_INFO_v2::szVendorName
 
NvAPI_ShortString NV_CHIPSET_INFO_v2::szChipsetName
 
NvU32 NV_CHIPSET_INFO_v2::flags
 
NvU32 NV_CHIPSET_INFO_v1::version
 
NvU32 NV_CHIPSET_INFO_v1::vendorId
 
NvU32 NV_CHIPSET_INFO_v1::deviceId
 
NvAPI_ShortString NV_CHIPSET_INFO_v1::szVendorName
 
NvAPI_ShortString NV_CHIPSET_INFO_v1::szChipsetName
 
NvU32 NV_LID_DOCK_PARAMS::version
 
NvU32 NV_LID_DOCK_PARAMS::currentLidState
 
NvU32 NV_LID_DOCK_PARAMS::currentDockState
 
NvU32 NV_LID_DOCK_PARAMS::currentLidPolicy
 
NvU32 NV_LID_DOCK_PARAMS::currentDockPolicy
 
NvU32 NV_LID_DOCK_PARAMS::forcedLidMechanismPresent
 
NvU32 NV_LID_DOCK_PARAMS::forcedDockMechanismPresent
 
NvU32 _NV_DISPLAY_DRIVER_INFO::version
 
NvU32 _NV_DISPLAY_DRIVER_INFO::driverVersion
 
NvAPI_ShortString _NV_DISPLAY_DRIVER_INFO::szBuildBranch
 
NvU32 _NV_DISPLAY_DRIVER_INFO::bIsDCHDriver: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO::bIsNVIDIAStudioPackage: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO::bIsNVIDIAGameReadyPackage: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO::bIsNVIDIARTXProductionBranchPackage: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO::bIsNVIDIARTXNewFeatureBranchPackage: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO::reserved: 27
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::version
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::driverVersion
 
NvAPI_ShortString _NV_DISPLAY_DRIVER_INFO_V2::szBuildBranch
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsDCHDriver: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsNVIDIAStudioPackage: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsNVIDIAGameReadyPackage: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsNVIDIARTXProductionBranchPackage: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsNVIDIARTXNewFeatureBranchPackage: 1
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::reserved: 27
 
NvAPI_ShortString _NV_DISPLAY_DRIVER_INFO_V2::szBuildBaseBranch
 
NvU32 _NV_DISPLAY_DRIVER_INFO_V2::reservedEx
 
NvPhysicalGpuHandle _NV_PHYSICAL_GPU_HANDLE_DATA::hPhysicalGpu
 
NV_ADAPTER_TYPE _NV_PHYSICAL_GPU_HANDLE_DATA::adapterType
 
NvU32 _NV_PHYSICAL_GPU_HANDLE_DATA::reserved2 [4]
 
NvU32 _NV_PHYSICAL_GPUS::version
 
NV_PHYSICAL_GPU_HANDLE_DATA _NV_PHYSICAL_GPUS::gpuHandleData [NVAPI_MAX_PHYSICAL_GPUS]
 
NvU32 _NV_PHYSICAL_GPUS::gpuHandleCount
 
NvU32 _NV_PHYSICAL_GPUS::reserved [4]
 
NvLogicalGpuHandle _NV_LOGICAL_GPU_HANDLE_DATA::hLogicalGpu
 
NV_ADAPTER_TYPE _NV_LOGICAL_GPU_HANDLE_DATA::adapterType
 
NvU32 _NV_LOGICAL_GPU_HANDLE_DATA::reserved [4]
 
NvU32 _NV_LOGICAL_GPUS::version
 
NV_LOGICAL_GPU_HANDLE_DATA _NV_LOGICAL_GPUS::gpuHandleData [NVAPI_MAX_LOGICAL_GPUS]
 
NvU32 _NV_LOGICAL_GPUS::gpuHandleCount
 
NvU32 _NV_LOGICAL_GPUS::reserved [4]
 
void * _NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1::pCallbackParam
 
NvU8 _NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1::rsvd [64]
 
NV_GPU_CLIENT_CALLBACK_SETTINGS_SUPER_V1 _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1::super
 
NvU32 _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1::callbackPeriodms
 
NvU8 _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1::rsvd [64]
 
void * _NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1::pCallbackParam
 
NvU8 _NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1::rsvd [64]
 
NV_GPU_CLIENT_UTIL_DOMAIN_ID _NV_GPU_CLIENT_UTILIZATION_DATA_V1::utilId
 
NvU32 _NV_GPU_CLIENT_UTILIZATION_DATA_V1::utilizationPercent
 
NvU8 _NV_GPU_CLIENT_UTILIZATION_DATA_V1::rsvd [61]
 
NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::super
 
NvU32 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::numUtils
 
NvU64 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::timestamp
 
NvU8 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::rsvd [64]
 
NV_GPU_CLIENT_UTILIZATION_DATA_V1 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::utils [NV_GPU_CLIENT_UTIL_DOMAINS_MAX_V1]
 
NvU32 _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1::version
 
NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1 _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1::super
 
NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_V1 _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1::callback
 
NvU8 _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1::rsvd [64]
 

Detailed Description

Function: NvAPI_VIO_GetCapabilities

Description: This API determine the graphics adapter video I/O capabilities.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[out]pAdapterCapsPointer to receive capabilities
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Macro Definition Documentation

◆ MAX_NUM_COMPOSITE_RANGE

#define MAX_NUM_COMPOSITE_RANGE   2

Maximum number of ranges per channel.

◆ NV_DISPLAY_DRIVER_INFO_VER

#define NV_DISPLAY_DRIVER_INFO_VER   NV_DISPLAY_DRIVER_INFO_VER2

◆ NV_DISPLAY_DRIVER_INFO_VER1

#define NV_DISPLAY_DRIVER_INFO_VER1   MAKE_NVAPI_VERSION(NV_DISPLAY_DRIVER_INFO_V1, 1)

◆ NV_DISPLAY_DRIVER_INFO_VER2

#define NV_DISPLAY_DRIVER_INFO_VER2   MAKE_NVAPI_VERSION(NV_DISPLAY_DRIVER_INFO_V2, 2)

◆ NV_GPU_CLIENT_UTIL_DOMAINS_MAX_V1

#define NV_GPU_CLIENT_UTIL_DOMAINS_MAX_V1   (4)

◆ NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_VER

#define NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_VER   NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_VER1

◆ NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_VER1

#define NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_VER1   MAKE_NVAPI_VERSION(NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1, 1)

◆ NV_LID_DOCK_PARAMS_VER

#define NV_LID_DOCK_PARAMS_VER   MAKE_NVAPI_VERSION(NV_LID_DOCK_PARAMS,1)

ingroup sysgeneral

◆ NV_LOGICAL_GPUS_VER

#define NV_LOGICAL_GPUS_VER   NV_LOGICAL_GPUS_VER1

◆ NV_LOGICAL_GPUS_VER1

#define NV_LOGICAL_GPUS_VER1   MAKE_NVAPI_VERSION(NV_LOGICAL_GPUS_V1, 1)

◆ NV_PHYSICAL_GPUS_VER

#define NV_PHYSICAL_GPUS_VER   NV_PHYSICAL_GPUS_VER1

◆ NV_PHYSICAL_GPUS_VER1

#define NV_PHYSICAL_GPUS_VER1   MAKE_NVAPI_VERSION(NV_PHYSICAL_GPUS_V1, 1)

◆ NV_VIO_TOPOLOGY_VER

#define NV_VIO_TOPOLOGY_VER   MAKE_NVAPI_VERSION(NV_VIO_TOPOLOGY,1)

Macro for constructing the version field of NV_VIO_TOPOLOGY.

◆ NVAPI_GVI_DEFAULT_RAW_CAPTURE_IMAGES

#define NVAPI_GVI_DEFAULT_RAW_CAPTURE_IMAGES   5

Default number of capture images.

◆ NVAPI_GVI_MAX_RAW_CAPTURE_IMAGES

#define NVAPI_GVI_MAX_RAW_CAPTURE_IMAGES   32

Max number of capture images

◆ NVAPI_GVI_MIN_RAW_CAPTURE_IMAGES

#define NVAPI_GVI_MIN_RAW_CAPTURE_IMAGES   1

Min number of capture images.

◆ NVAPI_MAX_FRAMELOCK_MAPPING_MODES

#define NVAPI_MAX_FRAMELOCK_MAPPING_MODES   20

◆ NVAPI_MAX_VIO_CHANNELS_PER_JACK

#define NVAPI_MAX_VIO_CHANNELS_PER_JACK   2

Each physical jack an on SDI input card can have two "channels" in the case of "3G" VideoFormats, as specified by SMPTE 425; for non-3G VideoFormats, only the first channel within a physical jack is valid.

◆ NVAPI_MAX_VIO_DEVICES

#define NVAPI_MAX_VIO_DEVICES   8

Assumption, maximum 4 SDI input and 4 SDI output cards supported on a system.

◆ NVAPI_MAX_VIO_JACKS

#define NVAPI_MAX_VIO_JACKS   4

4 physical jacks supported on each SDI input card.

◆ NVAPI_MAX_VIO_LINKS_PER_STREAM

#define NVAPI_MAX_VIO_LINKS_PER_STREAM   2

SDI input supports a max of 2 links per stream.

◆ NVAPI_MAX_VIO_STREAMS

#define NVAPI_MAX_VIO_STREAMS   4

4 Streams, 1 per physical jack

◆ NVAPI_MIN_VIO_STREAMS

#define NVAPI_MIN_VIO_STREAMS   1

◆ NVVIO_O_READ

#define NVVIO_O_READ   0x00000000

Read access (not applicable for video output)

◆ NVVIO_O_WRITE_EXCLUSIVE

#define NVVIO_O_WRITE_EXCLUSIVE   0x00010001

Write exclusive access (not applicable for video input)

◆ NVVIO_OWNERID_EXCLUSIVE

#define NVVIO_OWNERID_EXCLUSIVE   0x40000000

VIO_DATA.ulOwnerID next-bit is set only if device is currently in exclusive write access mode from NvAPI_VIO_Open()

◆ NVVIO_OWNERID_INITIALIZED

#define NVVIO_OWNERID_INITIALIZED   0x80000000

VIO_DATA.ulOwnerID high-bit is set only if device has been initialized by VIOAPI examined at NvAPI_GetCapabilities|NvAPI_VIO_Open to determine if settings need to be applied from registry or POR state read

◆ NVVIO_OWNERID_TYPEMASK

#define NVVIO_OWNERID_TYPEMASK   0x0FFFFFFF

mask for NVVIOOWNERTYPE_xxx

VIO_DATA.ulOwnerID lower bits are: NVGVOOWNERTYPE_xxx enumerations indicating use context

◆ NVVIO_VALID_ACCESSRIGHTS

#define NVVIO_VALID_ACCESSRIGHTS
Value:
(NVVIO_O_READ | \
NVVIO_O_WRITE_EXCLUSIVE )
NVVIO_O_WRITE_EXCLUSIVE
#define NVVIO_O_WRITE_EXCLUSIVE
Write exclusive access (not applicable for video input)
Definition nvapi.h:19981
NVVIO_O_READ
#define NVVIO_O_READ
Read access (not applicable for video output)
Definition nvapi.h:19978

◆ NVVIOBUFFERFORMAT_R16FPG16FPB16FP

#define NVVIOBUFFERFORMAT_R16FPG16FPB16FP   0x00000010

R16FP:G16FP:B16FP.

◆ NVVIOBUFFERFORMAT_R16FPG16FPB16FPA16FP

#define NVVIOBUFFERFORMAT_R16FPG16FPB16FPA16FP   0x00000040

R16FP:G16FP:B16FP:A16FP.

◆ NVVIOBUFFERFORMAT_R16FPG16FPB16FPA16FPZ24

#define NVVIOBUFFERFORMAT_R16FPG16FPB16FPA16FPZ24   0x00000080

R16FP:G16FP:B16FP:A16FP:Z24.

◆ NVVIOBUFFERFORMAT_R16FPG16FPB16FPZ24

#define NVVIOBUFFERFORMAT_R16FPG16FPB16FPZ24   0x00000020

R16FP:G16FP:B16FP:Z24.

◆ NVVIOBUFFERFORMAT_R8G8B8

#define NVVIOBUFFERFORMAT_R8G8B8   0x00000001

R8:G8:B8.

◆ NVVIOBUFFERFORMAT_R8G8B8A8

#define NVVIOBUFFERFORMAT_R8G8B8A8   0x00000004

R8:G8:B8:A8.

◆ NVVIOBUFFERFORMAT_R8G8B8A8Z24

#define NVVIOBUFFERFORMAT_R8G8B8A8Z24   0x00000008

R8:G8:B8:A8:Z24

◆ NVVIOBUFFERFORMAT_R8G8B8Z24

#define NVVIOBUFFERFORMAT_R8G8B8Z24   0x00000002

R8:G8:B8:Z24

◆ NVVIOCAPS_AUDIO_BLANKING_SUPPORTED

#define NVVIOCAPS_AUDIO_BLANKING_SUPPORTED   0x00400000

Supports ANC audio blanking.

◆ NVVIOCAPS_OUTPUTMODE_DESKTOP

#define NVVIOCAPS_OUTPUTMODE_DESKTOP   0x00010000

Supports Desktop transparent mode.

◆ NVVIOCAPS_OUTPUTMODE_OPENGL

#define NVVIOCAPS_OUTPUTMODE_OPENGL   0x00020000

Supports OpenGL application mode.

◆ NVVIOCAPS_PACKED_ANC_SUPPORTED

#define NVVIOCAPS_PACKED_ANC_SUPPORTED   0x00200000

Supports Packed ANC.

◆ NVVIOCAPS_SYNC_GENLOCK

#define NVVIOCAPS_SYNC_GENLOCK   0x00000200

Supports Genlock timing source.

◆ NVVIOCAPS_SYNC_INTERNAL

#define NVVIOCAPS_SYNC_INTERNAL   0x00000100

Supports Internal timing source.

◆ NVVIOCAPS_SYNCSRC_COMP

#define NVVIOCAPS_SYNCSRC_COMP   0x00002000

Supports Composite synchronization input.

◆ NVVIOCAPS_SYNCSRC_SDI

#define NVVIOCAPS_SYNCSRC_SDI   0x00001000

Supports Serial Digital Interface (SDI) synchronization input.

◆ NVVIOCAPS_VER

#define NVVIOCAPS_VER   NVVIOCAPS_VER2

◆ NVVIOCAPS_VER1

#define NVVIOCAPS_VER1   MAKE_NVAPI_VERSION(NVVIOCAPS,1)

Macro for constructing the version field of NVVIOCAPS.

◆ NVVIOCAPS_VER2

#define NVVIOCAPS_VER2   MAKE_NVAPI_VERSION(NVVIOCAPS,2)

◆ NVVIOCAPS_VIDIN_SDI

#define NVVIOCAPS_VIDIN_SDI   0x00100000

Supports Serial Digital Interface (SDI) input.

◆ NVVIOCAPS_VIDOUT_SDI

#define NVVIOCAPS_VIDOUT_SDI   0x00000001

Supports Serial Digital Interface (SDI) output.

◆ NVVIOCLASS_SDI

#define NVVIOCLASS_SDI   0x00000001

SDI-class interface: SDI output with two genlock inputs.

◆ NVVIOCOLORCONVERSION_VER

#define NVVIOCOLORCONVERSION_VER   MAKE_NVAPI_VERSION(NVVIOCOLORCONVERSION,1)

macro for constructing the version field of _NVVIOCOLORCONVERSION.

◆ NVVIOCONFIG_422FILTER

#define NVVIOCONFIG_422FILTER   0x00000400

fields: bEnable422Filter

◆ NVVIOCONFIG_ALLFIELDS

#define NVVIOCONFIG_ALLFIELDS
Value:
( NVVIOCONFIG_SIGNALFORMAT | \
NVVIOCONFIG_DATAFORMAT | \
NVVIOCONFIG_OUTPUTREGION | \
NVVIOCONFIG_OUTPUTAREA | \
NVVIOCONFIG_COLORCONVERSION | \
NVVIOCONFIG_GAMMACORRECTION | \
NVVIOCONFIG_SYNCSOURCEENABLE | \
NVVIOCONFIG_SYNCDELAY | \
NVVIOCONFIG_COMPOSITESYNCTYPE | \
NVVIOCONFIG_FRAMELOCKENABLE | \
NVVIOCONFIG_422FILTER | \
NVVIOCONFIG_COMPOSITETERMINATE | \
NVVIOCONFIG_DATAINTEGRITYCHECK | \
NVVIOCONFIG_CSCOVERRIDE | \
NVVIOCONFIG_FLIPQUEUELENGTH | \
NVVIOCONFIG_ANCTIMECODEGENERATION | \
NVVIOCONFIG_COMPOSITE | \
NVVIOCONFIG_ALPHAKEYCOMPOSITE | \
NVVIOCONFIG_COMPOSITE_Y | \
NVVIOCONFIG_COMPOSITE_CR | \
NVVIOCONFIG_COMPOSITE_CB | \
NVVIOCONFIG_FULL_COLOR_RANGE | \
NVVIOCONFIG_RGB_DATA | \
NVVIOCONFIG_RESERVED_SDIOUTPUTENABLE | \
NVVIOCONFIG_STREAMS | \
NVVIOCONFIG_ANC_PARITY_COMPUTATION | \
NVVIOCONFIG_ANC_AUDIO_REPEAT )
NVVIOCONFIG_422FILTER
#define NVVIOCONFIG_422FILTER
fields: bEnable422Filter
Definition nvapi.h:20575
NVVIOCONFIG_COMPOSITE_CR
#define NVVIOCONFIG_COMPOSITE_CR
fields: compRange
Definition nvapi.h:20584
NVVIOCONFIG_COMPOSITE_CB
#define NVVIOCONFIG_COMPOSITE_CB
fields: compRange
Definition nvapi.h:20585
NVVIOCONFIG_FLIPQUEUELENGTH
#define NVVIOCONFIG_FLIPQUEUELENGTH
fields: flipqueuelength control
Definition nvapi.h:20579
NVVIOCONFIG_COLORCONVERSION
#define NVVIOCONFIG_COLORCONVERSION
fields: colorConversion
Definition nvapi.h:20569
NVVIOCONFIG_SYNCSOURCEENABLE
#define NVVIOCONFIG_SYNCSOURCEENABLE
fields: syncSource and syncEnable
Definition nvapi.h:20571
NVVIOCONFIG_SIGNALFORMAT
#define NVVIOCONFIG_SIGNALFORMAT
fields: signalFormat
Definition nvapi.h:20565
NVVIOCONFIG_ANC_AUDIO_REPEAT
#define NVVIOCONFIG_ANC_AUDIO_REPEAT
fields: enableAudioBlanking
Definition nvapi.h:20591
NVVIOCONFIG_STREAMS
#define NVVIOCONFIG_STREAMS
fields: streams
Definition nvapi.h:20589
NVVIOCONFIG_DATAFORMAT
#define NVVIOCONFIG_DATAFORMAT
fields: dataFormat
Definition nvapi.h:20566
NVVIOCONFIG_FULL_COLOR_RANGE
#define NVVIOCONFIG_FULL_COLOR_RANGE
fields: bEnableFullColorRange
Definition nvapi.h:20586
NVVIOCONFIG_OUTPUTREGION
#define NVVIOCONFIG_OUTPUTREGION
fields: outputRegion
Definition nvapi.h:20567
NVVIOCONFIG_DATAINTEGRITYCHECK
#define NVVIOCONFIG_DATAINTEGRITYCHECK
fields: bEnableDataIntegrityCheck (Not supported on Quadro FX 4000 SDI)
Definition nvapi.h:20577
NVVIOCONFIG_OUTPUTAREA
#define NVVIOCONFIG_OUTPUTAREA
fields: outputArea
Definition nvapi.h:20568
NVVIOCONFIG_COMPOSITE_Y
#define NVVIOCONFIG_COMPOSITE_Y
fields: compRange
Definition nvapi.h:20583
NVVIOCONFIG_COMPOSITE
#define NVVIOCONFIG_COMPOSITE
fields: bEnableComposite
Definition nvapi.h:20581
NVVIOCONFIG_ALPHAKEYCOMPOSITE
#define NVVIOCONFIG_ALPHAKEYCOMPOSITE
fields: bEnableAlphaKeyComposite
Definition nvapi.h:20582
NVVIOCONFIG_GAMMACORRECTION
#define NVVIOCONFIG_GAMMACORRECTION
fields: gammaCorrection
Definition nvapi.h:20570
NVVIOCONFIG_COMPOSITESYNCTYPE
#define NVVIOCONFIG_COMPOSITESYNCTYPE
fields: compositeSyncType
Definition nvapi.h:20573
NVVIOCONFIG_ANC_PARITY_COMPUTATION
#define NVVIOCONFIG_ANC_PARITY_COMPUTATION
fields: ancParityComputation
Definition nvapi.h:20590
NVVIOCONFIG_CSCOVERRIDE
#define NVVIOCONFIG_CSCOVERRIDE
fields: colorConversion override
Definition nvapi.h:20578
NVVIOCONFIG_COMPOSITETERMINATE
#define NVVIOCONFIG_COMPOSITETERMINATE
fields: bCompositeTerminate (Not supported on Quadro FX 4000 SDI)
Definition nvapi.h:20576
NVVIOCONFIG_SYNCDELAY
#define NVVIOCONFIG_SYNCDELAY
fields: syncDelay
Definition nvapi.h:20572
NVVIOCONFIG_FRAMELOCKENABLE
#define NVVIOCONFIG_FRAMELOCKENABLE
fields: EnableFramelock
Definition nvapi.h:20574
NVVIOCONFIG_RESERVED_SDIOUTPUTENABLE
#define NVVIOCONFIG_RESERVED_SDIOUTPUTENABLE
fields: bEnableSDIOutput
Definition nvapi.h:20588
NVVIOCONFIG_ANCTIMECODEGENERATION
#define NVVIOCONFIG_ANCTIMECODEGENERATION
fields: bEnableANCTimeCodeGeneration
Definition nvapi.h:20580
NVVIOCONFIG_RGB_DATA
#define NVVIOCONFIG_RGB_DATA
fields: bEnableRGBData
Definition nvapi.h:20587

◆ NVVIOCONFIG_ALLOWSDIRUNNING_FIELDS

#define NVVIOCONFIG_ALLOWSDIRUNNING_FIELDS
Value:
( NVVIOCONFIG_DATAINTEGRITYCHECK | \
NVVIOCONFIG_SYNCDELAY | \
NVVIOCONFIG_CSCOVERRIDE | \
NVVIOCONFIG_ANCTIMECODEGENERATION | \
NVVIOCONFIG_COMPOSITE | \
NVVIOCONFIG_ALPHAKEYCOMPOSITE | \
NVVIOCONFIG_COMPOSITE_Y | \
NVVIOCONFIG_COMPOSITE_CR | \
NVVIOCONFIG_COMPOSITE_CB | \
NVVIOCONFIG_ANC_PARITY_COMPUTATION)

◆ NVVIOCONFIG_ALPHAKEYCOMPOSITE

#define NVVIOCONFIG_ALPHAKEYCOMPOSITE   0x00020000

fields: bEnableAlphaKeyComposite

◆ NVVIOCONFIG_ANC_AUDIO_REPEAT

#define NVVIOCONFIG_ANC_AUDIO_REPEAT   0x04000000

fields: enableAudioBlanking

◆ NVVIOCONFIG_ANC_PARITY_COMPUTATION

#define NVVIOCONFIG_ANC_PARITY_COMPUTATION   0x02000000

fields: ancParityComputation

◆ NVVIOCONFIG_ANCTIMECODEGENERATION

#define NVVIOCONFIG_ANCTIMECODEGENERATION   0x00008000

fields: bEnableANCTimeCodeGeneration

◆ NVVIOCONFIG_COLORCONVERSION

#define NVVIOCONFIG_COLORCONVERSION   0x00000010

fields: colorConversion

◆ NVVIOCONFIG_COMPOSITE

#define NVVIOCONFIG_COMPOSITE   0x00010000

fields: bEnableComposite

◆ NVVIOCONFIG_COMPOSITE_CB

#define NVVIOCONFIG_COMPOSITE_CB   0x00100000

fields: compRange

◆ NVVIOCONFIG_COMPOSITE_CR

#define NVVIOCONFIG_COMPOSITE_CR   0x00080000

fields: compRange

◆ NVVIOCONFIG_COMPOSITE_Y

#define NVVIOCONFIG_COMPOSITE_Y   0x00040000

fields: compRange

◆ NVVIOCONFIG_COMPOSITESYNCTYPE

#define NVVIOCONFIG_COMPOSITESYNCTYPE   0x00000100

fields: compositeSyncType

◆ NVVIOCONFIG_COMPOSITETERMINATE

#define NVVIOCONFIG_COMPOSITETERMINATE   0x00000800

fields: bCompositeTerminate (Not supported on Quadro FX 4000 SDI)

◆ NVVIOCONFIG_CSCOVERRIDE

#define NVVIOCONFIG_CSCOVERRIDE   0x00002000

fields: colorConversion override

◆ NVVIOCONFIG_DATAFORMAT

#define NVVIOCONFIG_DATAFORMAT   0x00000002

fields: dataFormat

◆ NVVIOCONFIG_DATAINTEGRITYCHECK

#define NVVIOCONFIG_DATAINTEGRITYCHECK   0x00001000

fields: bEnableDataIntegrityCheck (Not supported on Quadro FX 4000 SDI)

◆ NVVIOCONFIG_DRIVERFIELDS

#define NVVIOCONFIG_DRIVERFIELDS
Value:
( NVVIOCONFIG_OUTPUTREGION | \
NVVIOCONFIG_OUTPUTAREA | \
NVVIOCONFIG_COLORCONVERSION | \
NVVIOCONFIG_FLIPQUEUELENGTH)

◆ NVVIOCONFIG_FLIPQUEUELENGTH

#define NVVIOCONFIG_FLIPQUEUELENGTH   0x00004000

fields: flipqueuelength control

◆ NVVIOCONFIG_FRAMELOCKENABLE

#define NVVIOCONFIG_FRAMELOCKENABLE   0x00000200

fields: EnableFramelock

◆ NVVIOCONFIG_FULL_COLOR_RANGE

#define NVVIOCONFIG_FULL_COLOR_RANGE   0x00200000

fields: bEnableFullColorRange

◆ NVVIOCONFIG_GAMMACORRECTION

#define NVVIOCONFIG_GAMMACORRECTION   0x00000020

fields: gammaCorrection

◆ NVVIOCONFIG_GAMMAFIELDS

#define NVVIOCONFIG_GAMMAFIELDS   ( NVVIOCONFIG_GAMMACORRECTION )

◆ NVVIOCONFIG_OUTPUTAREA

#define NVVIOCONFIG_OUTPUTAREA   0x00000008

fields: outputArea

◆ NVVIOCONFIG_OUTPUTREGION

#define NVVIOCONFIG_OUTPUTREGION   0x00000004

fields: outputRegion

◆ NVVIOCONFIG_RESERVED_SDIOUTPUTENABLE

#define NVVIOCONFIG_RESERVED_SDIOUTPUTENABLE   0x00800000

fields: bEnableSDIOutput

◆ NVVIOCONFIG_RGB_DATA

#define NVVIOCONFIG_RGB_DATA   0x00400000

fields: bEnableRGBData

◆ NVVIOCONFIG_RMCTRLFIELDS

#define NVVIOCONFIG_RMCTRLFIELDS
Value:
( NVVIOCONFIG_SIGNALFORMAT | \
NVVIOCONFIG_DATAFORMAT | \
NVVIOCONFIG_SYNCSOURCEENABLE | \
NVVIOCONFIG_COMPOSITESYNCTYPE | \
NVVIOCONFIG_FRAMELOCKENABLE | \
NVVIOCONFIG_422FILTER | \
NVVIOCONFIG_COMPOSITETERMINATE | \
NVVIOCONFIG_DATAINTEGRITYCHECK | \
NVVIOCONFIG_COMPOSITE | \
NVVIOCONFIG_ALPHAKEYCOMPOSITE | \
NVVIOCONFIG_COMPOSITE_Y | \
NVVIOCONFIG_COMPOSITE_CR | \
NVVIOCONFIG_COMPOSITE_CB)

◆ NVVIOCONFIG_RMMODESET_FIELDS

#define NVVIOCONFIG_RMMODESET_FIELDS
Value:
( NVVIOCONFIG_SIGNALFORMAT | \
NVVIOCONFIG_DATAFORMAT | \
NVVIOCONFIG_SYNCSOURCEENABLE | \
NVVIOCONFIG_FRAMELOCKENABLE | \
NVVIOCONFIG_COMPOSITESYNCTYPE | \
NVVIOCONFIG_ANC_AUDIO_REPEAT)

◆ NVVIOCONFIG_RMSKEWFIELDS

#define NVVIOCONFIG_RMSKEWFIELDS   ( NVVIOCONFIG_SYNCDELAY )

◆ NVVIOCONFIG_SIGNALFORMAT

#define NVVIOCONFIG_SIGNALFORMAT   0x00000001

fields: signalFormat

◆ NVVIOCONFIG_STREAMS

#define NVVIOCONFIG_STREAMS   0x01000000

fields: streams

◆ NVVIOCONFIG_SYNCDELAY

#define NVVIOCONFIG_SYNCDELAY   0x00000080

fields: syncDelay

◆ NVVIOCONFIG_SYNCSOURCEENABLE

#define NVVIOCONFIG_SYNCSOURCEENABLE   0x00000040

fields: syncSource and syncEnable

◆ NVVIOCONFIG_VALIDFIELDS

#define NVVIOCONFIG_VALIDFIELDS
Value:
( NVVIOCONFIG_SIGNALFORMAT | \
NVVIOCONFIG_DATAFORMAT | \
NVVIOCONFIG_OUTPUTREGION | \
NVVIOCONFIG_OUTPUTAREA | \
NVVIOCONFIG_COLORCONVERSION | \
NVVIOCONFIG_GAMMACORRECTION | \
NVVIOCONFIG_SYNCSOURCEENABLE | \
NVVIOCONFIG_SYNCDELAY | \
NVVIOCONFIG_COMPOSITESYNCTYPE | \
NVVIOCONFIG_FRAMELOCKENABLE | \
NVVIOCONFIG_RESERVED_SDIOUTPUTENABLE | \
NVVIOCONFIG_422FILTER | \
NVVIOCONFIG_COMPOSITETERMINATE | \
NVVIOCONFIG_DATAINTEGRITYCHECK | \
NVVIOCONFIG_CSCOVERRIDE | \
NVVIOCONFIG_FLIPQUEUELENGTH | \
NVVIOCONFIG_ANCTIMECODEGENERATION | \
NVVIOCONFIG_COMPOSITE | \
NVVIOCONFIG_ALPHAKEYCOMPOSITE | \
NVVIOCONFIG_COMPOSITE_Y | \
NVVIOCONFIG_COMPOSITE_CR | \
NVVIOCONFIG_COMPOSITE_CB | \
NVVIOCONFIG_FULL_COLOR_RANGE | \
NVVIOCONFIG_RGB_DATA | \
NVVIOCONFIG_RESERVED_SDIOUTPUTENABLE | \
NVVIOCONFIG_STREAMS | \
NVVIOCONFIG_ANC_PARITY_COMPUTATION | \
NVVIOCONFIG_ANC_AUDIO_REPEAT)

◆ NVVIOCONFIG_VER

#define NVVIOCONFIG_VER   NVVIOCONFIG_VER3

◆ NVVIOCONFIG_VER1

#define NVVIOCONFIG_VER1   MAKE_NVAPI_VERSION(NVVIOCONFIG_V1,1)

◆ NVVIOCONFIG_VER2

#define NVVIOCONFIG_VER2   MAKE_NVAPI_VERSION(NVVIOCONFIG_V2,2)

◆ NVVIOCONFIG_VER3

#define NVVIOCONFIG_VER3   MAKE_NVAPI_VERSION(NVVIOCONFIG_V3,3)

◆ NVVIOGAMMACORRECTION_VER

#define NVVIOGAMMACORRECTION_VER   MAKE_NVAPI_VERSION(NVVIOGAMMACORRECTION,1)

Macro for constructing thevesion field of _NVVIOGAMMACORRECTION.

◆ NVVIOOWNERID_NONE

#define NVVIOOWNERID_NONE   0

Unregistered ownerId

◆ NVVIOPCIINFO_VER

#define NVVIOPCIINFO_VER   NVVIOPCIINFO_VER1

◆ NVVIOPCIINFO_VER1

#define NVVIOPCIINFO_VER1   MAKE_NVAPI_VERSION(NVVIOPCIINFO_V1,1)

◆ NVVIOSTATUS_VER

#define NVVIOSTATUS_VER   MAKE_NVAPI_VERSION(NVVIOSTATUS,1)

Macro for constructingthe version field of NVVIOSTATUS.

◆ NVVIOSYNCDELAY_VER

#define NVVIOSYNCDELAY_VER   MAKE_NVAPI_VERSION(NVVIOSYNCDELAY,1)

Macro for constructing the version field of NVVIOSYNCDELAY.

◆ NVVIOTOPOLOGY_VER

#define NVVIOTOPOLOGY_VER   MAKE_NVAPI_VERSION(NVVIOTOPOLOGY,1)

Macro for constructing the version field of NVVIOTOPOLOGY.

Typedef Documentation

◆ NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1

typedef struct _NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1 NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1

Callback settings common to all client callbacks.

◆ NV_DISPLAY_DRIVER_INFO

typedef NV_DISPLAY_DRIVER_INFO_V2 NV_DISPLAY_DRIVER_INFO

◆ NV_DISPLAY_DRIVER_INFO_V1

typedef struct _NV_DISPLAY_DRIVER_INFO NV_DISPLAY_DRIVER_INFO_V1

◆ NV_DISPLAY_DRIVER_INFO_V2

typedef struct _NV_DISPLAY_DRIVER_INFO_V2 NV_DISPLAY_DRIVER_INFO_V2

◆ NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1

typedef struct _NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1 NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1

Callback data common to all client callbacks.

◆ NV_GPU_CLIENT_CALLBACK_SETTINGS_SUPER_V1

typedef NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1 NV_GPU_CLIENT_CALLBACK_SETTINGS_SUPER_V1

◆ NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1

typedef struct _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1 NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1

Data passed back to callback registered with NvAPI_GPU_ClientRegisterForUtilizationSampleUpdates.

◆ NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1

typedef struct _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1 NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1

Callback settings common to all periodic client callbacks.

◆ NV_GPU_CLIENT_UTIL_DOMAIN_ID

typedef enum _NV_GPU_CLIENT_UTIL_DOMAIN_ID NV_GPU_CLIENT_UTIL_DOMAIN_ID

Enumeration of different utilization domains

◆ NV_GPU_CLIENT_UTILIZATION_DATA_V1

typedef struct _NV_GPU_CLIENT_UTILIZATION_DATA_V1 NV_GPU_CLIENT_UTILIZATION_DATA_V1

Data specific to a single utilization domain.

◆ NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS

typedef NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1 NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS

◆ NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1

typedef struct _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1 NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1

Data required to register a periodic callback for utilization data.

◆ NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_V1

typedef void(__cdecl * NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_V1) (NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1 *pData)

Function prototype for a periodic utilization data callback that will be registered with NvAPI.

◆ NV_LOGICAL_GPU_HANDLE_DATA

typedef struct _NV_LOGICAL_GPU_HANDLE_DATA NV_LOGICAL_GPU_HANDLE_DATA

◆ NV_LOGICAL_GPUS

typedef NV_LOGICAL_GPUS_V1 NV_LOGICAL_GPUS

◆ NV_LOGICAL_GPUS_V1

typedef struct _NV_LOGICAL_GPUS NV_LOGICAL_GPUS_V1

◆ NV_PHYSICAL_GPU_HANDLE_DATA

typedef struct _NV_PHYSICAL_GPU_HANDLE_DATA NV_PHYSICAL_GPU_HANDLE_DATA

◆ NV_PHYSICAL_GPUS

typedef NV_PHYSICAL_GPUS_V1 NV_PHYSICAL_GPUS

◆ NV_PHYSICAL_GPUS_V1

typedef struct _NV_PHYSICAL_GPUS NV_PHYSICAL_GPUS_V1

◆ NV_VIO_TOPOLOGY

typedef struct _NV_VIO_TOPOLOGY NV_VIO_TOPOLOGY

◆ NVVIOANCPARITYCOMPUTATION

typedef enum _NVVIOANCPARITYCOMPUTATION NVVIOANCPARITYCOMPUTATION

◆ NVVIOBITSPERCOMPONENT

typedef enum _NVVIOBITSPERCOMPONENT NVVIOBITSPERCOMPONENT

◆ NVVIOCAPS

typedef struct _NVVIOCAPS NVVIOCAPS

Device capabilities.

◆ NVVIOCAPTURESTATUS

typedef enum _NVVIOCAPTURESTATUS NVVIOCAPTURESTATUS

Video Capture Status.

◆ NVVIOCHANNELSTATUS

typedef struct _NVVIOCHANNELSTATUS NVVIOCHANNELSTATUS

Input channel status.

◆ NVVIOCOLORCONVERSION

typedef struct _NVVIOCOLORCONVERSION NVVIOCOLORCONVERSION

Colorspace conversion.

◆ NVVIOCOLORSPACE

typedef enum _NVVIOCOLORSPACE NVVIOCOLORSPACE

◆ NVVIOCOMPONENTSAMPLING

typedef enum _NVVIOCOMPONENTSAMPLING NVVIOCOMPONENTSAMPLING

Component sampling.

◆ NVVIOCOMPOSITERANGE

typedef struct _NVVIOCOMPOSITERANGE NVVIOCOMPOSITERANGE

◆ NVVIOCOMPSYNCTYPE

typedef enum _NVVIOCOMPSYNCTYPE NVVIOCOMPSYNCTYPE

Composite synchronization type.

◆ NVVIOCONFIG

typedef NVVIOCONFIG_V3 NVVIOCONFIG

◆ NVVIOCONFIG_V1

typedef struct _NVVIOCONFIG_V1 NVVIOCONFIG_V1

◆ NVVIOCONFIG_V2

typedef struct _NVVIOCONFIG_V2 NVVIOCONFIG_V2

◆ NVVIOCONFIG_V3

typedef struct _NVVIOCONFIG_V3 NVVIOCONFIG_V3

◆ NVVIOCONFIGTYPE

typedef enum _NVVIOCONFIGTYPE NVVIOCONFIGTYPE

Device configuration.

◆ NVVIODATAFORMAT

typedef enum _NVVIODATAFORMAT NVVIODATAFORMAT

Video data format.

◆ NVVIODATAFORMATDETAIL

typedef struct _NVVIODATAFORMATDETAIL NVVIODATAFORMATDETAIL

Data format details.

◆ NVVIOGAMMACORRECTION

typedef struct _NVVIOGAMMACORRECTION NVVIOGAMMACORRECTION

Gamma correction.

◆ NVVIOGAMMARAMP10

typedef struct _NVVIOGAMMARAMP10 NVVIOGAMMARAMP10

Gamma ramp (10-bit index)

◆ NVVIOGAMMARAMP8

typedef struct _NVVIOGAMMARAMP8 NVVIOGAMMARAMP8

Gamma ramp (8-bit index)

◆ NVVIOINPUTCONFIG

typedef struct _NVVIOINPUTCONFIG NVVIOINPUTCONFIG

Input device configuration.

◆ NVVIOINPUTOUTPUTSTATUS

typedef enum _NVVIOINPUTOUTPUTSTATUS NVVIOINPUTOUTPUTSTATUS

Video input output status.

◆ NVVIOINPUTSTATUS

typedef struct _NVVIOINPUTSTATUS NVVIOINPUTSTATUS

Input device status.

◆ NVVIOINTERLACEMODE

typedef enum _NVVIOINTERLACEMODE NVVIOINTERLACEMODE

Interlace mode.

◆ NVVIOLINKID

typedef enum _NVVIOLINKID NVVIOLINKID

◆ NVVIOOUTPUTAREA

typedef enum _NVVIOOUTPUTAREA NVVIOOUTPUTAREA

Video output area.

◆ NVVIOOUTPUTCONFIG

typedef NVVIOOUTPUTCONFIG_V3 NVVIOOUTPUTCONFIG

◆ NVVIOOUTPUTCONFIG_V1

typedef struct _NVVIOOUTPUTCONFIG_V1 NVVIOOUTPUTCONFIG_V1

Output device configuration.

◆ NVVIOOUTPUTCONFIG_V2

typedef struct _NVVIOOUTPUTCONFIG_V2 NVVIOOUTPUTCONFIG_V2

◆ NVVIOOUTPUTCONFIG_V3

typedef struct _NVVIOOUTPUTCONFIG_V3 NVVIOOUTPUTCONFIG_V3

◆ NVVIOOUTPUTREGION

typedef struct _NVVIOOUTPUTREGION NVVIOOUTPUTREGION

Output region.

◆ NVVIOOUTPUTSTATUS

typedef struct _NVVIOOUTPUTSTATUS NVVIOOUTPUTSTATUS

Output device status.

◆ NVVIOOWNERID

typedef NvU32 NVVIOOWNERID

Unique identifier for VIO owner (process identifier or NVVIOOWNERID_NONE)

◆ NVVIOOWNERTYPE

typedef enum _NVVIOOWNERTYPE NVVIOOWNERTYPE

Owner type for device.

◆ NVVIOPCIINFO

typedef NVVIOPCIINFO_V1 NVVIOPCIINFO

◆ NVVIOPCIINFO_V1

typedef struct _NVVIOPCIINFO NVVIOPCIINFO_V1

◆ NVVIOPCILINKRATE

typedef enum _NVVIOPCILINKRATE NVVIOPCILINKRATE

◆ NVVIOPCILINKWIDTH

typedef enum _NVVIOPCILINKWIDTH NVVIOPCILINKWIDTH

◆ NVVIOSIGNALFORMAT

typedef enum _NVVIOSIGNALFORMAT NVVIOSIGNALFORMAT

Video signal format and resolution.

◆ NVVIOSIGNALFORMATDETAIL

typedef struct _NVVIOSIGNALFORMATDETAIL NVVIOSIGNALFORMATDETAIL

Signal format details.

◆ NVVIOSTATUS

typedef struct _NVVIOSTATUS NVVIOSTATUS

Video device status.

◆ NVVIOSTATUSTYPE

typedef enum _NVVIOSTATUSTYPE NVVIOSTATUSTYPE

Video Capture Status.

◆ NVVIOSTREAM

typedef struct _NVVIOSTREAM NVVIOSTREAM

Stream configuration.

◆ NVVIOSYNCDELAY

typedef struct _NVVIOSYNCDELAY NVVIOSYNCDELAY

Sync delay.

◆ NVVIOSYNCSOURCE

typedef enum _NVVIOSYNCSOURCE NVVIOSYNCSOURCE

Synchronization source.

◆ NVVIOSYNCSTATUS

typedef enum _NVVIOSYNCSTATUS NVVIOSYNCSTATUS

Synchronization input status.

◆ NVVIOTOPOLOGY

typedef struct _NV_VIO_TOPOLOGY NVVIOTOPOLOGY

◆ NVVIOVIDEOMODE

typedef struct _NVVIOVIDEOMODE NVVIOVIDEOMODE

Video mode information.

◆ NVVIOVIDEOSTANDARD

typedef enum _NVVIOVIDEOSTANDARD NVVIOVIDEOSTANDARD

SMPTE standards format.

◆ NVVIOVIDEOTYPE

typedef enum _NVVIOVIDEOTYPE NVVIOVIDEOTYPE

HD or SD video type.

Enumeration Type Documentation

◆ _NV_GPU_CLIENT_UTIL_DOMAIN_ID

enum _NV_GPU_CLIENT_UTIL_DOMAIN_ID

Enumeration of different utilization domains

Enumerator
NV_GPU_CLIENT_UTIL_DOMAIN_GRAPHICS 
NV_GPU_CLIENT_UTIL_DOMAIN_FRAME_BUFFER 
NV_GPU_CLIENT_UTIL_DOMAIN_VIDEO 
NV_GPU_CLIENT_UTIL_DOMAIN_RSVD 

Reserved for future use.

◆ _NVVIOANCPARITYCOMPUTATION

enum _NVVIOANCPARITYCOMPUTATION
Enumerator
NVVIOANCPARITYCOMPUTATION_AUTO 
NVVIOANCPARITYCOMPUTATION_ON 
NVVIOANCPARITYCOMPUTATION_OFF 

◆ _NVVIOBITSPERCOMPONENT

enum _NVVIOBITSPERCOMPONENT
Enumerator
NVVIOBITSPERCOMPONENT_UNKNOWN 
NVVIOBITSPERCOMPONENT_8 
NVVIOBITSPERCOMPONENT_10 
NVVIOBITSPERCOMPONENT_12 

◆ _NVVIOCAPTURESTATUS

enum _NVVIOCAPTURESTATUS

Video Capture Status.

Enumerator
NVVIOSTATUS_STOPPED 

Sync not detected.

NVVIOSTATUS_RUNNING 

Error detected.

NVVIOSTATUS_ERROR 

Genlock in use, format mismatch with output.

◆ _NVVIOCOLORSPACE

enum _NVVIOCOLORSPACE
Enumerator
NVVIOCOLORSPACE_UNKNOWN 
NVVIOCOLORSPACE_YCBCR 
NVVIOCOLORSPACE_YCBCRA 
NVVIOCOLORSPACE_YCBCRD 
NVVIOCOLORSPACE_GBR 
NVVIOCOLORSPACE_GBRA 
NVVIOCOLORSPACE_GBRD 

◆ _NVVIOCOMPONENTSAMPLING

enum _NVVIOCOMPONENTSAMPLING

Component sampling.

Enumerator
NVVIOCOMPONENTSAMPLING_UNKNOWN 
NVVIOCOMPONENTSAMPLING_4444 
NVVIOCOMPONENTSAMPLING_4224 
NVVIOCOMPONENTSAMPLING_444 
NVVIOCOMPONENTSAMPLING_422 

◆ _NVVIOCOMPSYNCTYPE

enum _NVVIOCOMPSYNCTYPE

Composite synchronization type.

Enumerator
NVVIOCOMPSYNCTYPE_AUTO 

Auto-detect.

NVVIOCOMPSYNCTYPE_BILEVEL 

Bi-level signal.

NVVIOCOMPSYNCTYPE_TRILEVEL 

Tri-level signal.

◆ _NVVIOCONFIGTYPE

enum _NVVIOCONFIGTYPE

Device configuration.

Enumerator
NVVIOCONFIGTYPE_IN 

Input Status.

NVVIOCONFIGTYPE_OUT 

Output Status.

◆ _NVVIODATAFORMAT

enum _NVVIODATAFORMAT

Video data format.

Enumerator
NVVIODATAFORMAT_UNKNOWN 

Invalid DataFormat.

NVVIODATAFORMAT_R8G8B8_TO_YCRCB444 

R8:G8:B8 => YCrCb (4:4:4)

NVVIODATAFORMAT_R8G8B8A8_TO_YCRCBA4444 

R8:G8:B8:A8 => YCrCbA (4:4:4:4)

NVVIODATAFORMAT_R8G8B8Z10_TO_YCRCBZ4444 

R8:G8:B8:Z10 => YCrCbZ (4:4:4:4)

NVVIODATAFORMAT_R8G8B8_TO_YCRCB422 

R8:G8:B8 => YCrCb (4:2:2)

NVVIODATAFORMAT_R8G8B8A8_TO_YCRCBA4224 

R8:G8:B8:A8 => YCrCbA (4:2:2:4)

NVVIODATAFORMAT_R8G8B8Z10_TO_YCRCBZ4224 

R8:G8:B8:Z10 => YCrCbZ (4:2:2:4)

NVVIODATAFORMAT_X8X8X8_444_PASSTHRU 

R8:G8:B8 => RGB (4:4:4)

NVVIODATAFORMAT_X8X8X8A8_4444_PASSTHRU 

R8:G8:B8:A8 => RGBA (4:4:4:4)

NVVIODATAFORMAT_X8X8X8Z10_4444_PASSTHRU 

R8:G8:B8:Z10 => RGBZ (4:4:4:4)

NVVIODATAFORMAT_X10X10X10_444_PASSTHRU 

Y10:CR10:CB10 => YCrCb (4:4:4)

NVVIODATAFORMAT_X10X8X8_444_PASSTHRU 

Y10:CR8:CB8 => YCrCb (4:4:4)

NVVIODATAFORMAT_X10X8X8A10_4444_PASSTHRU 

Y10:CR8:CB8:A10 => YCrCbA (4:4:4:4)

NVVIODATAFORMAT_X10X8X8Z10_4444_PASSTHRU 

Y10:CR8:CB8:Z10 => YCrCbZ (4:4:4:4)

NVVIODATAFORMAT_DUAL_R8G8B8_TO_DUAL_YCRCB422 

R8:G8:B8 + R8:G8:B8 => YCrCb (4:2:2 + 4:2:2)

NVVIODATAFORMAT_DUAL_X8X8X8_TO_DUAL_422_PASSTHRU 

Y8:CR8:CB8 + Y8:CR8:CB8 => YCrCb (4:2:2 + 4:2:2)

NVVIODATAFORMAT_R10G10B10_TO_YCRCB422 

R10:G10:B10 => YCrCb (4:2:2)

NVVIODATAFORMAT_R10G10B10_TO_YCRCB444 

R10:G10:B10 => YCrCb (4:4:4)

NVVIODATAFORMAT_X12X12X12_444_PASSTHRU 

X12:X12:X12 => XXX (4:4:4)

NVVIODATAFORMAT_X12X12X12_422_PASSTHRU 

X12:X12:X12 => XXX (4:2:2)

NVVIODATAFORMAT_Y10CR10CB10_TO_YCRCB422 

Y10:CR10:CB10 => YCrCb (4:2:2)

NVVIODATAFORMAT_Y8CR8CB8_TO_YCRCB422 

Y8:CR8:CB8 => YCrCb (4:2:2)

NVVIODATAFORMAT_Y10CR8CB8A10_TO_YCRCBA4224 

Y10:CR8:CB8:A10 => YCrCbA (4:2:2:4)

NVVIODATAFORMAT_R10G10B10_TO_RGB444 

R10:G10:B10 => RGB (4:4:4)

NVVIODATAFORMAT_R12G12B12_TO_YCRCB444 

R12:G12:B12 => YCrCb (4:4:4)

NVVIODATAFORMAT_R12G12B12_TO_YCRCB422 

R12:G12:B12 => YCrCb (4:2:2)

◆ _NVVIOINPUTOUTPUTSTATUS

enum _NVVIOINPUTOUTPUTSTATUS

Video input output status.

Enumerator
NVINPUTOUTPUTSTATUS_OFF 

Not in use.

NVINPUTOUTPUTSTATUS_ERROR 

Error detected.

NVINPUTOUTPUTSTATUS_SDI_SD 

SDI (standard-definition)

NVINPUTOUTPUTSTATUS_SDI_HD 

SDI (high-definition)

◆ _NVVIOINTERLACEMODE

enum _NVVIOINTERLACEMODE

Interlace mode.

Enumerator
NVVIOINTERLACEMODE_PROGRESSIVE 

Progressive (p)

NVVIOINTERLACEMODE_INTERLACE 

Interlace (i)

NVVIOINTERLACEMODE_PSF 

Progressive Segment Frame (psf)

◆ _NVVIOLINKID

enum _NVVIOLINKID
Enumerator
NVVIOLINKID_UNKNOWN 
NVVIOLINKID_A 
NVVIOLINKID_B 
NVVIOLINKID_C 
NVVIOLINKID_D 

◆ _NVVIOOUTPUTAREA

enum _NVVIOOUTPUTAREA

Video output area.

Enumerator
NVVIOOUTPUTAREA_FULLSIZE 

Output to entire video resolution (full size)

NVVIOOUTPUTAREA_SAFEACTION 

Output to centered 90% of video resolution (safe action)

NVVIOOUTPUTAREA_SAFETITLE 

Output to centered 80% of video resolution (safe title)

◆ _NVVIOOWNERTYPE

enum _NVVIOOWNERTYPE

Owner type for device.

Enumerator
NVVIOOWNERTYPE_NONE 

No owner for the device.

NVVIOOWNERTYPE_APPLICATION 

Application owns the device.

NVVIOOWNERTYPE_DESKTOP 

Desktop transparent mode owns the device (not applicable for video input)

◆ _NVVIOPCILINKRATE

enum _NVVIOPCILINKRATE
Enumerator
NVVIOPCILINKRATE_UNKNOWN 
NVVIOPCILINKRATE_GEN1 
NVVIOPCILINKRATE_GEN2 
NVVIOPCILINKRATE_GEN3 

◆ _NVVIOPCILINKWIDTH

enum _NVVIOPCILINKWIDTH
Enumerator
NVVIOPCILINKWIDTH_UNKNOWN 
NVVIOPCILINKWIDTH_x1 
NVVIOPCILINKWIDTH_x2 
NVVIOPCILINKWIDTH_x4 
NVVIOPCILINKWIDTH_x8 
NVVIOPCILINKWIDTH_x16 

◆ _NVVIOSIGNALFORMAT

enum _NVVIOSIGNALFORMAT

Video signal format and resolution.

Enumerator
NVVIOSIGNALFORMAT_NONE 

Invalid signal format.

NVVIOSIGNALFORMAT_487I_59_94_SMPTE259_NTSC 

01 487i 59.94Hz (SMPTE259) NTSC

NVVIOSIGNALFORMAT_576I_50_00_SMPTE259_PAL 

02 576i 50.00Hz (SMPTE259) PAL

NVVIOSIGNALFORMAT_1035I_60_00_SMPTE260 

03 1035i 60.00Hz (SMPTE260)

NVVIOSIGNALFORMAT_1035I_59_94_SMPTE260 

04 1035i 59.94Hz (SMPTE260)

NVVIOSIGNALFORMAT_1080I_50_00_SMPTE295 

05 1080i 50.00Hz (SMPTE295)

NVVIOSIGNALFORMAT_1080I_60_00_SMPTE274 

06 1080i 60.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080I_59_94_SMPTE274 

07 1080i 59.94Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080I_50_00_SMPTE274 

08 1080i 50.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080P_30_00_SMPTE274 

09 1080p 30.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080P_29_97_SMPTE274 

10 1080p 29.97Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080P_25_00_SMPTE274 

11 1080p 25.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080P_24_00_SMPTE274 

12 1080p 24.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080P_23_976_SMPTE274 

13 1080p 23.976Hz (SMPTE274)

NVVIOSIGNALFORMAT_720P_60_00_SMPTE296 

14 720p 60.00Hz (SMPTE296)

NVVIOSIGNALFORMAT_720P_59_94_SMPTE296 

15 720p 59.94Hz (SMPTE296)

NVVIOSIGNALFORMAT_720P_50_00_SMPTE296 

16 720p 50.00Hz (SMPTE296)

NVVIOSIGNALFORMAT_1080I_48_00_SMPTE274 

17 1080I 48.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080I_47_96_SMPTE274 

18 1080I 47.96Hz (SMPTE274)

NVVIOSIGNALFORMAT_720P_30_00_SMPTE296 

19 720p 30.00Hz (SMPTE296)

NVVIOSIGNALFORMAT_720P_29_97_SMPTE296 

20 720p 29.97Hz (SMPTE296)

NVVIOSIGNALFORMAT_720P_25_00_SMPTE296 

21 720p 25.00Hz (SMPTE296)

NVVIOSIGNALFORMAT_720P_24_00_SMPTE296 

22 720p 24.00Hz (SMPTE296)

NVVIOSIGNALFORMAT_720P_23_98_SMPTE296 

23 720p 23.98Hz (SMPTE296)

NVVIOSIGNALFORMAT_2048P_30_00_SMPTE372 

24 2048p 30.00Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048P_29_97_SMPTE372 

25 2048p 29.97Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048I_60_00_SMPTE372 

26 2048i 60.00Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048I_59_94_SMPTE372 

27 2048i 59.94Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048P_25_00_SMPTE372 

28 2048p 25.00Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048I_50_00_SMPTE372 

29 2048i 50.00Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048P_24_00_SMPTE372 

30 2048p 24.00Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048P_23_98_SMPTE372 

31 2048p 23.98Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048I_48_00_SMPTE372 

32 2048i 48.00Hz (SMPTE372)

NVVIOSIGNALFORMAT_2048I_47_96_SMPTE372 

33 2048i 47.96Hz (SMPTE372)

NVVIOSIGNALFORMAT_1080PSF_25_00_SMPTE274 

34 1080PsF 25.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080PSF_29_97_SMPTE274 

35 1080PsF 29.97Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080PSF_30_00_SMPTE274 

36 1080PsF 30.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080PSF_24_00_SMPTE274 

37 1080PsF 24.00Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080PSF_23_98_SMPTE274 

38 1080PsF 23.98Hz (SMPTE274)

NVVIOSIGNALFORMAT_1080P_50_00_SMPTE274_3G_LEVEL_A 

39 1080P 50.00Hz (SMPTE274) 3G Level A

NVVIOSIGNALFORMAT_1080P_59_94_SMPTE274_3G_LEVEL_A 

40 1080P 59.94Hz (SMPTE274) 3G Level A

NVVIOSIGNALFORMAT_1080P_60_00_SMPTE274_3G_LEVEL_A 

41 1080P 60.00Hz (SMPTE274) 3G Level A

NVVIOSIGNALFORMAT_1080P_60_00_SMPTE274_3G_LEVEL_B 

42 1080p 60.00Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_1080I_60_00_SMPTE274_3G_LEVEL_B 

43 1080i 60.00Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048I_60_00_SMPTE372_3G_LEVEL_B 

44 2048i 60.00Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080P_50_00_SMPTE274_3G_LEVEL_B 

45 1080p 50.00Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_1080I_50_00_SMPTE274_3G_LEVEL_B 

46 1080i 50.00Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048I_50_00_SMPTE372_3G_LEVEL_B 

47 2048i 50.00Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080P_30_00_SMPTE274_3G_LEVEL_B 

48 1080p 30.00Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048P_30_00_SMPTE372_3G_LEVEL_B 

49 2048p 30.00Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080P_25_00_SMPTE274_3G_LEVEL_B 

50 1080p 25.00Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048P_25_00_SMPTE372_3G_LEVEL_B 

51 2048p 25.00Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080P_24_00_SMPTE274_3G_LEVEL_B 

52 1080p 24.00Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048P_24_00_SMPTE372_3G_LEVEL_B 

53 2048p 24.00Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080I_48_00_SMPTE274_3G_LEVEL_B 

54 1080i 48.00Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048I_48_00_SMPTE372_3G_LEVEL_B 

55 2048i 48.00Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080P_59_94_SMPTE274_3G_LEVEL_B 

56 1080p 59.94Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_1080I_59_94_SMPTE274_3G_LEVEL_B 

57 1080i 59.94Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048I_59_94_SMPTE372_3G_LEVEL_B 

58 2048i 59.94Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080P_29_97_SMPTE274_3G_LEVEL_B 

59 1080p 29.97Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048P_29_97_SMPTE372_3G_LEVEL_B 

60 2048p 29.97Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080P_23_98_SMPTE274_3G_LEVEL_B 

61 1080p 29.98Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048P_23_98_SMPTE372_3G_LEVEL_B 

62 2048p 29.98Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_1080I_47_96_SMPTE274_3G_LEVEL_B 

63 1080i 47.96Hz (SMPTE274) 3G Level B

NVVIOSIGNALFORMAT_2048I_47_96_SMPTE372_3G_LEVEL_B 

64 2048i 47.96Hz (SMPTE372) 3G Level B

NVVIOSIGNALFORMAT_END 

65 To indicate end of signal format list

◆ _NVVIOSTATUSTYPE

enum _NVVIOSTATUSTYPE

Video Capture Status.

Enumerator
NVVIOSTATUSTYPE_IN 

Input Status.

NVVIOSTATUSTYPE_OUT 

Output Status.

◆ _NVVIOSYNCSOURCE

enum _NVVIOSYNCSOURCE

Synchronization source.

Enumerator
NVVIOSYNCSOURCE_SDISYNC 

SDI Sync (Digital input)

NVVIOSYNCSOURCE_COMPSYNC 

COMP Sync (Composite input)

◆ _NVVIOSYNCSTATUS

enum _NVVIOSYNCSTATUS

Synchronization input status.

Enumerator
NVVIOSYNCSTATUS_OFF 

Sync not detected.

NVVIOSYNCSTATUS_ERROR 

Error detected.

NVVIOSYNCSTATUS_SYNCLOSS 

Genlock in use, format mismatch with output.

NVVIOSYNCSTATUS_COMPOSITE 

Composite sync.

NVVIOSYNCSTATUS_SDI_SD 

SDI sync (standard-definition)

NVVIOSYNCSTATUS_SDI_HD 

SDI sync (high-definition)

◆ _NVVIOVIDEOSTANDARD

enum _NVVIOVIDEOSTANDARD

SMPTE standards format.

Enumerator
NVVIOVIDEOSTANDARD_SMPTE259 

SMPTE259.

NVVIOVIDEOSTANDARD_SMPTE260 

SMPTE260.

NVVIOVIDEOSTANDARD_SMPTE274 

SMPTE274.

NVVIOVIDEOSTANDARD_SMPTE295 

SMPTE295.

NVVIOVIDEOSTANDARD_SMPTE296 

SMPTE296.

NVVIOVIDEOSTANDARD_SMPTE372 

SMPTE372.

◆ _NVVIOVIDEOTYPE

enum _NVVIOVIDEOTYPE

HD or SD video type.

Enumerator
NVVIOVIDEOTYPE_SD 

Standard-definition (SD)

NVVIOVIDEOTYPE_HD 

High-definition (HD)

Function Documentation

◆ __nvapi_deprecated_function() [1/3]

__nvapi_deprecated_function ( "Do not use this function - it is deprecated in release 290.  Instead,
use NvAPI_VIO_GetConfig."   
)

Function: NvAPI_VIO_GetCSC

Description: This API gets the colorspace conversion parameters.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[out]pCSCPointer to CSC parameters
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_GetGamma

Description: This API gets the gamma conversion parameters.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[out]pGammaPointer to gamma parameters
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_GetSyncDelay

Description: This API gets the sync delay parameters.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[out]pSyncDelayPointer to sync delay parameters
Return values
:NVAPI_NOT_SUPPORTED API is not supported

◆ __nvapi_deprecated_function() [2/3]

__nvapi_deprecated_function ( "Do not use this function - it is deprecated in release 290.  Instead,
use NvAPI_VIO_SetConfig."   
)

Function: NvAPI_VIO_SetCSC

Description: This API sets the colorspace conversion parameters.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[in]pCSCPointer to CSC parameters
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_SetGamma

Description: This API sets the gamma conversion parameters.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[in]pGammaPointer to gamma parameters
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_SetSyncDelay

Description: This API sets the sync delay parameters.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[in]pSyncDelayPointer to sync delay parameters
Return values
:NVAPI_NOT_SUPPORTED API is not supported

◆ __nvapi_deprecated_function() [3/3]

__nvapi_deprecated_function ( "Do not use this function - it is deprecated in release 440."  )

Function: NvAPI_VIO_Open

Description: This API opens the graphics adapter for video I/O operations using the OpenGL application interface. Read operations are permitted in this mode by multiple clients, but Write operations are application exclusive.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI output device handle as input.
[in]vioClassClass interface (NVVIOCLASS_* value)
[in]ownerTypeSpecify NVVIOOWNERTYPE_APPLICATION or NVVIOOWNERTYPE_DESKTOP.
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_Close

Description: This API closes the graphics adapter for graphics-to-video operations using the OpenGL application interface. Closing an OpenGL handle releases the device.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI output device handle as input.
[in]bReleaseboolean value to either keep or release ownership
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_Status

Description: This API gets the Video I/O LED status.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[out]pStatusReturn pointer to NVVIOSTATUS
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_SyncFormatDetect

Description: This API detects the Video I/O incoming sync video format.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[out]pWaitPointer to receive how many milliseconds will lapse before VIOStatus returns the detected syncFormat.
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_GetConfig

Description: This API gets the graphics-to-video configuration.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[out]pConfigPointer to the graphics-to-video configuration
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_SetConfig

Description: This API sets the graphics-to-video configuration.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[in]pConfigPointer to Graphics-to-Video configuration
Return values
:NVAPI_NOT_SUPPORTED API is not supported
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_IsRunning

Description: This API determines if Video I/O is running.

Since
Release: 190
Parameters
[in]NvVioHandle[IN]The caller provides the SDI device handle as input.
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_Start

Description: This API starts Video I/O. This API should be called for NVVIOOWNERTYPE_DESKTOP only and will not work for OGL applications.

Since
Release: 190
Parameters
[in]NvVioHandle[IN]The caller provides the SDI device handle as input.
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_Stop

Description: This API stops Video I/O. This API should be called for NVVIOOWNERTYPE_DESKTOP only and will not work for OGL applications.

Since
Release: 190
Parameters
[in]NvVioHandle[IN]The caller provides the SDI device handle as input.
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_IsFrameLockModeCompatible

Description: This API checks whether modes are compatible in frame lock mode.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[in]srcEnumIndexSource Enumeration index
[in]destEnumIndexDestination Enumeration index
[out]pbCompatiblePointer to receive compatibility
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_EnumDevices

Description: This API enumerate all VIO devices connected to the system.

Since
Release: 190
Parameters
[out]NvVioHandleUser passes the pointer of NvVioHandle[] array to get handles to all the connected video I/O devices.
[out]vioDeviceCountUser gets total number of VIO devices connected to the system.
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_QueryTopology

Description: This API queries the valid SDI topologies.

Since
Release: 190
Parameters
[out]pNvVIOTopologyUser passes the pointer to NVVIOTOPOLOGY to fetch all valid SDI topologies.
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_EnumSignalFormats

Description: This API enumerates signal formats supported by Video I/O.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[in]enumIndexEnumeration index
[out]pSignalFormatDetailPointer to receive detail or NULL
Return values
:NVAPI_NOT_SUPPORTED API is not supported

Function: NvAPI_VIO_EnumDataFormats

Description: This API enumerates data formats supported by Video I/O.

Since
Release: 190
Parameters
[in]NvVioHandleThe caller provides the SDI device handle as input.
[in]enumIndexEnumeration index
[out]pDataFormatDetailPointer to receive detail or NULL
Return values
:NVAPI_NOT_SUPPORTED API is not supported

◆ DispatchGraphics()

void INvAPI_DirectD3D12GraphicsCommandList::DispatchGraphics ( NvU32  numDispatches)

◆ GetID3D12GraphicsCommandList()

virtual ID3D12GraphicsCommandList * INvAPI_DirectD3D12GraphicsCommandList::GetID3D12GraphicsCommandList ( ) const
pure virtual

◆ IsValid()

virtual bool INvAPI_DirectD3D12GraphicsCommandList::IsValid ( ) const
pure virtual

◆ NvAPI_GPU_ClientRegisterForUtilizationSampleUpdates()

NVAPI_INTERFACE NvAPI_GPU_ClientRegisterForUtilizationSampleUpdates ( __in NvPhysicalGpuHandle  hPhysicalGpu,
__in NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS *  pCallbackSettings 
)

◆ SetMarker()

void INvAPI_DirectD3D12GraphicsCommandList::SetMarker ( void *  pMarkerData,
NvU32  markerSize 
)

Variable Documentation

◆ [union]

union { ... } NV_GPU_ARCH_INFO_V2

◆ [union]

union { ... } NV_GPU_ARCH_INFO_V2

◆ [union]

union { ... } NV_GPU_ARCH_INFO_V2

◆ [union]

union { ... } _NV_DISPLAYCONFIG_PATH_INFO_V2

◆ [union]

union { ... } NV_TIMING_FLAG

◆ [union]

union { ... } NV_D3D11_META_COMMAND_RESOURCE

◆ [union]

union { ... } _NV_MULTIGPU_CAPS_V2

◆ [union]

union { ... } _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1

◆ [union]

union { ... } _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS

◆ [union]

union { ... } _NV_SMP_ASSIST_GET_CONSTANTS_V3

◆ [union]

union { ... } _NV_SMP_ASSIST_GET_CONSTANTS_V3

◆ [union]

union { ... } _NV_SMP_ASSIST_SETUP_PARAMS_V1

◆ [union]

union { ... } _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX

◆ [union]

union { ... } _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX

◆ [union]

union { ... } _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES

◆ [union]

union { ... } _NVDRS_SETTING_VALUES

◆ [union]

union { ... } _NVDRS_SETTING_V1

◆ [union]

union { ... } _NVDRS_SETTING_V1

◆ aabbs [1/2]

D3D12_RAYTRACING_GEOMETRY_AABBS_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::aabbs

Describes AABB geometry if type is NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_PROCEDURAL_PRIMITIVE_AABBS_EX. Otherwise, this parameter is unused (space repurposed in a union).

◆ [] [2/2]

D3D12_RAYTRACING_GEOMETRY_AABBS_DESC { ... } ::aabbs

Describes AABB geometry if type is NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_PROCEDURAL_PRIMITIVE_AABBS_EX. Otherwise, this parameter is unused (space repurposed in a union).

◆ acceleratePrimaryDisplay [1/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::acceleratePrimaryDisplay

Enable SLI acceleration on the primary display while in single-wide mode (For Immersive Gaming only). Will not be persisted. Value undefined on get.

◆ acceleratePrimaryDisplay [2/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::acceleratePrimaryDisplay

Enable SLI acceleration on the primary display while in single-wide mode (For Immersive Gaming only). Will not be persisted. Value undefined on get.

◆ Activation [1/2]

NV_META_COMMAND_OPTIONAL_ACTIVATION_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Activation

◆ Activation [2/2]

NV_META_COMMAND_OPTIONAL_ACTIVATION_DESC NV_META_COMMAND_CREATE_GEMM_DESC::Activation

◆ activeFormatAspectRatio

NvU32 NV_INFOFRAME_VIDEO::activeFormatAspectRatio

◆ activeFormatInfoPresent

NvU32 NV_INFOFRAME_VIDEO::activeFormatInfoPresent

◆ adapterCaps

NvU32 _NVVIOCAPS::adapterCaps

Graphics adapter capabilities (NVVIOCAPS_* mask)

◆ adapterClass

NvU32 _NVVIOCAPS::adapterClass

Graphics adapter classes (NVVIOCLASS_SDI mask)

◆ adapterName

NvAPI_String _NVVIOCAPS::adapterName

Graphics adapter name.

◆ adapterType [1/2]

NV_ADAPTER_TYPE _NV_PHYSICAL_GPU_HANDLE_DATA::adapterType

◆ adapterType [2/2]

NV_ADAPTER_TYPE _NV_LOGICAL_GPU_HANDLE_DATA::adapterType

◆ [struct]

struct { ... } NV_GPU_ECC_ERROR_INFO::aggregate

◆ Alpha

float NV_META_COMMAND_CREATE_GEMM_DESC::Alpha

◆ Alpha1

float NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Alpha1

◆ Alpha1Resource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::Alpha1Resource

◆ Alpha1Resource [2/2]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::Alpha1Resource

◆ Alpha2

float NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Alpha2

◆ Alpha2Resource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::Alpha2Resource

◆ Alpha2Resource [2/2]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::Alpha2Resource

◆ ancParityComputation [1/2]

NVVIOANCPARITYCOMPUTATION _NVVIOOUTPUTCONFIG_V2::ancParityComputation

Enable HW ANC parity bit computation (auto/on/off)

◆ ancParityComputation [2/2]

NVVIOANCPARITYCOMPUTATION _NVVIOOUTPUTCONFIG_V3::ancParityComputation

Enable HW ANC parity bit computation (auto/on/off)

◆ AntialiasedLineEnable

BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::AntialiasedLineEnable

◆ [] [1/2]

NvU16 { ... } ::application_version

Application version of HDR10+ Vendor Specific Video Data Block.

◆ application_version [2/2]

NvU16 _NV_HDR_CAPABILITIES_V3::application_version

Application version of HDR10+ Vendor Specific Video Data Block.

◆ applyWithBezelCorrect [1/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::applyWithBezelCorrect

When enabling and doing the modeset, do we switch to the bezel-corrected resolution.

◆ applyWithBezelCorrect [2/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::applyWithBezelCorrect

When enabling and doing the modeset, do we switch to the bezel-corrected resolution.

◆ appName [1/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V1::appName

String name of the Application.

◆ appName [2/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V2::appName

String name of the Application.

◆ appName [3/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V3::appName

String name of the Application.

◆ appName [4/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V4::appName

String name of the Application.

◆ architecture [1/3]

NvU32 NV_GPU_ARCH_INFO_V1::architecture

◆ [] [2/3]

NvU32 { ... } ::architecture

architecture and architecture_id are the same. The former is NvU32 while the latter is an enum made for readability.

◆ architecture [3/3]

NvU32 NV_GPU_ARCH_INFO_V2::architecture

architecture and architecture_id are the same. The former is NvU32 while the latter is an enum made for readability.

◆ [] [1/2]

NV_GPU_ARCHITECTURE_ID { ... } ::architecture_id

specifies the architecture level for the GPU.

◆ architecture_id [2/2]

NV_GPU_ARCHITECTURE_ID NV_GPU_ARCH_INFO_V2::architecture_id

specifies the architecture level for the GPU.

◆ AResource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::AResource

◆ AResource [2/2]

NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::AResource

◆ ArraySize

UINT _NV_TEX2D_ARRAY_SRRV::ArraySize

◆ aspect

NvU32 tagNV_TIMINGEXT::aspect

Display aspect ratio Hi(aspect):horizontal-aspect, Low(aspect):vertical-aspect.

◆ ATimems

NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::ATimems

Time in ms to remain at color A before color A to color B transition.

◆ Attribute [1/3]

NV_GPU_ILLUMINATION_ATTRIB _NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM_V1::Attribute

An enumeration value specifying the Illumination attribute to be querried. refer to enum NV_GPU_ILLUMINATION_ATTRIB.

◆ Attribute [2/3]

NV_GPU_ILLUMINATION_ATTRIB _NV_GPU_GET_ILLUMINATION_PARM_V1::Attribute

An enumeration value specifying the Illumination attribute to be querried. refer to enum NV_GPU_ILLUMINATION_ATTRIB.

◆ Attribute [3/3]

NV_GPU_ILLUMINATION_ATTRIB _NV_GPU_SET_ILLUMINATION_PARM_V1::Attribute

An enumeration value specifying the Illumination attribute to be querried. refer to enum NV_GPU_ILLUMINATION_ATTRIB.

◆ [] [1/2]

NV_INFOFRAME_AUDIO { ... } ::audio

◆ audio [2/2]

NV_INFOFRAME_AUDIO NV_INFOFRAME_DATA::audio

◆ audioLatency

NvU8 _NV_MONITOR_CAPS_VSDB::audioLatency

Byte 7.

◆ backendBitDepths

NV_DP_BPC _NV_MONITOR_COLOR_DATA::backendBitDepths

One of the supported bit depths.

◆ backlt_min_luma [1/4]

NvU32 _NV_HDR_CAPABILITIES_V2::backlt_min_luma

It is the level for Backlt min luminance value.

◆ [] [2/4]

NvU32 { ... } ::backlt_min_luma

It is the level for Backlt min luminance value.

◆ backlt_min_luma [3/4]

NvU32 _NV_HDR_CAPABILITIES_V3::backlt_min_luma

It is the level for Backlt min luminance value (reserved = 0x3 in latest DV spec).

◆ [] [4/4]

NvU32 { ... } ::backlt_min_luma

It is the level for Backlt min luminance value (reserved = 0x3 in latest DV spec).

◆ barInfo

NvU32 NV_INFOFRAME_VIDEO::barInfo

◆ baseMosaic [1/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::baseMosaic

Enable as Base Mosaic (Panoramic) instead of Mosaic SLI (for NVS and Quadro-boards only)

◆ baseMosaic [2/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::baseMosaic

Enable as Base Mosaic (Panoramic) instead of Mosaic SLI (for NVS and Quadro-boards only)

◆ baseVersion

NvU32 NVAPI_D3D12_PSO_EXTENSION_DESC_V1::baseVersion

◆ baseVoltages [1/4]

NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1 NV_GPU_PERF_PSTATES20_INFO_V1::baseVoltages[NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES]

Array of baseVoltage entries Valid index range is 0 to numBaseVoltages-1

◆ [] [2/4]

NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1 { ... } ::baseVoltages[NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES]

Array of baseVoltage entries Valid index range is 0 to numBaseVoltages-1

◆ [] [3/4]

NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1 { ... } ::baseVoltages[NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES]

Array of baseVoltage entries Valid index range is 0 to numBaseVoltages-1

◆ baseVoltages [4/4]

NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1 _NV_GPU_PERF_PSTATES20_INFO_V2::baseVoltages[NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES]

Array of baseVoltage entries Valid index range is 0 to numBaseVoltages-1

◆ bCplVsyncOn

NvBool _NV_GET_SLEEP_STATUS_PARAMS::bCplVsyncOn

(OUT) Is Control Panel overriding VSYNC ON?

◆ bDefault

NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::bDefault

Bit field specifying the set of values to retrieve or set

  • default (NV_TRUE)
  • currently active (NV_FALSE).

◆ bDisable

NvU32 _NV_SET_REFLEX_SYNC_PARAMS::bDisable

(IN) Disable Reflex Sync

◆ bDisableAdaptiveSync [1/2]

NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::bDisableAdaptiveSync

[out] Indicates if adaptive sync is disabled on the display.

◆ bDisableAdaptiveSync [2/2]

NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::bDisableAdaptiveSync

[in] Indicates if adaptive sync is disabled on the display.

◆ bDisableFrameSplitting [1/2]

NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::bDisableFrameSplitting

[out] Indicates if frame splitting is disabled on the display.

◆ bDisableFrameSplitting [2/2]

NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::bDisableFrameSplitting

[in] Indicates if Frame Splitting should be disabled.

◆ bEnable

NvU32 _NV_SET_REFLEX_SYNC_PARAMS::bEnable

(IN) Enable Reflex Sync

◆ bEnabled [1/2]

NvU32 _NV_SCANOUT_INTENSITY_STATE_DATA::bEnabled

intensity is enabled or not

◆ bEnabled [2/2]

NvU32 _NV_SCANOUT_WARPING_STATE_DATA::bEnabled

warping is enabled or not

◆ bEnableSuperSamplingPredicationForVRS

NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::bEnableSuperSamplingPredicationForVRS

◆ bEnableSuperSamplingPredicationForVRSAllAttributes

NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::bEnableSuperSamplingPredicationForVRSAllAttributes

◆ Beta

float NV_META_COMMAND_CREATE_GEMM_DESC::Beta

◆ bExclusiveScissorRectsSupported [1/3]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V1::bExclusiveScissorRectsSupported

(OUT) Outputs whether Exclusive Scissor Rects are supported or not

◆ bExclusiveScissorRectsSupported [2/3]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::bExclusiveScissorRectsSupported

(OUT) Outputs whether Exclusive Scissor Rects are supported or not

◆ bExclusiveScissorRectsSupported [3/3]

NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::bExclusiveScissorRectsSupported

(OUT) Outputs whether Exclusive Scissor Rects are supported or not

◆ bFastUAVClearSupported [1/2]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::bFastUAVClearSupported

(OUT) Outputs whether UAVClear is implemented using ZBC rather than compute shader

◆ bFastUAVClearSupported [2/2]

NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::bFastUAVClearSupported

(OUT) Outputs whether UAVClear is implemented using ZBC rather than compute shader

◆ bFocusDisplay

NvU32 NV_DISPLAY_PATH::bFocusDisplay

(IN) If set, this display path should have the focus after the GPU topology change

◆ [] [1/3]

NvU32 { ... } ::bForceModeSet

(IN) Used only on Win7 and higher during a call to NvAPI_SetView(). Turns off optimization & forces OS to set supplied mode.

◆ bForceModeSet [2/3]

NvU32 NV_VIEW_TARGET_INFO::bForceModeSet

(IN) Used only on Win7 and higher during a call to NvAPI_SetView(). Turns off optimization & forces OS to set supplied mode.

◆ bForceModeSet [3/3]

NvU32 NV_DISPLAY_PATH::bForceModeSet

(IN) Used only on Win7 and higher during a call to NvAPI_SetViewEx(). Turns off optimization & forces OS to set supplied mode.

◆ bFsVrr

NvBool _NV_GET_SLEEP_STATUS_PARAMS::bFsVrr

(OUT) Is fullscreen VRR enabled?

◆ bGDIPrimary [1/4]

NvU32 NV_VIEW_TARGET_INFO::bGDIPrimary

(IN/OUT) Indicates if this is the desktop GDI primary.

◆ [] [2/4]

NvU32 { ... } ::bGDIPrimary

(IN/OUT) Indicates if this is the desktop GDI primary.

◆ bGDIPrimary [3/4]

NvU32 NV_DISPLAY_PATH::bGDIPrimary

(IN/OUT) Indicates if this is the desktop GDI primary.

◆ bGDIPrimary [4/4]

NvU32 _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::bGDIPrimary

◆ bHouseSync [1/2]

NvU32 _NV_GSYNC_STATUS_PARAMS_V1::bHouseSync

Is house sync connected?

◆ bHouseSync [2/2]

NvU32 _NV_GSYNC_STATUS_PARAMS_V2::bHouseSync

Is house sync connected?

◆ BiasResource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::BiasResource

◆ BiasResource [2/2]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::BiasResource

◆ [] [1/2]

NVDRS_BINARY_SETTING { ... } ::binaryCurrentValue

Accessing current Binary value of this setting. Must be allocated by caller with valueLength specifying buffer size, or only valueLength will be filled in.

◆ binaryCurrentValue [2/2]

NVDRS_BINARY_SETTING _NVDRS_SETTING_V1::binaryCurrentValue

Accessing current Binary value of this setting. Must be allocated by caller with valueLength specifying buffer size, or only valueLength will be filled in.

◆ [] [1/2]

NVDRS_BINARY_SETTING { ... } ::binaryDefaultValue

Accessing default Binary value of this setting. Must be allocated by caller with valueLength specifying buffer size, or only valueLength will be filled in.

◆ binaryDefaultValue [2/2]

NVDRS_BINARY_SETTING _NVDRS_SETTING_VALUES::binaryDefaultValue

Accessing default Binary value of this setting. Must be allocated by caller with valueLength specifying buffer size, or only valueLength will be filled in.

◆ binaryPredefinedValue [1/2]

NVDRS_BINARY_SETTING _NVDRS_SETTING_V1::binaryPredefinedValue

Accessing default Binary value of this setting. Must be allocated by caller with valueLength specifying buffer size, or only valueLength will be filled in.

◆ [] [2/2]

NVDRS_BINARY_SETTING { ... } ::binaryPredefinedValue

Accessing default Binary value of this setting. Must be allocated by caller with valueLength specifying buffer size, or only valueLength will be filled in.

◆ [] [1/2]

NVDRS_BINARY_SETTING { ... } ::binaryValue

All possible Binary values for a setting.

◆ binaryValue [2/2]

NVDRS_BINARY_SETTING _NVDRS_SETTING_VALUES::binaryValue

All possible Binary values for a setting.

◆ bInSaccade

BOOL _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::bInSaccade

(IN) Use flag NV_GAZE_EYE_SACCADE_DATA_VALID. Denotes whether eye is currently in saccade movement or not.

◆ [] [1/2]

NvU32 { ... } ::bInterlaced

(IN/OUT) Indicates if the timing being used on this monitor is interlaced.

◆ bInterlaced [2/2]

NvU32 NV_VIEW_TARGET_INFO::bInterlaced

(IN/OUT) Indicates if the timing being used on this monitor is interlaced.

◆ bInternalSlave

NvU32 _NV_GSYNC_STATUS_PARAMS_V2::bInternalSlave

Valid only for P2061 board. If set to 1, it means that this P2061 board receives input from another P2061 board.

◆ bIsDCHDriver [1/2]

NvU32 _NV_DISPLAY_DRIVER_INFO::bIsDCHDriver

Contains the driver DCH status after successful return. Value of 1 means that this is DCH driver. Value of 0 means that this is not a DCH driver (NVAPI may be unable to query the DCH status of the driver due to some registry API errors, in that case the API will return with NVAPI_ERROR)

◆ bIsDCHDriver [2/2]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsDCHDriver

Contains the driver DCH status after successful return. Value of 1 means that this is DCH driver. Value of 0 means that this is not a DCH driver (NVAPI may be unable to query the DCH status of the driver due to some registry API errors, in that case the API will return with NVAPI_ERROR)

◆ bIsDDCPort [1/3]

NvU8 NV_I2C_INFO_V1::bIsDDCPort

This flag indicates either the DDC port (TRUE) or the communication port (FALSE) of the concerned display.

◆ bIsDDCPort [2/3]

NvU8 NV_I2C_INFO_V2::bIsDDCPort

This flag indicates either the DDC port (TRUE) or the communication port (FALSE) of the concerned display.

◆ bIsDDCPort [3/3]

NvU8 NV_I2C_INFO_V3::bIsDDCPort

This flag indicates either the DDC port (TRUE) or the communication port (FALSE) of the concerned display.

◆ bIsDisplayInVRRMode

NvU32 _NV_GET_VRR_INFO_V1::bIsDisplayInVRRMode

[out] Set to true if the display is in VRR Mode.

◆ bIsEditable [1/6]

NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::bIsEditable

◆ bIsEditable [2/6]

NvU32 NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::bIsEditable

◆ bIsEditable [3/6]

NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::bIsEditable

◆ [] [4/6]

NvU32 { ... } ::bIsEditable

◆ bIsEditable [5/6]

NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::bIsEditable

◆ [] [6/6]

NvU32 { ... } ::bIsEditable

◆ bIsExternalGpu [1/2]

NvU32 _NV_GPU_INFO_V1::bIsExternalGpu

This flag is set for external GPU.

◆ bIsExternalGpu [2/2]

NvU32 _NV_GPU_INFO_V2::bIsExternalGpu

This flag is set for external GPU.

◆ bIsMulDivSupported

NvU32 _NV_GSYNC_CAPABILITIES_V3::bIsMulDivSupported

Indicates if multiplication/division of the frequency of house sync signal is supported.

◆ bIsNVIDIAGameReadyPackage [1/2]

NvU32 _NV_DISPLAY_DRIVER_INFO::bIsNVIDIAGameReadyPackage

On successful return, this field provides information about whether the installed driver is from an NVIDIA Game Ready Driver package. Value of 1 means that this driver is from the NVIDIA Game Ready Driver package.

◆ bIsNVIDIAGameReadyPackage [2/2]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsNVIDIAGameReadyPackage

On successful return, this field provides information about whether the installed driver is from an NVIDIA Game Ready Driver package. Value of 1 means that this driver is from the NVIDIA Game Ready Driver package.

◆ bIsNVIDIARTXNewFeatureBranchPackage [1/2]

NvU32 _NV_DISPLAY_DRIVER_INFO::bIsNVIDIARTXNewFeatureBranchPackage

On successful return, this field confirms whether the installed driver package is from an NVIDIA RTX New Feature Branch. This driver typically gives access to new features, bug fixes, new operating system support, and other driver enhancements offered between NVIDIA RTX Enterprise Production Branch releases. Support duration for NVIDIA RTX New Feature Branches is shorter than that for NVIDIA RTX Enterprise Production Branches. Value of 1 means that this driver is from the NVIDIA RTX New Feature Branch package.

◆ bIsNVIDIARTXNewFeatureBranchPackage [2/2]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsNVIDIARTXNewFeatureBranchPackage

On successful return, this field confirms whether the installed driver package is from an NVIDIA RTX New Feature Branch. This driver typically gives access to new features, bug fixes, new operating system support, and other driver enhancements offered between NVIDIA RTX Enterprise Production Branch releases. Support duration for NVIDIA RTX New Feature Branches is shorter than that for NVIDIA RTX Enterprise Production Branches. Value of 1 means that this driver is from the NVIDIA RTX New Feature Branch package.

◆ bIsNVIDIARTXProductionBranchPackage [1/2]

NvU32 _NV_DISPLAY_DRIVER_INFO::bIsNVIDIARTXProductionBranchPackage

On successful return, this field confirms whether the installed driver package is from an NVIDIA RTX Enterprise Production Branch which offers ISV certifications, long life-cycle support, regular security updates, and access to the same functionality as corresponding NVIDIA Studio Driver Packages (i.e., of the same driver version number). Value of 1 means that this driver is from the NVIDIA RTX Enterprise Production Branch package.

◆ bIsNVIDIARTXProductionBranchPackage [2/2]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsNVIDIARTXProductionBranchPackage

On successful return, this field confirms whether the installed driver package is from an NVIDIA RTX Enterprise Production Branch which offers ISV certifications, long life-cycle support, regular security updates, and access to the same functionality as corresponding NVIDIA Studio Driver Packages (i.e., of the same driver version number). Value of 1 means that this driver is from the NVIDIA RTX Enterprise Production Branch package.

◆ bIsNVIDIAStudioPackage [1/2]

NvU32 _NV_DISPLAY_DRIVER_INFO::bIsNVIDIAStudioPackage

On successful return, this field provides information about whether the installed driver is from an NVIDIA Studio Driver package. Value of 1 means that this driver is from the NVIDIA Studio Driver package.

◆ bIsNVIDIAStudioPackage [2/2]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::bIsNVIDIAStudioPackage

On successful return, this field provides information about whether the installed driver is from an NVIDIA Studio Driver package. Value of 1 means that this driver is from the NVIDIA Studio Driver package.

◆ bIsPortIdSet

NvU32 NV_I2C_INFO_V3::bIsPortIdSet

set this flag on if and only if portid value is set

◆ [] [1/6]

NvU32 { ... } ::bIsPresent

Set if this utilization domain is present on this GPU.

◆ bIsPresent [2/6]

NvU32 NV_GPU_DYNAMIC_PSTATES_INFO_EX::bIsPresent

Set if this utilization domain is present on this GPU.

◆ bIsPresent [3/6]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V1::bIsPresent

Set if this domain is present on this GPU.

◆ [] [4/6]

NvU32 { ... } ::bIsPresent

Set if this domain is present on this GPU.

◆ [] [5/6]

NvU32 { ... } ::bIsPresent

Set if this domain is present on this GPU.

◆ bIsPresent [6/6]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::bIsPresent

Set if this domain is present on this GPU.

◆ bIsStereoSynced

NvU32 _NV_GSYNC_STATUS::bIsStereoSynced

Does the phase of the timing signal from the GPU = the phase of the master sync signal?

◆ bIsSynced

NvU32 _NV_GSYNC_STATUS::bIsSynced

Is timing in sync?

◆ bIsSyncSignalAvailable

NvU32 _NV_GSYNC_STATUS::bIsSyncSignalAvailable

Is the sync signal available?

◆ bIsValidInfo

NvU8 _NV_MONITOR_CAPABILITIES_V1::bIsValidInfo

Boolean : Returns invalid if requested info is not present such as VCDB not present.

◆ bIsVRREnabled

NvU32 _NV_GET_VRR_INFO_V1::bIsVRREnabled

[out] Set if VRR Mode is currently active on given display.

◆ bIsVRRIndicatorEnabled

NvU32 _NV_GET_VRR_INFO_V1::bIsVRRIndicatorEnabled

[out] Set to true if the VRR indicator is enabled. This can be done through the NVIDIA Control Panel.

◆ bIsVRRPossible

NvU32 _NV_GET_VRR_INFO_V1::bIsVRRPossible

[out] Set to true if VRR Mode is possible on the given display.

◆ bIsVRRRequested

NvU32 _NV_GET_VRR_INFO_V1::bIsVRRRequested

[out] Set to true if VRR Mode is requested for the given display.

◆ bitsPerComponent [1/2]

NVVIOBITSPERCOMPONENT _NVVIOCHANNELSTATUS::bitsPerComponent

Bits per component.

◆ bitsPerComponent [2/2]

NvU32 _NVVIOSTREAM::bitsPerComponent

Bits per component.

◆ blackList

NvU32 NV_INFOFRAME_PROPERTY::blackList

◆ bLateLatchSupported

NvU32 _NV_QUERY_LATELATCH_SUPPORT_PARAMS::bLateLatchSupported

(OUT) LateLatch supported

◆ bldChangeListNum

NvU32 NV_DISPLAY_DRIVER_VERSION::bldChangeListNum

◆ blendingTexture [1/2]

float* NV_SCANOUT_INTENSITY_DATA_V1::blendingTexture

array of floating values building an intensity RGB texture

◆ blendingTexture [2/2]

float* NV_SCANOUT_INTENSITY_DATA_V2::blendingTexture

array of floating values building an intensity RGB texture

◆ blockDim [1/2]

NVAPI_DIM3 _NVAPI_CU_KERNEL_LAUNCH_PARAMS::blockDim

◆ blockDim [2/2]

NVAPI_DIM3 _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::blockDim

◆ blockX

NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::blockX

[in] size of CTA / thread block/group

◆ blockY

NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::blockY

[in]

◆ blockZ

NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::blockZ

[in]

◆ bLowLatencyBoost

NvBool _NV_SET_SLEEP_MODE_PARAMS::bLowLatencyBoost

(IN) Request maximum GPU clock frequency regardless of workload.

◆ bLowLatencyMode [1/2]

NvBool _NV_GET_SLEEP_STATUS_PARAMS::bLowLatencyMode

(OUT) Is low latency mode enabled?

◆ bLowLatencyMode [2/2]

NvBool _NV_SET_SLEEP_MODE_PARAMS::bLowLatencyMode

(IN) Low latency mode enable/disable.

◆ bModifiedWSupported

NvU32 _NV_QUERY_MODIFIED_W_SUPPORT_PARAMS::bModifiedWSupported

◆ bMultiViewSupported

NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::bMultiViewSupported

◆ bNameIsAvailable

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bNameIsAvailable

[out] Query call: 1 in case the information in variable/field "name" is valid (has been set before). 0 otherwise.

◆ boardId [1/3]

NvU32 _NV_GSYNC_CAPABILITIES_V1::boardId

Board ID.

◆ boardId [2/3]

NvU32 _NV_GSYNC_CAPABILITIES_V2::boardId

Board ID.

◆ boardId [3/3]

NvU32 _NV_GSYNC_CAPABILITIES_V3::boardId

Board ID.

◆ boardID

NvU32 _NVVIOCAPS::boardID

Board ID

◆ BoardNum

NvU8 _NV_BOARD_INFO::BoardNum[16]

Board Serial Number.

◆ bottom_bar

NvU32 NV_INFOFRAME_VIDEO::bottom_bar

◆ boundingBox

D3D11_VIEWPORT _NV_SMP_ASSIST_SETUP_PARAMS_V1::boundingBox

(IN) Rect on the rendertarget, to place the projection

◆ BoundingRectOriginX

float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectOriginX

◆ BoundingRectOriginY

float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectOriginY

◆ BoundingRectSizeHeight

float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectSizeHeight

◆ BoundingRectSizeInvHeight

float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectSizeInvHeight

◆ BoundingRectSizeInvWidth

float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectSizeInvWidth

◆ BoundingRectSizeWidth

float _NV_SMP_ASSIST_REMAPCBDATA_V1::BoundingRectSizeWidth

◆ boundingScissor

D3D11_RECT _NV_SMP_ASSIST_GET_CONSTANTS_V3::boundingScissor

(OUT) If eSMPType is MRS or LMS then this will be a union of the individual scissor rects populated in pScissors

◆ boundingViewport

D3D11_VIEWPORT _NV_SMP_ASSIST_GET_CONSTANTS_V3::boundingViewport

(OUT) If eSMPType is MRS or LMS then this will be a union of the individual viewports populated in pViewports

◆ bpc [1/8]

NV_DP_BPC _NV_DISPLAY_PORT_INFO_V1::bpc

Current bit-per-component.

◆ bpc [2/8]

NV_DP_BPC NV_DISPLAY_PORT_CONFIG::bpc

Bit-per-component.

◆ bpc [3/8]

NV_BPC _NV_COLOR_DATA_V3::bpc

One of NV_BPC enum values.

◆ [] [4/8]

NV_BPC { ... } ::bpc

One of NV_BPC enum values.

◆ [] [5/8]

NV_BPC { ... } ::bpc

One of NV_BPC enum values.

◆ bpc [6/8]

NV_BPC _NV_COLOR_DATA_V4::bpc

One of NV_BPC enum values.

◆ [] [7/8]

NV_BPC { ... } ::bpc

One of NV_BPC enum values.

◆ bpc [8/8]

NV_BPC _NV_COLOR_DATA_V5::bpc

One of NV_BPC enum values.

◆ bPositionIsAvailable

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bPositionIsAvailable

[out] Query call: 1 in case the information in variables/fields "positionX" and "positionY" is valid (has been set before). 0 otherwise.

◆ bpp [1/2]

NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::bpp

Bits per pixel.

◆ bpp [2/2]

NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::bpp

Bits per pixel.

◆ bPrimary [1/3]

NvU32 NV_VIEW_TARGET_INFO::bPrimary

(OUT) Indicates if this is the GPU's primary view target. This is not the desktop GDI primary. NvAPI_SetView automatically selects the first target in NV_VIEW_TARGET_INFO index 0 as the GPU's primary view.

◆ [] [2/3]

NvU32 { ... } ::bPrimary

(OUT) Indicates if this is the GPU's primary view target. This is not the desktop GDI primary. NvAPI_SetView automatically selects the first target in NV_VIEW_TARGET_INFO index 0 as the GPU's primary view.

◆ bPrimary [3/3]

NvU32 NV_DISPLAY_PATH::bPrimary

(IN/OUT) Indicates if this is the GPU's primary view target. This is not the desktop GDI primary. NvAPI_SetViewEx() automatically selects the first target in NV_DISPLAY_PATH_INFO index 0 as the GPU's primary view.

◆ bRelease

NvU32 bRelease

◆ bRemoveName

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bRemoveName

[in] Set call: 1 in case the stored name metadata should be set to 'not defined',N/A. 0 otherwise.

◆ bRemovePosition

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bRemovePosition

[in] Set call: 1 in case the stored positionX and positionY metadata should be set to 'not defined', N/A. 0 otherwise.

◆ BResource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::BResource

◆ BResource [2/2]

NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::BResource

◆ brief

NV_MOSAIC_TOPO_BRIEF NV_MOSAIC_TOPO_GROUP::brief

The brief details of this topo.

◆ brightnessPct [1/4]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS::brightnessPct

Brightness perecentage value of the zone.

◆ brightnessPct [2/4]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED_PARAMS::brightnessPct

Brightness percentage value of the zone.

◆ brightnessPct [3/4]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::brightnessPct

Brightness percentage value of the zone.

◆ brightnessPct [4/4]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR_PARAMS::brightnessPct

Brightness percentage value of the zone.

◆ bSetName

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bSetName

[in] Set call: 1 in case the information in variable/field "name" should be stored as metadata. 0 otherwise.

◆ bSetPosition

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::bSetPosition

[in] Set call: 1 in case the information in variables/fields "positionX" and "positionY" should be stored as metadata. 0 otherwise.

◆ bSinglePassStereoSupported [1/3]

NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V1::bSinglePassStereoSupported

◆ bSinglePassStereoSupported [2/3]

NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V2::bSinglePassStereoSupported

◆ bSinglePassStereoSupported [3/3]

NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::bSinglePassStereoSupported

◆ bSinglePassStereoXYZWSupported [1/2]

NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V2::bSinglePassStereoXYZWSupported

◆ bSinglePassStereoXYZWSupported [2/2]

NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::bSinglePassStereoXYZWSupported

◆ bSLIFocus

NvU32 _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::bSLIFocus

◆ bSMPAssistSupported

NvBool _NV_QUERY_SMP_ASSIST_SUPPORT_PARAMS_V1::bSMPAssistSupported

(OUT) SMP Assist supported or not

◆ bStereoEnable

BOOL _NV_DX_VIDEO_STEREO_INFO::bStereoEnable

Whether stereo rendering should be enabled (if FALSE, only left view will be used)

◆ bSupported

NvU32 _NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM_V1::bSupported

A boolean indicating if the attribute is supported.

◆ bSync

NvBool NV_GPU_CLIENT_ILLUM_DEVICE_SYNC_V1::bSync

Boolean representing the need for synchronization.

◆ bTestMode

NvU32 _NVVIOINPUTCONFIG::bTestMode

This attribute controls the GVI test mode. Possible values 0/1. When testmode enabled, the GVI device will generate fake data as quickly as possible.

◆ BTimems

NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::BTimems

Time in ms to remain at color B before color B to color A transition.

◆ bus

NvU16 NVLINK_DEVICE_INFO_V1::bus

◆ bUseGameSleep

NvBool _NV_GET_SLEEP_STATUS_PARAMS::bUseGameSleep

(OUT) Is NvAPI_D3D_Sleep() being called?

◆ bUseMarkersToOptimize

NvBool _NV_SET_SLEEP_MODE_PARAMS::bUseMarkersToOptimize

(IN) Allow latency markers to be used for runtime optimizations.

◆ bVariablePixelRateShadingSupported [1/3]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V1::bVariablePixelRateShadingSupported

(OUT) Outputs whether Variable Pixel Shading Rates are supported or not

◆ bVariablePixelRateShadingSupported [2/3]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::bVariablePixelRateShadingSupported

(OUT) Outputs whether Variable Pixel Shading Rates are supported or not

◆ bVariablePixelRateShadingSupported [3/3]

NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::bVariablePixelRateShadingSupported

(OUT) Outputs whether Variable Pixel Shading Rates are supported or not

◆ byteOffset [1/2]

NvU32 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DESC::byteOffset

Byte offset from the inputBuffer, specified in the input structure NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS, to where the input DMM data is located.

◆ byteOffset [2/2]

NvU32 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_DESC::byteOffset

Byte offset from the inputBuffer, specified in the input structure NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS, to where the input OMM data is located.

◆ callback

NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_V1 _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1::callback

[in] Callback. Pass in NULL or nullptr to indicate request to unregister.

◆ callbackParam

void* NV_EVENT_REGISTER_CALLBACK::callbackParam

This value will be passed back to the callback function when an event occurs.

◆ callbackPeriodms

NvU32 _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1::callbackPeriodms

[in] Minimum interval at which callback will be called.

The callback may be invoked slower than this interval if underlying sampling rate does not align precisely to the provided period.

◆ capFlags [1/3]

NvU32 _NV_GSYNC_CAPABILITIES_V1::capFlags

Capabilities of the Sync board. Reserved for future use.

◆ capFlags [2/3]

NvU32 _NV_GSYNC_CAPABILITIES_V2::capFlags

Capabilities of the Sync board. Reserved for future use.

◆ capFlags [3/3]

NvU32 _NV_GSYNC_CAPABILITIES_V3::capFlags

Capabilities of the Sync board. Reserved for future use.

◆ caps [1/2]

NV_MONITOR_CAPS_GENERIC _NV_MONITOR_CAPABILITIES_V1::caps

◆ [] [2/2]

NV_MONITOR_CAPS_GENERIC { ... } ::caps

◆ capsTbl [1/3]

NvU32 NVLINK_GET_CAPS_V1::capsTbl

This is bit field for getting different global caps.The individual bitfields are specified by NVAPI_NVLINK_CAPS_*.

◆ capsTbl [2/3]

NvU32 NVLINK_LINK_STATUS_INFO_V1::capsTbl

This is bit field for getting different global caps.The individual bitfields are specified by NVAPI_NVLINK_CAPS_*.

◆ capsTbl [3/3]

NvU32 NVLINK_LINK_STATUS_INFO_V2::capsTbl

This is bit field for getting different global caps.The individual bitfields are specified by NVAPI_NVLINK_CAPS_*.

◆ captureStatus

NVVIOCAPTURESTATUS _NVVIOINPUTSTATUS::captureStatus

status of video capture

◆ cbSize [1/3]

NvU32 NV_I2C_INFO_V1::cbSize

The size of the data buffer, pbData, to be read or written.

◆ cbSize [2/3]

NvU32 NV_I2C_INFO_V2::cbSize

The size of the data buffer, pbData, to be read or written.

◆ cbSize [3/3]

NvU32 NV_I2C_INFO_V3::cbSize

The size of the data buffer, pbData, to be read or written.

◆ [] [1/4]

NvU16 { ... } ::cc_blue_x

Blue primary chromaticity coordinate x.

◆ cc_blue_x [2/4]

NvU16 _NV_HDR_CAPABILITIES_V2::cc_blue_x

Blue primary chromaticity coordinate x.

◆ cc_blue_x [3/4]

NvU16 _NV_HDR_CAPABILITIES_V3::cc_blue_x

Blue primary chromaticity coordinate x.

◆ [] [4/4]

NvU16 { ... } ::cc_blue_x

Blue primary chromaticity coordinate x.

◆ cc_blue_y [1/4]

NvU16 _NV_HDR_CAPABILITIES_V2::cc_blue_y

Blue primary chromaticity coordinate y.

◆ [] [2/4]

NvU16 { ... } ::cc_blue_y

Blue primary chromaticity coordinate y.

◆ [] [3/4]

NvU16 { ... } ::cc_blue_y

Blue primary chromaticity coordinate y.

◆ cc_blue_y [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::cc_blue_y

Blue primary chromaticity coordinate y.

◆ cc_green_x [1/4]

NvU16 _NV_HDR_CAPABILITIES_V2::cc_green_x

Green primary chromaticity coordinate x.

◆ [] [2/4]

NvU16 { ... } ::cc_green_x

Green primary chromaticity coordinate x.

◆ [] [3/4]

NvU16 { ... } ::cc_green_x

Green primary chromaticity coordinate x.

◆ cc_green_x [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::cc_green_x

Green primary chromaticity coordinate x.

◆ [] [1/4]

NvU16 { ... } ::cc_green_y

Green primary chromaticity coordinate Y.

◆ cc_green_y [2/4]

NvU16 _NV_HDR_CAPABILITIES_V2::cc_green_y

Green primary chromaticity coordinate Y.

◆ [] [3/4]

NvU16 { ... } ::cc_green_y

Green primary chromaticity coordinate Y.

◆ cc_green_y [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::cc_green_y

Green primary chromaticity coordinate Y.

◆ [] [1/4]

NvU16 { ... } ::cc_red_x

Red primary chromaticity coordinate x.

◆ cc_red_x [2/4]

NvU16 _NV_HDR_CAPABILITIES_V2::cc_red_x

Red primary chromaticity coordinate x.

◆ [] [3/4]

NvU16 { ... } ::cc_red_x

Red primary chromaticity coordinate x.

◆ cc_red_x [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::cc_red_x

Red primary chromaticity coordinate x.

◆ cc_red_y [1/4]

NvU16 _NV_HDR_CAPABILITIES_V2::cc_red_y

Red primary chromaticity coordinate y.

◆ [] [2/4]

NvU16 { ... } ::cc_red_y

Red primary chromaticity coordinate y.

◆ [] [3/4]

NvU16 { ... } ::cc_red_y

Red primary chromaticity coordinate y.

◆ cc_red_y [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::cc_red_y

Red primary chromaticity coordinate y.

◆ [] [1/4]

NvU16 { ... } ::cc_white_x

White primary chromaticity coordinate x.

◆ cc_white_x [2/4]

NvU16 _NV_HDR_CAPABILITIES_V2::cc_white_x

White primary chromaticity coordinate x.

◆ [] [3/4]

NvU16 { ... } ::cc_white_x

White primary chromaticity coordinate x.

◆ cc_white_x [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::cc_white_x

White primary chromaticity coordinate x.

◆ cc_white_y [1/4]

NvU16 _NV_HDR_CAPABILITIES_V2::cc_white_y

White primary chromaticity coordinate y.

◆ [] [2/4]

NvU16 { ... } ::cc_white_y

White primary chromaticity coordinate y.

◆ [] [3/4]

NvU16 { ... } ::cc_white_y

White primary chromaticity coordinate y.

◆ cc_white_y [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::cc_white_y

White primary chromaticity coordinate y.

◆ [] [1/2]

NvU32 { ... } ::ceaId

The EIA/CEA 861B/D predefined short timing descriptor ID. Used when the timing type is NV_TIMING_OVERRIDE_EIA861 and width==height==rr==0.

◆ ceaId [2/2]

NvU32 NV_TIMING_FLAG::ceaId

The EIA/CEA 861B/D predefined short timing descriptor ID. Used when the timing type is NV_TIMING_OVERRIDE_EIA861 and width==height==rr==0.

◆ centerHeight [1/2]

float _NV_MRS_CUSTOM_CONFIG_V1::centerHeight

◆ centerHeight [2/2]

float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::centerHeight

◆ centerWidth [1/2]

float _NV_MRS_CUSTOM_CONFIG_V1::centerWidth

(IN) Size of the central viewport, ranging (0,1], where 1 is full original viewport size

◆ centerWidth [2/2]

float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::centerWidth[2]

< (OUT) MRS Instanced stereo config returned by the SMP Assist GetConstants API

(OUT) Size of the central viewport, ranging (0,1], where 1 is full original viewport size

◆ centerX [1/2]

float _NV_MRS_CUSTOM_CONFIG_V1::centerX

(IN) Location of the central viewport, ranging 0..1, where 0.5 is the center of the screen

◆ centerX [2/2]

float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::centerX[2]

(OUT) Location of the central viewport, ranging 0..1, where 0.5 is the center of the screen

◆ centerY [1/2]

float _NV_MRS_CUSTOM_CONFIG_V1::centerY

◆ centerY [2/2]

float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::centerY

◆ [] [1/2]

NvU32 { ... } ::channel

specified (0-based) jack

◆ channel [2/2]

NvU32 _NVVIOSTREAM::channel

specified (0-based) jack

◆ channelCount

NvU32 NV_INFOFRAME_AUDIO::channelCount

◆ checkStatus

D3D12_DRIVER_MATCHING_IDENTIFIER_STATUS _NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_V1::checkStatus

[out] Result of the check; see D3D12_DRIVER_MATCHING_IDENTIFIER_STATUS.

◆ ClipToWindowSplitsX

float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowSplitsX[2]

< (OUT) Constant buffer data to supply the UV-remapping helper functions

◆ ClipToWindowSplitsY

float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowSplitsY[2]

◆ ClipToWindowX

float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowX[3][2]

◆ ClipToWindowY

float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowY[3][2]

◆ ClipToWindowZ

float _NV_SMP_ASSIST_REMAPCBDATA_V1::ClipToWindowZ[2]

◆ [struct] [1/8]

struct { ... } NV_GPU_PERF_PSTATES_INFO_V1::clocks[NVAPI_MAX_GPU_PERF_CLOCKS]

◆ [struct] [2/8]

struct { ... } NV_GPU_PERF_PSTATES_INFO_V1::clocks[NVAPI_MAX_GPU_PERF_CLOCKS]

◆ [struct] [3/8]

struct { ... } NV_GPU_PERF_PSTATES_INFO_V2::clocks[NVAPI_MAX_GPU_PERF_CLOCKS]

◆ [struct] [4/8]

struct { ... } NV_GPU_PERF_PSTATES_INFO_V2::clocks[NVAPI_MAX_GPU_PERF_CLOCKS]

◆ [] [5/8]

NV_GPU_PSTATE20_CLOCK_ENTRY_V1 { ... } ::clocks[NVAPI_MAX_GPU_PSTATE20_CLOCKS]

Array of clock entries Valid index range is 0 to numClocks-1

◆ clocks [6/8]

NV_GPU_PSTATE20_CLOCK_ENTRY_V1 NV_GPU_PERF_PSTATES20_INFO_V1::clocks[NVAPI_MAX_GPU_PSTATE20_CLOCKS]

Array of clock entries Valid index range is 0 to numClocks-1

◆ clocks [7/8]

NV_GPU_PSTATE20_CLOCK_ENTRY_V1 _NV_GPU_PERF_PSTATES20_INFO_V2::clocks[NVAPI_MAX_GPU_PSTATE20_CLOCKS]

Array of clock entries Valid index range is 0 to numClocks-1

◆ [] [8/8]

NV_GPU_PSTATE20_CLOCK_ENTRY_V1 { ... } ::clocks[NVAPI_MAX_GPU_PSTATE20_CLOCKS]

Array of clock entries Valid index range is 0 to numClocks-1

◆ ClockType

NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::ClockType

One of NV_GPU_CLOCK_FREQUENCIES_CLOCK_TYPE. Used to specify the type of clock to be returned.

◆ cloneGroup [1/2]

NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::cloneGroup

Reserved, must be 0.

◆ cloneGroup [2/2]

NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::cloneGroup

Reserved, must be 0.

◆ cloneImportance

NvU32 _NV_SCANOUT_INFORMATION::cloneImportance

If targets are cloned views of the sourceDesktopRect the cloned targets have an importance assigned (0:primary,1 secondary,...).

◆ cmd [1/8]

NvU8 NV_INFOFRAME_DATA::cmd

The actions to perform from NV_INFOFRAME_CMD.

◆ cmd [2/8]

NvU8 _NV_COLOR_DATA_V1::cmd

◆ cmd [3/8]

NvU8 _NV_COLOR_DATA_V2::cmd

◆ cmd [4/8]

NvU8 _NV_COLOR_DATA_V3::cmd

◆ cmd [5/8]

NvU8 _NV_COLOR_DATA_V4::cmd

◆ cmd [6/8]

NvU8 _NV_COLOR_DATA_V5::cmd

◆ cmd [7/8]

NV_HDR_CMD _NV_HDR_COLOR_DATA_V1::cmd

Command get/set.

◆ cmd [8/8]

NV_HDR_CMD _NV_HDR_COLOR_DATA_V2::cmd

Command get/set.

◆ cnc0SupportGraphicsTextContent

NvU8 _NV_MONITOR_CAPS_VSDB::cnc0SupportGraphicsTextContent

Byte 5.

◆ cnc1SupportPhotoContent

NvU8 _NV_MONITOR_CAPS_VSDB::cnc1SupportPhotoContent

Byte 5.

◆ cnc2SupportCinemaContent

NvU8 _NV_MONITOR_CAPS_VSDB::cnc2SupportCinemaContent

Byte 5.

◆ cnc3SupportGameContent

NvU8 _NV_MONITOR_CAPS_VSDB::cnc3SupportGameContent

Byte 5.

◆ codingExtensionType

NvU32 NV_INFOFRAME_AUDIO::codingExtensionType

◆ codingType

NvU32 NV_INFOFRAME_AUDIO::codingType

◆ colCount [1/2]

NvU32 NV_MOSAIC_TOPO_DETAILS::colCount

Number of displays in a column.

◆ colCount [2/2]

NvU32 NV_MOSAIC_TOPOLOGY::colCount

Vertical display count.

◆ colorB [1/2]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS::colorB

Blue compenent of color applied to the zone.

◆ colorB [2/2]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::colorB

Blue component of color applied to the zone.

◆ colorConversion [1/3]

NVVIOCOLORCONVERSION _NVVIOOUTPUTCONFIG_V1::colorConversion

Color conversion.

◆ colorConversion [2/3]

NVVIOCOLORCONVERSION _NVVIOOUTPUTCONFIG_V2::colorConversion

Color conversion.

◆ colorConversion [3/3]

NVVIOCOLORCONVERSION _NVVIOOUTPUTCONFIG_V3::colorConversion

Color conversion.

◆ colorDepth

NvU32 _NV_RESOLUTION::colorDepth

◆ [] [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED { ... } ::colorFixed

◆ colorFixed [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::colorFixed

◆ colorFixedParams [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED::colorFixedParams

Parameters required to represent control mode of type NV_GPU_CLIENT_ILLUM_CTRL_MODE_MANUAL_RGB.

◆ colorFixedParams [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_COLOR_FIXED::colorFixedParams[NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_COLOR_ENDPOINTS]

Parameters required to represent control mode of type NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_RGB.

◆ colorFormat [1/16]

NV_FORMAT NV_DISPLAY_PATH::colorFormat

Color format if it needs to be specified. Not used now.

◆ colorFormat [2/16]

NV_FORMAT _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::colorFormat

Ignored at present, must be NV_FORMAT_UNKNOWN (0)

◆ colorFormat [3/16]

NV_DP_COLOR_FORMAT _NV_DISPLAY_PORT_INFO_V1::colorFormat

Current color format.

◆ colorFormat [4/16]

NV_DP_COLOR_FORMAT NV_DISPLAY_PORT_CONFIG::colorFormat

Color format to set.

◆ [] [5/16]

NvU8 { ... } ::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ colorFormat [6/16]

NvU8 _NV_COLOR_DATA_V1::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ [] [7/16]

NvU8 { ... } ::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ colorFormat [8/16]

NvU8 _NV_COLOR_DATA_V2::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ colorFormat [9/16]

NvU8 _NV_COLOR_DATA_V3::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ [] [10/16]

NvU8 { ... } ::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ colorFormat [11/16]

NvU8 _NV_COLOR_DATA_V4::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ [] [12/16]

NvU8 { ... } ::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ colorFormat [13/16]

NvU8 _NV_COLOR_DATA_V5::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ [] [14/16]

NvU8 { ... } ::colorFormat

One of NV_COLOR_FORMAT enum values.

◆ colorFormat [15/16]

NV_DP_COLOR_FORMAT _NV_MONITOR_COLOR_DATA::colorFormat

One of the supported color formats.

◆ colorFormat [16/16]

NV_FORMAT NV_CUSTOM_DISPLAY::colorFormat

Color format (optional)

◆ colorG [1/2]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS::colorG

Green compenent of color applied to the zone.

◆ colorG [2/2]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::colorG

Green component of color applied to the zone.

◆ colorimetry [1/17]

NV_DP_COLORIMETRY _NV_DISPLAY_PORT_INFO_V1::colorimetry

Ignored in RGB space.

◆ colorimetry [2/17]

NV_DP_COLORIMETRY NV_DISPLAY_PORT_CONFIG::colorimetry

Ignored in RGB space.

◆ colorimetry [3/17]

NvU32 NV_INFOFRAME_VIDEO::colorimetry

◆ colorimetry [4/17]

NvU8 _NV_COLOR_DATA_V1::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ [] [5/17]

NvU8 { ... } ::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ colorimetry [6/17]

NvU8 _NV_COLOR_DATA_V2::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ [] [7/17]

NvU8 { ... } ::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ [] [8/17]

NvU8 { ... } ::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ colorimetry [9/17]

NvU8 _NV_COLOR_DATA_V3::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ colorimetry [10/17]

NvU8 _NV_COLOR_DATA_V4::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ [] [11/17]

NvU8 { ... } ::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ [] [12/17]

NvU8 { ... } ::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ colorimetry [13/17]

NvU8 _NV_COLOR_DATA_V5::colorimetry

One of NV_COLOR_COLORIMETRY enum values.

◆ [] [14/17]

NvU32 { ... } ::colorimetry

If set indicates sink supports DCI P3 colorimetry, REc709 otherwise.

◆ colorimetry [15/17]

NvU32 _NV_HDR_CAPABILITIES_V2::colorimetry

If set indicates sink supports DCI P3 colorimetry, REc709 otherwise.

◆ colorimetry [16/17]

NvU32 _NV_HDR_CAPABILITIES_V3::colorimetry

If set indicates sink supports DCI P3 colorimetry, REc709 otherwise.

◆ [] [17/17]

NvU32 { ... } ::colorimetry

If set indicates sink supports DCI P3 colorimetry, REc709 otherwise.

◆ colorMatrix

float _NVVIOCOLORCONVERSION::colorMatrix[3][3]

Output[n] =.

◆ colorOffset

float _NVVIOCOLORCONVERSION::colorOffset[3]

Input[0] * colorMatrix[n][0] +.

◆ colorR [1/2]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS::colorR

Red compenent of color applied to the zone.

◆ colorR [2/2]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::colorR

Red component of color applied to the zone.

◆ colorScale

float _NVVIOCOLORCONVERSION::colorScale[3]

Input[1] * colorMatrix[n][1] + Input[2] * colorMatrix[n][2] + OutputRange * colorOffset[n] where OutputRange is the standard magnitude of Output[n][n] and colorMatrix and colorOffset values are within the range -1.0 to +1.0

◆ [] [1/4]

NV_COLOR_SELECTION_POLICY { ... } ::colorSelectionPolicy

One of the color selection policy.

◆ colorSelectionPolicy [2/4]

NV_COLOR_SELECTION_POLICY _NV_COLOR_DATA_V4::colorSelectionPolicy

One of the color selection policy.

◆ [] [3/4]

NV_COLOR_SELECTION_POLICY { ... } ::colorSelectionPolicy

One of the color selection policy.

◆ colorSelectionPolicy [4/4]

NV_COLOR_SELECTION_POLICY _NV_COLOR_DATA_V5::colorSelectionPolicy

One of the color selection policy.

◆ colorSpace [1/2]

NvU32 NV_INFOFRAME_VIDEO::colorSpace

◆ colorSpace [2/2]

NVVIOCOLORSPACE _NVVIOCHANNELSTATUS::colorSpace

Color space.

◆ colorW

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS::colorW

White component of color applied to the zone.

◆ columns [1/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::columns

Number of columns.

◆ columns [2/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::columns

Number of columns.

◆ commandLine

NvAPI_UnicodeString _NVDRS_APPLICATION_V4::commandLine

If isCommandLine is set to 0 this must be an empty. If isCommandLine is set to 1 this contains application's command line as if it was returned by GetCommandLineW.

◆ companionBufferCount

__in NvU32 _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::companionBufferCount

The number of ID3D12Resource pointers requested to be returned in the ppComanionResources array, which should match ID3D12Device::GetNodeCount for the complete set of companion allocations.

◆ compositeSafe

NvU32 _NVVIOCOLORCONVERSION::compositeSafe

compositeSafe constrains luminance range when using composite output

◆ compositeSyncType [1/3]

NVVIOCOMPSYNCTYPE _NVVIOOUTPUTCONFIG_V1::compositeSyncType

Composite sync type.

◆ compositeSyncType [2/3]

NVVIOCOMPSYNCTYPE _NVVIOOUTPUTCONFIG_V2::compositeSyncType

Composite sync type.

◆ compositeSyncType [3/3]

NVVIOCOMPSYNCTYPE _NVVIOOUTPUTCONFIG_V3::compositeSyncType

Composite sync type.

◆ compositeTerminate [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::compositeTerminate

Composite termination.

◆ compositeTerminate [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::compositeTerminate

Composite termination.

◆ compositeTerminate [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::compositeTerminate

Composite termination.

◆ compRange [1/3]

NVVIOCOMPOSITERANGE _NVVIOOUTPUTCONFIG_V1::compRange

Composite ranges.

◆ compRange [2/3]

NVVIOCOMPOSITERANGE _NVVIOOUTPUTCONFIG_V2::compRange

Composite ranges.

◆ compRange [3/3]

NVVIOCOMPOSITERANGE _NVVIOOUTPUTCONFIG_V3::compRange

Composite ranges.

◆ compSyncIn

NVVIOSYNCSTATUS _NVVIOOUTPUTSTATUS::compSyncIn

Composite sync input status.

◆ [struct] [1/2]

struct { ... } NV_COMPUTE_GPU_TOPOLOGY_V1::computeGpus[NVAPI_MAX_GPU_PER_TOPOLOGY]

Array of compute-capable physical GPUs.

◆ computeGpus [2/2]

NV_COMPUTE_GPU* _NV_COMPUTE_GPU_TOPOLOGY_V2::computeGpus

Array of compute-capable physical GPUs (allocate memory of size of Physical gpuCount of system).

◆ configurationOptions

NV_ECC_CONFIGURATION NV_GPU_ECC_STATUS_INFO::configurationOptions

Supported ECC memory feature configuration options.

◆ connected [1/2]

NvU32 NVLINK_LINK_STATUS_INFO_V1::connected

This field specifies if any device is connected on the other end of the link.

◆ connected [2/2]

NvU32 NVLINK_LINK_STATUS_INFO_V2::connected

This field specifies if any device is connected on the other end of the link.

◆ connector [1/3]

NV_GPU_CONNECTOR_TYPE NV_DISPLAY_PATH::connector

(IN) Specify connector type. For TV only.

◆ connector [2/3]

NV_GPU_CONNECTOR_TYPE _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::connector

Specify connector type. For TV only, ignored if tvFormat == NV_DISPLAY_TV_FORMAT_NONE.

◆ connector [3/3]

NVAPI_GSYNC_GPU_TOPOLOGY_CONNECTOR _NV_GSYNC_GPU::connector

Indicates which connector on the device the GPU is connected to.

◆ connectorType [1/2]

NV_MONITOR_CONN_TYPE _NV_GPU_DISPLAYIDS::connectorType

out: vga, tv, dvi, hdmi and dp. This is reserved for future use and clients should not rely on this information. Instead get the GPU connector type from NvAPI_GPU_GetConnectorInfo/NvAPI_GPU_GetConnectorInfoEx

◆ connectorType [2/2]

NvU32 _NV_MONITOR_CAPABILITIES_V1::connectorType

Out: VGA, TV, DVI, HDMI, DP.

◆ ConservativeRaster

BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::ConservativeRaster

◆ ConservativeRasterEnable

bool NvAPI_D3D11_RASTERIZER_DESC_EX::ConservativeRasterEnable

◆ ConstantPadVal

float NV_META_COMMAND_PADDING_DESC::ConstantPadVal

◆ ContentType

NV_VRS_CONTENT_TYPE _NV_VRS_HELPER_ENABLE_PARAMS_V1::ContentType

(IN) This defines the type of content with which the VRS pattern will be generated

◆ contentTypes

NvU32 NV_INFOFRAME_VIDEO::contentTypes

◆ [] [1/4]

NV_THERMAL_CONTROLLER { ... } ::controller

internal, ADM1032, MAX6649...

◆ controller [2/4]

NV_THERMAL_CONTROLLER NV_GPU_THERMAL_SETTINGS_V1::controller

internal, ADM1032, MAX6649...

◆ [] [3/4]

NV_THERMAL_CONTROLLER { ... } ::controller

internal, ADM1032, MAX6649...

◆ controller [4/4]

NV_THERMAL_CONTROLLER NV_GPU_THERMAL_SETTINGS_V2::controller

internal, ADM1032, MAX6649...

◆ ConvertToFastGS [1/2]

BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::ConvertToFastGS

◆ ConvertToFastGS [2/2]

BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::ConvertToFastGS

◆ count [1/8]

NvU32 NV_VIEW_TARGET_INFO::count

(IN) target count

◆ count [2/8]

NvU32 NV_DISPLAY_PATH_INFO_V3::count

(IN) Path count

◆ count [3/8]

NvU32 NV_DISPLAY_PATH_INFO::count

(IN) Path count

◆ count [4/8]

NvU32 NV_GPU_THERMAL_SETTINGS_V1::count

number of associated thermal sensors

◆ count [5/8]

NvU32 NV_GPU_THERMAL_SETTINGS_V2::count

number of associated thermal sensors

◆ count [6/8]

NvU32 NV_MOSAIC_TOPO_GROUP::count

Number of topos in array below.

◆ count [7/8]

NvU32 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT::count

For DMM Array builds: total number of DMMs in the DMM Array with the particular subdivisionLevel and format specified in this descriptor. For BLAS builds: total number of DMMs with the subdivisionLevel and format combination that is referenced from the BLAS.

◆ count [8/8]

NvU32 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT::count

Total number of OMMs in the OMM Array with the particular subdivisionLevel and format specified in this descriptor.

◆ CoverageToColor

BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::CoverageToColor

◆ CoverageToColorEnable [1/2]

bool NvAPI_D3D11_RASTERIZER_DESC_EX::CoverageToColorEnable

◆ CoverageToColorEnable [2/2]

bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::CoverageToColorEnable

◆ CoverageToColorRTIndex [1/2]

NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::CoverageToColorRTIndex

◆ CoverageToColorRTIndex [2/2]

NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::CoverageToColorRTIndex

◆ CResource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::CResource

◆ CResource [2/2]

NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::CResource

◆ cscOverride [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::cscOverride

Use provided CSC color matrix to overwrite.

◆ cscOverride [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::cscOverride

Use provided CSC color matrix to overwrite.

◆ cscOverride [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::cscOverride

Use provided CSC color matrix to overwrite.

◆ ctrlMode

NV_GPU_CLIENT_ILLUM_CTRL_MODE _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::ctrlMode

◆ ctrlModeMask

NvU32 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::ctrlModeMask

Supported control modes for this illumination device.

◆ CullMode

D3D11_CULL_MODE NvAPI_D3D11_RASTERIZER_DESC_EX::CullMode

◆ curLaneCount

NV_DP_LANE_COUNT _NV_DISPLAY_PORT_INFO_V1::curLaneCount

Current lane count.

◆ curLinkRate

NV_DP_LINK_RATE _NV_DISPLAY_PORT_INFO_V1::curLinkRate

Current link rate.

◆ [struct]

struct { ... } NV_GPU_ECC_ERROR_INFO::current

◆ currentDockPolicy

NvU32 NV_LID_DOCK_PARAMS::currentDockPolicy

◆ currentDockState

NvU32 NV_LID_DOCK_PARAMS::currentDockState

◆ currentLidPolicy

NvU32 NV_LID_DOCK_PARAMS::currentLidPolicy

◆ currentLidState

NvU32 NV_LID_DOCK_PARAMS::currentLidState

Structure version, constructed from the macro NV_LID_DOCK_PARAMS_VER.

◆ currentlyCapableOfVRR

NvU8 _NV_MONITOR_CAPS_GENERIC::currentlyCapableOfVRR

monitor currently supports VRR on applied display settings. Valid for NV_MONITOR_CAPS_TYPE_GENERIC only.

◆ currentSizeInBytes [1/2]

NvU64 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_CURRENT_SIZE_DESC::currentSizeInBytes

Size of the OMM Array buffer. The queried size may be smaller than the size reported by NvAPI_D3D12_GetRaytracingOpacityMicromapArrayPrebuildInfo(). This allows the application to move and relocate the OMM Array to a smaller buffer to reclaim any unused memory after the OMM Array build is complete.

◆ currentSizeInBytes [2/2]

NvU64 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_CURRENT_SIZE_DESC::currentSizeInBytes

Size of the DMM Array buffer. The queried size may be smaller than the size reported by NvAPI_D3D12_GetRaytracingDisplacementMicromapArrayPrebuildInfo(). This allows the application to move and relocate the DMM Array to a smaller buffer to reclaim any unused memory after the DMM Array build is complete.

◆ [] [1/4]

NvU32 { ... } ::currentTemp

The current temperature value of the thermal sensor in degree Celsius.

◆ currentTemp [2/4]

NvU32 NV_GPU_THERMAL_SETTINGS_V1::currentTemp

The current temperature value of the thermal sensor in degree Celsius.

◆ [] [3/4]

NvS32 { ... } ::currentTemp

Current temperature value of the thermal sensor in degree Celsius.

◆ currentTemp [4/4]

NvS32 NV_GPU_THERMAL_SETTINGS_V2::currentTemp

Current temperature value of the thermal sensor in degree Celsius.

◆ cycleType

NV_GPU_CLIENT_ILLUM_PIECEWISE_LINEAR_CYCLE_TYPE _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::cycleType

Type of cycle effect to apply.

◆ [union] [1/14]

union { ... } NV_GPU_PSTATE20_CLOCK_ENTRY_V1::data

Clock domain type dependant information.

◆ [union] [2/14]

union { ... } _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::data

Union of illumination device info data. Interpreted as per NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::type

◆ [union] [3/14]

union { ... } _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::data

◆ [union] [4/14]

union { ... } _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::data

Union of illumination zone control data for zone of type NV_GPU_CLIENT_ILLUM_ZONE_TYPE_RGB. Interpreted as per ctrlMode.

◆ [union] [5/14]

union { ... } _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::data

Union of illum zone control data for zone of type NV_GPU_CLIENT_ILLUM_ZONE_TYPE_COLOR_FIXED. Interpreted as per ctrlMode.

◆ [union] [6/14]

union { ... } _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::data

Union of illum zone control data for zone of type NV_GPU_ILLUM_ZONE_TYPE_RGBW. Interpreted as per ctrlMode.

◆ [union] [7/14]

union { ... } _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::data

Union of illum zone control data for zone of type NV_GPU_ILLUM_ZONE_TYPE_SINGLE_COLOR. Interpreted as per ctrlMode.

◆ [union] [8/14]

union { ... } _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::data

◆ [struct] [9/14]

struct { ... } _NV_COLOR_DATA_V1::data

◆ [struct] [10/14]

struct { ... } _NV_COLOR_DATA_V2::data

◆ [struct] [11/14]

struct { ... } _NV_COLOR_DATA_V3::data

◆ [struct] [12/14]

struct { ... } _NV_COLOR_DATA_V4::data

◆ [struct] [13/14]

struct { ... } _NV_COLOR_DATA_V5::data

◆ [union] [14/14]

union { ... } _NV_MONITOR_CAPABILITIES_V1::data

◆ dataFormat [1/4]

NVVIODATAFORMAT _NVVIODATAFORMATDETAIL::dataFormat

Data format enumerated value.

◆ dataFormat [2/4]

NVVIODATAFORMAT _NVVIOOUTPUTCONFIG_V1::dataFormat

Data format for video output.

◆ dataFormat [3/4]

NVVIODATAFORMAT _NVVIOOUTPUTCONFIG_V2::dataFormat

Data format for video output.

◆ dataFormat [4/4]

NVVIODATAFORMAT _NVVIOOUTPUTCONFIG_V3::dataFormat

Data format for video output.

◆ dataIntegrityCheckEnabled

NvU32 _NVVIOOUTPUTSTATUS::dataIntegrityCheckEnabled

Data integrity check status enabled.

◆ dataIntegrityCheckErrorCount

NvU32 _NVVIOOUTPUTSTATUS::dataIntegrityCheckErrorCount

Data integrity check error count.

◆ dataIntegrityCheckFailed

NvU32 _NVVIOOUTPUTSTATUS::dataIntegrityCheckFailed

Data integrity check status failed.

◆ DataType

NvU64 NV_META_COMMAND_TENSOR_DESC::DataType

◆ day

NvU16 _NV_LICENSE_EXPIRY_DETAILS::day

Day value of license expiry.

◆ [] [1/4]

NvU32 { ... } ::defaultMaxTemp

The max default temperature value of the thermal sensor in degree Celsius.

◆ defaultMaxTemp [2/4]

NvU32 NV_GPU_THERMAL_SETTINGS_V1::defaultMaxTemp

The max default temperature value of the thermal sensor in degree Celsius.

◆ [] [3/4]

NvS32 { ... } ::defaultMaxTemp

Maximum default temperature value of the thermal sensor in degree Celsius.

◆ defaultMaxTemp [4/4]

NvS32 NV_GPU_THERMAL_SETTINGS_V2::defaultMaxTemp

Maximum default temperature value of the thermal sensor in degree Celsius.

◆ [] [1/4]

NvU32 { ... } ::defaultMinTemp

The min default temperature value of the thermal sensor in degree Celsius.

◆ defaultMinTemp [2/4]

NvU32 NV_GPU_THERMAL_SETTINGS_V1::defaultMinTemp

The min default temperature value of the thermal sensor in degree Celsius.

◆ [] [3/4]

NvS32 { ... } ::defaultMinTemp

Minimum default temperature value of the thermal sensor in degree Celsius.

◆ defaultMinTemp [4/4]

NvS32 NV_GPU_THERMAL_SETTINGS_V2::defaultMinTemp

Minimum default temperature value of the thermal sensor in degree Celsius.

◆ densityScaleX [1/2]

float _NV_MRS_CUSTOM_CONFIG_V1::densityScaleX[3]

(IN) Pixel density scale factors: how much the linear pixel density is scaled within each row and column (1.0 = full density)

◆ densityScaleX [2/2]

float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::densityScaleX[5]

(OUT) Pixel density scale factors: how much the linear pixel density is scaled within each row and column (1.0 = full density)

◆ densityScaleY [1/2]

float _NV_MRS_CUSTOM_CONFIG_V1::densityScaleY[3]

◆ densityScaleY [2/2]

float _NV_MRS_INSTANCED_STEREO_CONFIG_V1::densityScaleY[3]

◆ depth [1/4]

NvU32 NV_DISPLAY_PATH::depth

(IN) Depth of the mode

◆ [] [2/4]

NV_DESKTOP_COLOR_DEPTH { ... } ::depth

One of NV_DESKTOP_COLOR_DEPTH enum values.

◆ depth [3/4]

NV_DESKTOP_COLOR_DEPTH _NV_COLOR_DATA_V5::depth

One of NV_DESKTOP_COLOR_DEPTH enum values.

◆ depth [4/4]

NvU32 NV_CUSTOM_DISPLAY::depth

Source surface color depth."0" means all 8/16/32bpp.

◆ DepthBias

INT NvAPI_D3D11_RASTERIZER_DESC_EX::DepthBias

◆ DepthBiasClamp

FLOAT NvAPI_D3D11_RASTERIZER_DESC_EX::DepthBiasClamp

◆ DepthClipEnable

BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::DepthClipEnable

◆ desc

D3D12_CPU_DESCRIPTOR_HANDLE NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::desc

[in] CPU descriptor handle of the UAV

◆ DescA

NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_GEMM_DESC::DescA

◆ DescB

NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_GEMM_DESC::DescB

◆ DescBias

NV_META_COMMAND_OPTIONAL_TENSOR_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DescBias

◆ DescC

NV_META_COMMAND_OPTIONAL_TENSOR_DESC NV_META_COMMAND_CREATE_GEMM_DESC::DescC

◆ DescFilter

NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DescFilter

◆ DescIn

NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DescIn

◆ DescOut [1/2]

NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DescOut

◆ DescOut [2/2]

NV_META_COMMAND_TENSOR_DESC NV_META_COMMAND_CREATE_GEMM_DESC::DescOut

◆ descsLayout

D3D12_ELEMENTS_LAYOUT _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::descsLayout

If type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_BOTTOM_LEVEL, it specifies which of pGeometryDescs and ppGeometryDescs to use. Otherwise, this parameter is unused.

◆ desired_content_max_frame_average_luminance [1/6]

NvU16 _NV_HDR_CAPABILITIES_V1::desired_content_max_frame_average_luminance

Desired maximum Frame-Average Light Level (MaxFALL) of HDR content ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [2/6]

NvU16 { ... } ::desired_content_max_frame_average_luminance

Desired maximum Frame-Average Light Level (MaxFALL) of HDR content ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ desired_content_max_frame_average_luminance [3/6]

NvU16 _NV_HDR_CAPABILITIES_V2::desired_content_max_frame_average_luminance

Desired maximum Frame-Average Light Level (MaxFALL) of HDR content ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [4/6]

NvU16 { ... } ::desired_content_max_frame_average_luminance

Desired maximum Frame-Average Light Level (MaxFALL) of HDR content ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ desired_content_max_frame_average_luminance [5/6]

NvU16 _NV_HDR_CAPABILITIES_V3::desired_content_max_frame_average_luminance

Desired maximum Frame-Average Light Level (MaxFALL) of HDR content ([0x0000-0xFFFF] = [0.0 - 65535.0] cd/m^2, in units of 1 cd/m^2)

◆ [] [6/6]

NvU16 { ... } ::desired_content_max_frame_average_luminance

Desired maximum Frame-Average Light Level (MaxFALL) of HDR content ([0x0000-0xFFFF] = [0.0 - 65535.0] cd/m^2, in units of 1 cd/m^2)

◆ desired_content_max_luminance [1/6]

NvU16 _NV_HDR_CAPABILITIES_V1::desired_content_max_luminance

Maximum display luminance = desired max luminance of HDR content ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [2/6]

NvU16 { ... } ::desired_content_max_luminance

Maximum display luminance = desired max luminance of HDR content ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [3/6]

NvU16 { ... } ::desired_content_max_luminance

Maximum display luminance = desired max luminance of HDR content ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ desired_content_max_luminance [4/6]

NvU16 _NV_HDR_CAPABILITIES_V2::desired_content_max_luminance

Maximum display luminance = desired max luminance of HDR content ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [5/6]

NvU16 { ... } ::desired_content_max_luminance

Maximum display luminance = desired max luminance of HDR content ([0x0000-0xFFFF] = [0.0 - 65535.0] cd/m^2, in units of 1 cd/m^2)

◆ desired_content_max_luminance [6/6]

NvU16 _NV_HDR_CAPABILITIES_V3::desired_content_max_luminance

Maximum display luminance = desired max luminance of HDR content ([0x0000-0xFFFF] = [0.0 - 65535.0] cd/m^2, in units of 1 cd/m^2)

◆ [] [1/6]

NvU16 { ... } ::desired_content_min_luminance

Minimum display luminance = desired min luminance of HDR content ([0x0001-0xFFFF] = [1.0 - 6.55350] cd/m^2)

◆ desired_content_min_luminance [2/6]

NvU16 _NV_HDR_CAPABILITIES_V1::desired_content_min_luminance

Minimum display luminance = desired min luminance of HDR content ([0x0001-0xFFFF] = [1.0 - 6.55350] cd/m^2)

◆ desired_content_min_luminance [3/6]

NvU16 _NV_HDR_CAPABILITIES_V2::desired_content_min_luminance

Minimum display luminance = desired min luminance of HDR content ([0x0001-0xFFFF] = [1.0 - 6.55350] cd/m^2)

◆ [] [4/6]

NvU16 { ... } ::desired_content_min_luminance

Minimum display luminance = desired min luminance of HDR content ([0x0001-0xFFFF] = [1.0 - 6.55350] cd/m^2)

◆ [] [5/6]

NvU16 { ... } ::desired_content_min_luminance

Minimum display luminance = desired min luminance of HDR content ([0x0000-0xFFFF] = [0.0 - 6.55350] cd/m^2, in units of 0.0001 cd/m^2)

◆ desired_content_min_luminance [6/6]

NvU16 _NV_HDR_CAPABILITIES_V3::desired_content_min_luminance

Minimum display luminance = desired min luminance of HDR content ([0x0000-0xFFFF] = [0.0 - 6.55350] cd/m^2, in units of 0.0001 cd/m^2)

◆ destAccelerationStructureData

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX::destAccelerationStructureData

Memory where the resulting acceleration structure will be stored.

◆ destBuffer [1/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_DESC::destBuffer

Result storage. Size required and the layout of the contents written by the system depend on infoType. The memory pointed to must be in state D3D12_RESOURCE_STATE_UNORDERED_ACCESS. The memory must be aligned to the natural alignment for the members of the particular output structure being generated (e.g. 8 bytes for a struct with the largest member being NvU64).

◆ destBuffer [2/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_DESC::destBuffer

Result storage. Size required and the layout of the contents written by the system depend on infoType. The memory pointed to must be in state D3D12_RESOURCE_STATE_UNORDERED_ACCESS. The memory must be aligned to the natural alignment for the members of the particular output structure being generated (e.g. 8 bytes for a struct with the largest member being NvU64).

◆ destDisplacementMicromapArrayData

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_DESC::destDisplacementMicromapArrayData

Output location for the DMM Array build. NvAPI_D3D12_GetRaytracingDisplacementMicromapArrayPrebuildInfo() reports the amount of memory required for the result given a set of input parameters. The address must be aligned to 256 bytes (NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_BYTE_ALIGNMENT).

◆ destEnumIndex

NvU32 NvU32 destEnumIndex

◆ destOpacityMicromapArrayData

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_DESC::destOpacityMicromapArrayData

Output location for the OMM Array build. NvAPI_D3D12_GetRaytracingOpacityMicromapArrayPrebuildInfo() reports the amount of memory required for the result given a set of input parameters. The address must be aligned to 256 bytes (NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_BYTE_ALIGNMENT).

◆ details [1/2]

NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO* _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V1::details

May be NULL if no advanced settings are required. NULL for Non-NVIDIA Display.

◆ details [2/2]

NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO* _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V2::details

May be NULL if no advanced settings are required.

◆ device

NvU16 NVLINK_DEVICE_INFO_V1::device

◆ deviceId [1/4]

NvU32 NV_CHIPSET_INFO_v4::deviceId

Chipset device identification.

◆ deviceId [2/4]

NvU32 NV_CHIPSET_INFO_v3::deviceId

device ID

◆ deviceId [3/4]

NvU32 NV_CHIPSET_INFO_v2::deviceId

device ID

◆ deviceId [4/4]

NvU32 NV_CHIPSET_INFO_v1::deviceId

◆ deviceIdFlags

NvU32 NVLINK_DEVICE_INFO_V1::deviceIdFlags

ID Flags, Bitmask that specifies which IDs are valid for the GPU. Refer NVAPI_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_* for possible values. If NVAPI_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_PCI is set, PCI information is valid. If NVAPI_NVLINK_DEVICE_INFO_DEVICE_ID_FLAGS_UUID is set, UUID is valid.

◆ deviceMask [1/3]

NvU32 NV_VIEW_TARGET_INFO::deviceMask

(IN/OUT) Device mask

◆ [] [2/3]

NvU32 { ... } ::deviceMask

(IN/OUT) Device mask

◆ deviceMask [3/3]

NvU32 NV_DISPLAY_PATH::deviceMask

(IN) Device mask

◆ devices [1/2]

NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_PARAMS_V1::devices[NV_GPU_CLIENT_ILLUM_DEVICE_NUM_DEVICES_MAX]

◆ devices [2/2]

NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_V1 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_PARAMS_V1::devices[NV_GPU_CLIENT_ILLUM_DEVICE_NUM_DEVICES_MAX]

◆ deviceType

NvU64 NVLINK_DEVICE_INFO_V1::deviceType

GPU Type. See NVAPI_NVLINK_DEVICE_INFO_DEVICE_TYPE_* for possible values.

◆ deviceUUID

NvU8 NVLINK_DEVICE_INFO_V1::deviceUUID[16]

GPU UUID.

◆ Dilation

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Dilation[NV_META_COMMAND_NUM_SPATIAL_DIM]

◆ DimensionCount [1/2]

NvU64 NV_META_COMMAND_TENSOR_DESC::DimensionCount

◆ DimensionCount [2/2]

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::DimensionCount

◆ dipSwitch

NvU32 _NVVIOCAPS::dipSwitch

On-board DIP switch settings bits.

◆ dipSwitchReserved

NvU32 _NVVIOCAPS::dipSwitchReserved

On-board DIP switch settings reserved bits.

◆ Direction

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Direction

◆ disableVirtualModeSupport

NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::disableVirtualModeSupport

◆ displacementMicromapArray [1/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::displacementMicromapArray

Pointer to a DMM Array used by this geometry. Unlike vertex, index, and transform buffers, this resource is dereferenced during raytracing.

◆ displacementMicromapArray [2/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_RELOCATE_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::displacementMicromapArray

[in] DMM Array current memory address; it must be 256-byte aligned (NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_BYTE_ALIGNMENT).

◆ [struct] [1/3]

struct { ... } _NV_HDR_CAPABILITIES_V1::display_data

◆ [struct] [2/3]

struct { ... } _NV_HDR_CAPABILITIES_V2::display_data

◆ [struct] [3/3]

struct { ... } _NV_HDR_CAPABILITIES_V3::display_data

◆ displayCount [1/3]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::displayCount

Number of display details.

◆ displayCount [2/3]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::displayCount

Number of display details.

◆ displayCount [3/3]

NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::displayCount

(OUT) The number of valid entries in the displays array.

◆ displayId [1/12]

NvU32 _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V1::displayId

Display ID.

◆ displayId [2/12]

NvU32 _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V2::displayId

Display ID.

◆ displayId [3/12]

NvU32 _NV_GPU_DISPLAYIDS::displayId

this is a unique identifier for each device

◆ displayId [4/12]

NvU32 NV_SET_PREFERRED_STEREO_DISPLAY_V1::displayId

[in] Monitor Identifier to be set

◆ displayId [5/12]

NvU32 NV_GET_PREFERRED_STEREO_DISPLAY_V1::displayId

[out] The queried stereo display

◆ displayId [6/12]

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::displayId

[out] DisplayId.

◆ displayId [7/12]

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::displayId

[in] DisplayId to identify the display connector the metadata operation is requested for.

◆ displayId [8/12]

NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::displayId

DisplayID of the display.

◆ displayId [9/12]

NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::displayId

DisplayID of the display.

◆ [] [10/12]

NvU32 { ... } ::displayId

(OUT) The DisplayID of this display.

◆ displayId [11/12]

NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::displayId

(OUT) The DisplayID of this display.

◆ displayId [12/12]

NvU32 _NV_GSYNC_DISPLAY::displayId

display identifier for displays.The GPU to which it is connected, can be retireved from NvAPI_SYS_GetPhysicalGpuFromDisplayId

◆ displayMask [1/3]

NvU32 NV_I2C_INFO_V1::displayMask

The Display Mask of the concerned display.

◆ displayMask [2/3]

NvU32 NV_I2C_INFO_V2::displayMask

The Display Mask of the concerned display.

◆ displayMask [3/3]

NvU32 NV_I2C_INFO_V3::displayMask

The Display Mask of the concerned display.

◆ [] [1/4]

NvU32 { ... } ::displayOutputId

Connected display target (0 if no display connected)

◆ displayOutputId [2/4]

NvU32 NV_MOSAIC_TOPO_DETAILS::displayOutputId

Connected display target (0 if no display connected)

◆ [] [3/4]

NvU32 { ... } ::displayOutputId

Connected display target.

◆ displayOutputId [4/4]

NvU32 NV_MOSAIC_TOPOLOGY::displayOutputId

Connected display target.

◆ displayPrimary_x0 [1/11]

NvU16 _NV_HDR_CAPABILITIES_V1::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [2/11]

NvU16 { ... } ::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x0 [3/11]

NvU16 _NV_HDR_CAPABILITIES_V2::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [4/11]

NvU16 { ... } ::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x0 [5/11]

NvU16 _NV_HDR_CAPABILITIES_V3::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [6/11]

NvU16 { ... } ::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x0 [7/11]

NvU16 _NV_HDR_COLOR_DATA_V1::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [8/11]

NvU16 { ... } ::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [9/11]

NvU16 { ... } ::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x0 [10/11]

NvU16 _NV_HDR_COLOR_DATA_V2::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x0 [11/11]

NvU16 _NV_HDR_METADATA_V1::displayPrimary_x0

x coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [1/11]

NvU16 { ... } ::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x1 [2/11]

NvU16 _NV_HDR_CAPABILITIES_V1::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [3/11]

NvU16 { ... } ::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x1 [4/11]

NvU16 _NV_HDR_CAPABILITIES_V2::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [5/11]

NvU16 { ... } ::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x1 [6/11]

NvU16 _NV_HDR_CAPABILITIES_V3::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x1 [7/11]

NvU16 _NV_HDR_COLOR_DATA_V1::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [8/11]

NvU16 { ... } ::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x1 [9/11]

NvU16 _NV_HDR_COLOR_DATA_V2::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [10/11]

NvU16 { ... } ::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x1 [11/11]

NvU16 _NV_HDR_METADATA_V1::displayPrimary_x1

x coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [1/11]

NvU16 { ... } ::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x2 [2/11]

NvU16 _NV_HDR_CAPABILITIES_V1::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x2 [3/11]

NvU16 _NV_HDR_CAPABILITIES_V2::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [4/11]

NvU16 { ... } ::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [5/11]

NvU16 { ... } ::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x2 [6/11]

NvU16 _NV_HDR_CAPABILITIES_V3::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x2 [7/11]

NvU16 _NV_HDR_COLOR_DATA_V1::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [8/11]

NvU16 { ... } ::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x2 [9/11]

NvU16 _NV_HDR_COLOR_DATA_V2::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [10/11]

NvU16 { ... } ::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_x2 [11/11]

NvU16 _NV_HDR_METADATA_V1::displayPrimary_x2

x coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [1/11]

NvU16 { ... } ::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y0 [2/11]

NvU16 _NV_HDR_CAPABILITIES_V1::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y0 [3/11]

NvU16 _NV_HDR_CAPABILITIES_V2::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [4/11]

NvU16 { ... } ::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y0 [5/11]

NvU16 _NV_HDR_CAPABILITIES_V3::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [6/11]

NvU16 { ... } ::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [7/11]

NvU16 { ... } ::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y0 [8/11]

NvU16 _NV_HDR_COLOR_DATA_V1::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y0 [9/11]

NvU16 _NV_HDR_COLOR_DATA_V2::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [10/11]

NvU16 { ... } ::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y0 [11/11]

NvU16 _NV_HDR_METADATA_V1::displayPrimary_y0

y coordinate of color primary 0 (e.g. Red) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y1 [1/11]

NvU16 _NV_HDR_CAPABILITIES_V1::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [2/11]

NvU16 { ... } ::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [3/11]

NvU16 { ... } ::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y1 [4/11]

NvU16 _NV_HDR_CAPABILITIES_V2::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y1 [5/11]

NvU16 _NV_HDR_CAPABILITIES_V3::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [6/11]

NvU16 { ... } ::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [7/11]

NvU16 { ... } ::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y1 [8/11]

NvU16 _NV_HDR_COLOR_DATA_V1::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y1 [9/11]

NvU16 _NV_HDR_COLOR_DATA_V2::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [10/11]

NvU16 { ... } ::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y1 [11/11]

NvU16 _NV_HDR_METADATA_V1::displayPrimary_y1

y coordinate of color primary 1 (e.g. Green) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y2 [1/11]

NvU16 _NV_HDR_CAPABILITIES_V1::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [2/11]

NvU16 { ... } ::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [3/11]

NvU16 { ... } ::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y2 [4/11]

NvU16 _NV_HDR_CAPABILITIES_V2::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [5/11]

NvU16 { ... } ::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y2 [6/11]

NvU16 _NV_HDR_CAPABILITIES_V3::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [7/11]

NvU16 { ... } ::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y2 [8/11]

NvU16 _NV_HDR_COLOR_DATA_V1::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y2 [9/11]

NvU16 _NV_HDR_COLOR_DATA_V2::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [10/11]

NvU16 { ... } ::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayPrimary_y2 [11/11]

NvU16 _NV_HDR_METADATA_V1::displayPrimary_y2

y coordinate of color primary 2 (e.g. Blue) of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displays [1/3]

NV_MOSAIC_GRID_TOPO_DISPLAY_V1 _NV_MOSAIC_GRID_TOPO_V1::displays[NV_MOSAIC_MAX_DISPLAYS]

Displays are done as [(row * columns) + column].

◆ displays [2/3]

NV_MOSAIC_GRID_TOPO_DISPLAY_V2 _NV_MOSAIC_GRID_TOPO_V2::displays[NV_MOSAIC_MAX_DISPLAYS]

Displays are done as [(row * columns) + column].

◆ [struct] [3/3]

struct { ... } NV_MOSAIC_DISPLAY_TOPO_STATUS::displays[NVAPI_MAX_DISPLAYS]

◆ displaySettings [1/4]

NV_MOSAIC_DISPLAY_SETTING_V1 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::displaySettings[NV_MOSAIC_DISPLAY_SETTINGS_MAX]

List of per display settings possible.

◆ displaySettings [2/4]

NV_MOSAIC_DISPLAY_SETTING_V2 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::displaySettings[NV_MOSAIC_DISPLAY_SETTINGS_MAX]

List of per display settings possible.

◆ displaySettings [3/4]

NV_MOSAIC_DISPLAY_SETTING_V1 _NV_MOSAIC_GRID_TOPO_V1::displaySettings

Display settings.

◆ displaySettings [4/4]

NV_MOSAIC_DISPLAY_SETTING_V1 _NV_MOSAIC_GRID_TOPO_V2::displaySettings

Display settings.

◆ displaySettingsCount [1/2]

NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::displaySettingsCount

Number of display settings in below array.

◆ displaySettingsCount [2/2]

NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::displaySettingsCount

Number of display settings in below array.

◆ displayWhitePoint_x [1/11]

NvU16 _NV_HDR_CAPABILITIES_V1::displayWhitePoint_x

x coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [2/11]

NvU16 { ... } ::displayWhitePoint_x

x coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [3/11]

NvU16 { ... } ::displayWhitePoint_x

x coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_x [4/11]

NvU16 _NV_HDR_CAPABILITIES_V2::displayWhitePoint_x

x coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [5/11]

NvU16 { ... } ::displayWhitePoint_x

x coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_x [6/11]

NvU16 _NV_HDR_CAPABILITIES_V3::displayWhitePoint_x

x coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_x [7/11]

NvU16 _NV_HDR_COLOR_DATA_V1::displayWhitePoint_x

x coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [8/11]

NvU16 { ... } ::displayWhitePoint_x

x coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [9/11]

NvU16 { ... } ::displayWhitePoint_x

x coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_x [10/11]

NvU16 _NV_HDR_COLOR_DATA_V2::displayWhitePoint_x

x coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_x [11/11]

NvU16 _NV_HDR_METADATA_V1::displayWhitePoint_x

x coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_y [1/11]

NvU16 _NV_HDR_CAPABILITIES_V1::displayWhitePoint_y

y coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [2/11]

NvU16 { ... } ::displayWhitePoint_y

y coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [3/11]

NvU16 { ... } ::displayWhitePoint_y

y coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_y [4/11]

NvU16 _NV_HDR_CAPABILITIES_V2::displayWhitePoint_y

y coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [5/11]

NvU16 { ... } ::displayWhitePoint_y

y coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_y [6/11]

NvU16 _NV_HDR_CAPABILITIES_V3::displayWhitePoint_y

y coordinate of white point of the display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_y [7/11]

NvU16 _NV_HDR_COLOR_DATA_V1::displayWhitePoint_y

y coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [8/11]

NvU16 { ... } ::displayWhitePoint_y

y coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ [] [9/11]

NvU16 { ... } ::displayWhitePoint_y

y coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_y [10/11]

NvU16 _NV_HDR_COLOR_DATA_V2::displayWhitePoint_y

y coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ displayWhitePoint_y [11/11]

NvU16 _NV_HDR_METADATA_V1::displayWhitePoint_y

y coordinate of white point of mastering display ([0x0000-0xC350] = [0.0 - 1.0])

◆ dm_version [1/4]

NvU32 _NV_HDR_CAPABILITIES_V2::dm_version

Upper Nibble represents major version of Display Management(DM) while lower represents minor version of DM.

◆ [] [2/4]

NvU32 { ... } ::dm_version

Upper Nibble represents major version of Display Management(DM) while lower represents minor version of DM.

◆ dm_version [3/4]

NvU32 _NV_HDR_CAPABILITIES_V3::dm_version

Upper Nibble represents major version of Display Management(DM) while lower represents minor version of DM.

◆ [] [4/4]

NvU32 { ... } ::dm_version

Upper Nibble represents major version of Display Management(DM) while lower represents minor version of DM.

◆ dmmAttachment

NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_TRIANGLES_DESC::dmmAttachment

Displacement Micromap attachment descriptor.

◆ [] [1/2]

NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_TRIANGLES_DESC { ... } ::dmmTriangles

Describes micro-triangle geometry, if type is NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_DMM_TRIANGLES_EX. Otherwise, this parameter is unused (space repurposed in a union).

◆ dmmTriangles [2/2]

NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_TRIANGLES_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::dmmTriangles

Describes micro-triangle geometry, if type is NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_DMM_TRIANGLES_EX. Otherwise, this parameter is unused (space repurposed in a union).

◆ domain [1/3]

NvU16 NVLINK_DEVICE_INFO_V1::domain

domain, bus, device, function, pciDeviceId : PCI information for the GPU.

◆ [struct] [2/3]

struct { ... } NV_GPU_CLOCK_FREQUENCIES_V1::domain[NVAPI_MAX_GPU_PUBLIC_CLOCKS]

◆ [struct] [3/3]

struct { ... } NV_GPU_CLOCK_FREQUENCIES_V2::domain[NVAPI_MAX_GPU_PUBLIC_CLOCKS]

◆ domainId [1/10]

NV_GPU_PUBLIC_CLOCK_ID NV_GPU_PSTATE20_CLOCK_ENTRY_V1::domainId

ID of the clock domain.

◆ [] [2/10]

NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID { ... } ::domainId

Voltage domain ID and value range in (uV) required for this clock.

◆ domainId [3/10]

NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID NV_GPU_PSTATE20_CLOCK_ENTRY_V1::domainId

Voltage domain ID and value range in (uV) required for this clock.

◆ domainId [4/10]

NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::domainId

ID of the voltage domain.

◆ [] [5/10]

NV_GPU_PUBLIC_CLOCK_ID { ... } ::domainId

ID of the clock domain.

◆ domainId [6/10]

NV_GPU_PUBLIC_CLOCK_ID NV_GPU_PERF_PSTATES_INFO_V1::domainId

ID of the clock domain.

◆ domainId [7/10]

NV_GPU_PUBLIC_CLOCK_ID NV_GPU_PERF_PSTATES_INFO_V2::domainId

◆ [] [8/10]

NV_GPU_PUBLIC_CLOCK_ID { ... } ::domainId

◆ [] [9/10]

NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID { ... } ::domainId

ID of the voltage domain, containing flags and mvolt info.

◆ domainId [10/10]

NV_GPU_PERF_VOLTAGE_INFO_DOMAIN_ID NV_GPU_PERF_PSTATES_INFO_V2::domainId

ID of the voltage domain, containing flags and mvolt info.

◆ DontUseViewportOrder [1/2]

BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::DontUseViewportOrder

◆ DontUseViewportOrder [2/2]

BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::DontUseViewportOrder

◆ doubleBitErrors [1/3]

NvU64 NV_GPU_ECC_ERROR_INFO::doubleBitErrors

Number of double-bit ECC errors detected since last boot.

Number of double-bit ECC errors detected since last counter reset.

◆ [] [2/3]

NvU64 { ... } ::doubleBitErrors

Number of double-bit ECC errors detected since last boot.

◆ [] [3/3]

NvU64 { ... } ::doubleBitErrors

Number of double-bit ECC errors detected since last counter reset.

◆ downmixInhibit

NvU32 NV_INFOFRAME_AUDIO::downmixInhibit

◆ dpcd_ver

NvU32 _NV_DISPLAY_PORT_INFO_V1::dpcd_ver

DPCD version of the monitor.

◆ [struct]

struct { ... } _NVVIOCAPS::driver

Driver version.

◆ driverEndTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::driverEndTime

◆ driverExpandDefaultHdrParameters [1/3]

NvU32 _NV_HDR_CAPABILITIES_V1::driverExpandDefaultHdrParameters

If set, driver will expand default (=zero) HDR capabilities parameters contained in display's EDID. Boolean: 0 = report actual HDR parameters, 1 = expand default HDR parameters;

◆ driverExpandDefaultHdrParameters [2/3]

NvU32 _NV_HDR_CAPABILITIES_V2::driverExpandDefaultHdrParameters

If set, driver will expand default (=zero) HDR capabilities parameters contained in display's EDID. Boolean: 0 = report actual HDR parameters, 1 = expand default HDR parameters;

◆ driverExpandDefaultHdrParameters [3/3]

NvU32 _NV_HDR_CAPABILITIES_V3::driverExpandDefaultHdrParameters

If set, driver will expand default (=zero) HDR capabilities parameters contained in display's EDID. Boolean: 0 = report actual HDR parameters, 1 = expand default HDR parameters;

◆ driverReloadAllowed [1/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::driverReloadAllowed

If necessary, reloading the driver is permitted (for Vista and above only). Will not be persisted. Value undefined on get.

◆ driverReloadAllowed [2/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::driverReloadAllowed

If necessary, reloading the driver is permitted (for Vista and above only). Will not be persisted. Value undefined on get.

◆ driverStartTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::driverStartTime

◆ driverVersion [1/2]

NvU32 _NV_DISPLAY_DRIVER_INFO::driverVersion

Contains the driver version after successful return.

◆ driverVersion [2/2]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::driverVersion

Contains the driver version after successful return.

◆ drvVersion

NvU32 NV_DISPLAY_DRIVER_VERSION::drvVersion

◆ [struct] [1/2]

struct { ... } _NV_HDR_CAPABILITIES_V2::dv_static_metadata

◆ [struct] [2/2]

struct { ... } _NV_HDR_CAPABILITIES_V3::dv_static_metadata

◆ dwVersion [1/3]

NvU32 _NV_DX_VIDEO_STEREO_INFO::dwVersion

Must be NV_DX_VIDEO_STEREO_INFO_VER.

◆ dwVersion [2/3]

NvU32 _NV_JOIN_PRESENT_BARRIER_PARAMS::dwVersion

Must be NV_JOIN_PRESENT_BARRIER_PARAMS_VER1.

◆ dwVersion [3/3]

NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::dwVersion

Must be NV_PRESENT_BARRIER_FRAME_STATICS_VER1.

◆ dynamicRange [1/10]

NV_DP_DYNAMIC_RANGE _NV_DISPLAY_PORT_INFO_V1::dynamicRange

Dynamic range.

◆ dynamicRange [2/10]

NV_DP_DYNAMIC_RANGE NV_DISPLAY_PORT_CONFIG::dynamicRange

Dynamic range.

◆ dynamicRange [3/10]

NvU8 _NV_COLOR_DATA_V2::dynamicRange

One of NV_DYNAMIC_RANGE enum values.

◆ [] [4/10]

NvU8 { ... } ::dynamicRange

One of NV_DYNAMIC_RANGE enum values.

◆ dynamicRange [5/10]

NvU8 _NV_COLOR_DATA_V3::dynamicRange

One of NV_DYNAMIC_RANGE enum values.

◆ [] [6/10]

NvU8 { ... } ::dynamicRange

One of NV_DYNAMIC_RANGE enum values.

◆ [] [7/10]

NvU8 { ... } ::dynamicRange

One of NV_DYNAMIC_RANGE enum values.

◆ dynamicRange [8/10]

NvU8 _NV_COLOR_DATA_V4::dynamicRange

One of NV_DYNAMIC_RANGE enum values.

◆ [] [9/10]

NvU8 { ... } ::dynamicRange

One of NV_DYNAMIC_RANGE enum values.

◆ dynamicRange [10/10]

NvU8 _NV_COLOR_DATA_V5::dynamicRange

One of NV_DYNAMIC_RANGE enum values.

◆ dynSharedMemBytes [1/3]

NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::dynSharedMemBytes

[in] dynamic shared memory required by the shader in bytes

◆ dynSharedMemBytes [2/3]

NvU32 _NVAPI_CU_KERNEL_LAUNCH_PARAMS::dynSharedMemBytes

◆ dynSharedMemBytes [3/3]

NvU32 _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::dynSharedMemBytes

◆ EDID861ExtRev [1/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::EDID861ExtRev

Revision number of the EDID 861 extension.

◆ EDID861ExtRev [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::EDID861ExtRev

Revision number of the EDID 861 extension.

◆ EDID_Data [1/3]

NvU8 NV_EDID_V1::EDID_Data[NV_EDID_DATA_SIZE]

◆ EDID_Data [2/3]

NvU8 NV_EDID_V2::EDID_Data[NV_EDID_DATA_SIZE]

◆ EDID_Data [3/3]

NvU8 NV_EDID_V3::EDID_Data[NV_EDID_DATA_SIZE]

◆ edidId

NvU32 NV_EDID_V3::edidId

ID which always returned in a monotonically increasing counter. Across a split-EDID read we need to verify that all calls returned the same edidId. This counter is incremented if we get the updated EDID.

◆ eEyeIndex [1/2]

NV_SMP_ASSIST_EYE_INDEX _NV_SMP_ASSIST_ENABLE_PARAMS_V1::eEyeIndex

(IN) Rendering mode for upcoming draw calls (Mono/Stereo-Left/Stereo-Right/Instanced Stereo)

◆ eEyeIndex [2/2]

NV_SMP_ASSIST_EYE_INDEX _NV_SMP_ASSIST_GET_CONSTANTS_V3::eEyeIndex

(IN) Viewports/scissors/constant buffer data corresponding to the input eEyeIndex will be returned

◆ eFormat

NV_STEREO_VIDEO_FORMAT _NV_DX_VIDEO_STEREO_INFO::eFormat

Stereo format of the surface.

◆ [] [1/2]

NV_LMS_CONFIG { ... } ::eLMSConfig

(IN) If eSMPAssistType is LMS and SMP Assist Level is Full then provide LMS config enum

◆ eLMSConfig [2/2]

NV_LMS_CONFIG _NV_SMP_ASSIST_SETUP_PARAMS_V1::eLMSConfig

(IN) If eSMPAssistType is LMS and SMP Assist Level is Full then provide LMS config enum

◆ eMRSConfig [1/2]

NV_MRS_CONFIG _NV_SMP_ASSIST_SETUP_PARAMS_V1::eMRSConfig

(IN) If eSMPAssistType is MRS and SMP Assist Level is Full then provide MRS config enum

◆ [] [2/2]

NV_MRS_CONFIG { ... } ::eMRSConfig

(IN) If eSMPAssistType is MRS and SMP Assist Level is Full then provide MRS config enum

◆ enable422Filter [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::enable422Filter

Enables/Disables 4:2:2 filter.

◆ enable422Filter [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::enable422Filter

Enables/Disables 4:2:2 filter.

◆ enable422Filter [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::enable422Filter

Enables/Disables 4:2:2 filter.

◆ enableAlphaKeyComposite [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::enableAlphaKeyComposite

Enable Alpha key composite.

◆ enableAlphaKeyComposite [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::enableAlphaKeyComposite

Enable Alpha key composite.

◆ enableAlphaKeyComposite [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::enableAlphaKeyComposite

Enable Alpha key composite.

◆ enableANCTimeCodeGeneration [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::enableANCTimeCodeGeneration

Enable SDI ANC time code generation.

◆ enableANCTimeCodeGeneration [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::enableANCTimeCodeGeneration

Enable SDI ANC time code generation.

◆ enableANCTimeCodeGeneration [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::enableANCTimeCodeGeneration

Enable SDI ANC time code generation.

◆ enableAudioBlanking

NvU32 _NVVIOOUTPUTCONFIG_V3::enableAudioBlanking

Enable HANC audio blanking on repeat frames.

◆ enableComposite [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::enableComposite

Enable composite.

◆ enableComposite [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::enableComposite

Enable composite.

◆ enableComposite [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::enableComposite

Enable composite.

◆ enabled

NvU32 NV_MOSAIC_TOPO_BRIEF::enabled

1 if topo is enabled, else 0

◆ enableDataIntegrityCheck [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::enableDataIntegrityCheck

Enable data integrity check: true - enable, false - disable.

◆ enableDataIntegrityCheck [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::enableDataIntegrityCheck

Enable data integrity check: true - enable, false - disable.

◆ enableDataIntegrityCheck [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::enableDataIntegrityCheck

Enable data integrity check: true - enable, false - disable.

◆ EnableDBT

bool NVAPI_D3D12_PSO_ENABLE_DEPTH_BOUND_TEST_DESC_V1::EnableDBT

◆ enableExclusiveScissorRect

bool _NV_D3D11_EXCLUSIVE_SCISSOR_RECT_DESC_V1::enableExclusiveScissorRect

(IN) Control of enabling Exclusive ScissorRect per rect

◆ enableFullColorRange [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::enableFullColorRange

Flag indicating Full Color Range.

◆ enableFullColorRange [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::enableFullColorRange

Flag indicating Full Color Range.

◆ enableFullColorRange [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::enableFullColorRange

Flag indicating Full Color Range.

◆ enableRGBData [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::enableRGBData

Indicates data is in RGB format.

◆ enableRGBData [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::enableRGBData

Indicates data is in RGB format.

◆ enableRGBData [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::enableRGBData

Indicates data is in RGB format.

◆ enableVariablePixelShadingRate

bool _NV_D3D11_VIEWPORT_SHADING_RATE_DESC_V1::enableVariablePixelShadingRate

(IN) Control of enabling Variable Pixel Shading Rate per viewport

◆ EndPadding

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::EndPadding[NV_META_COMMAND_NUM_SPATIAL_DIM]

◆ enumIndex

NvU32 enumIndex

◆ errorFlags [1/2]

NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::errorFlags

(OUT) Any of the NV_MOSAIC_DISPLAYTOPO_ERROR_* flags.

(OUT) Any of the NV_MOSAIC_DISPLAYCAPS_PROBLEM_* flags.

◆ [] [2/2]

NvU32 { ... } ::errorFlags

(OUT) Any of the NV_MOSAIC_DISPLAYCAPS_PROBLEM_* flags.

◆ eSMPAssistLevel [1/3]

NV_SMP_ASSIST_LEVEL _NV_SMP_ASSIST_GET_CONSTANTS_V3::eSMPAssistLevel

(OUT) SMP Assist level provided in Init call

◆ eSMPAssistLevel [2/3]

NV_SMP_ASSIST_LEVEL _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::eSMPAssistLevel

(IN) Full/Partial/Minimal

◆ eSMPAssistLevel [3/3]

NV_SMP_ASSIST_LEVEL _NV_QUERY_SMP_ASSIST_SUPPORT_PARAMS_V1::eSMPAssistLevel

(IN) Full/Partial/Minimal

◆ eSMPAssistType [1/4]

NV_SMP_ASSIST_TYPE _NV_SMP_ASSIST_GET_CONSTANTS_V3::eSMPAssistType

(OUT) SMP type provided in Init call

◆ eSMPAssistType [2/4]

NV_SMP_ASSIST_TYPE _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::eSMPAssistType

◆ eSMPAssistType [3/4]

NV_SMP_ASSIST_TYPE _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::eSMPAssistType

(IN) None/MRS/LMS

◆ eSMPAssistType [4/4]

NV_SMP_ASSIST_TYPE _NV_QUERY_SMP_ASSIST_SUPPORT_PARAMS_V1::eSMPAssistType

(IN) None/MRS/LMS

◆ etc

NV_TIMINGEXT _NV_TIMING::etc

◆ eventId

NV_EVENT_TYPE NV_EVENT_REGISTER_CALLBACK::eventId

ID of the event being sent.

◆ ExecutionDirtyState

NV_D3D_GRAPHICS_STATES NVAPI_META_COMMAND_DESC::ExecutionDirtyState

◆ expansionEnable

NvU32 _NVVIOSTREAM::expansionEnable

Enable/disable 4:2:2->4:4:4 expansion.

◆ extendedColorimetry

NvU32 NV_INFOFRAME_VIDEO::extendedColorimetry

◆ extendedRevision [1/2]

NvU32 _NV_GSYNC_CAPABILITIES_V2::extendedRevision

FPGA minor revision.

◆ extendedRevision [2/2]

NvU32 _NV_GSYNC_CAPABILITIES_V3::extendedRevision

FPGA minor revision.

◆ fA

float _NV_MODIFIED_W_COEFFICIENTS::fA

◆ fallTimems

NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::fallTimems

Time in ms to transition from color B to color A.

◆ fAReserved

float _NV_MODIFIED_W_COEFFICIENTS::fAReserved

◆ fastNvLinkReads

NvU32 _NV_MULTIGPU_CAPS_V2::fastNvLinkReads

◆ fB

float _NV_MODIFIED_W_COEFFICIENTS::fB

◆ fBReserved

float _NV_MODIFIED_W_COEFFICIENTS::fBReserved

◆ featureCode [1/4]

NV_LICENSE_FEATURE_TYPE _NV_LICENSE_FEATURE_DETAILS_V1::featureCode

Feature code that corresponds to the licensable feature.

◆ featureCode [2/4]

NV_LICENSE_FEATURE_TYPE _NV_LICENSE_FEATURE_DETAILS_V2::featureCode

Feature code that corresponds to the licensable feature.

◆ featureCode [3/4]

NV_LICENSE_FEATURE_TYPE _NV_LICENSE_FEATURE_DETAILS_V3::featureCode

Feature code that corresponds to the licensable feature.

◆ featureCode [4/4]

NV_LICENSE_FEATURE_TYPE _NV_LICENSE_FEATURE_DETAILS_V4::featureCode

Feature code that corresponds to the licensable feature.

◆ featureId

NVAPI_ANSEL_FEATURE NVAPI_ANSEL_FEATURE_CONFIGURATION_STRUCT::featureId

Id of the feature.

◆ featureState

NVAPI_ANSEL_FEATURE_STATE NVAPI_ANSEL_FEATURE_CONFIGURATION_STRUCT::featureState

Whether the feature is enabled or not.

◆ fEyeOpenness

float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fEyeOpenness

(IN) Use flag NV_GAZE_EYE_OPENNESS_VALID. Unused at the moment.

◆ fFrameRate

float _NVVIOVIDEOMODE::fFrameRate

Frame rate.

◆ fGammaValueB

float _NVVIOGAMMACORRECTION::fGammaValueB

Blue Gamma value within gamma ranges. 0.5 - 6.0.

◆ fGammaValueG

float _NVVIOGAMMACORRECTION::fGammaValueG

Green Gamma value within gamma ranges. 0.5 - 6.0.

◆ fGammaValueR

float _NVVIOGAMMACORRECTION::fGammaValueR

Red Gamma value within gamma ranges. 0.5 - 6.0.

◆ fGazeDirection

float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fGazeDirection[3]

(IN) Use flag NV_GAZE_DIRECTION_VALID. Normalized direction of the gaze of the eye. Used for calculating the gaze location using the FOV.

◆ fGazeNormalizedLocation

float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fGazeNormalizedLocation[2]

(IN) Use flag NV_GAZE_LOCATION_VALID. Precalculated normalized gaze location in limits (-1 to +1) for X and Y. Center of the screen denotes (0, 0). If this is valid, this will be given higher priority than direction.

◆ fGazeOrigin_mm

float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fGazeOrigin_mm[3]

(IN) Use flag NV_GAZE_ORIGIN_VALID. Origin of the eye in millimeters. Used mainly to detect whether Left Eye or Right Eye.

◆ fGazeVelocity

float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fGazeVelocity[2]

(IN) Use flag NV_GAZE_VELOCITY_VALID. Optional: Velocity of the eye on the normalized space in each direction. Central foveated region would be skewed in the direction of the velocity.

◆ fHorizontalFOV [1/2]

float _NV_GAZE_HANDLER_INIT_PARAMS_V2::fHorizontalFOV

(IN) Horizontal Field of View

◆ fHorizontalFOV [2/2]

float _NV_GAZE_HANDLER_INIT_PARAMS_V1::fHorizontalFOV

(IN) Horizontal Field of View

◆ fields [1/3]

NvU32 _NVVIOCONFIG_V1::fields

Caller sets to NVVIOCONFIG_* mask for fields to use.

◆ fields [2/3]

NvU32 _NVVIOCONFIG_V2::fields

Caller sets to NVVIOCONFIG_* mask for fields to use.

◆ fields [3/3]

NvU32 _NVVIOCONFIG_V3::fields

Caller sets to NVVIOCONFIG_* mask for fields to use.

◆ fileInFolder [1/3]

NvAPI_UnicodeString _NVDRS_APPLICATION_V2::fileInFolder

Select this application only if this file is found. When specifying multiple files, separate them using the ':' character.

◆ fileInFolder [2/3]

NvAPI_UnicodeString _NVDRS_APPLICATION_V3::fileInFolder

Select this application only if this file is found. When specifying multiple files, separate them using the ':' character.

◆ fileInFolder [3/3]

NvAPI_UnicodeString _NVDRS_APPLICATION_V4::fileInFolder

Select this application only if this file is found. When specifying multiple files, separate them using the ':' character.

◆ FillMode

D3D11_FILL_MODE NvAPI_D3D11_RASTERIZER_DESC_EX::FillMode

◆ FilterResource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::FilterResource

◆ FilterResource [2/2]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::FilterResource

◆ fInnermostRadii

float _NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1::fInnermostRadii[2]

(IN) Horizontal and vertical radius for the inner-most region of the foveated rendering pattern

◆ [struct]

struct { ... } _NVVIOCAPS::firmWare

Firmware version.

◆ firmwareVersion

NvU8 _NV_GPU_GSP_INFO_V1::firmwareVersion[NVAPI_GPU_MAX_BUILD_VERSION_LENGTH]

[out] Contains GSP firmware version

◆ FirstArraySlice

UINT _NV_TEX2D_ARRAY_SRRV::FirstArraySlice

◆ flag [1/2]

NvU32 tagNV_TIMINGEXT::flag

Reserved for NVIDIA hardware-based enhancement, such as double-scan.

◆ flag [2/2]

NV_TIMING_FLAG _NV_TIMING_INPUT::flag

Flag containing additional info for timing calculation.

◆ [] [1/30]

NvU32 { ... } ::flags

One or more flags from nvcomp_gpu_top.

◆ flags [2/30]

NvU32 NV_COMPUTE_GPU_TOPOLOGY_V1::flags

One or more flags from nvcomp_gpu_top.

◆ flags [3/30]

NvU32 _NV_COMPUTE_GPU::flags

One or more flags from nvcomp_gpu_top.

◆ flags [4/30]

NvU32 NV_GPU_PERF_PSTATES_INFO_V1::flags

Reserved. Must be set to 0.

  • bit 0 indicates if perfmon is enabled or not
  • bit 1 indicates if dynamic Pstate is capable or not
  • bit 2 indicates if dynamic Pstate is enable or not
  • all other bits must be set to 0
  • bit 0 indicates if the PCIE limit is GEN1 or GEN2
  • bit 1 indicates if the Pstate is overclocked or not
  • bit 2 indicates if the Pstate is overclockable or not
  • all other bits must be set to 0

◆ [] [5/30]

NvU32 { ... } ::flags
  • bit 0 indicates if the PCIE limit is GEN1 or GEN2
  • bit 1 indicates if the Pstate is overclocked or not
  • bit 2 indicates if the Pstate is overclockable or not
  • all other bits must be set to 0

◆ [] [6/30]

NvU32 { ... } ::flags

Reserved. Must be set to 0.

◆ flags [7/30]

NvU32 NV_GPU_PERF_PSTATES_INFO_V2::flags

Reserved for future use. Must be set to 0.

  • bit 0 indicates if perfmon is enabled or not
  • bit 1 indicates if dynamic Pstate is capable or not
  • bit 2 indicates if dynamic Pstate is enable or not
  • all other bits must be set to 0
  • bit 0 indicates if the PCIE limit is GEN1 or GEN2
  • bit 1 indicates if the Pstate is overclocked or not
  • bit 2 indicates if the Pstate is overclockable or not
  • all other bits must be set to 0

bit 0 indicates if this clock is overclockable all other bits must be set to 0

◆ [] [8/30]

NvU32 { ... } ::flags
  • bit 0 indicates if the PCIE limit is GEN1 or GEN2
  • bit 1 indicates if the Pstate is overclocked or not
  • bit 2 indicates if the Pstate is overclockable or not
  • all other bits must be set to 0

◆ [] [9/30]

NvU32 { ... } ::flags

bit 0 indicates if this clock is overclockable all other bits must be set to 0

◆ [] [10/30]

NvU32 { ... } ::flags

Reserved for future use. Must be set to 0.

◆ flags [11/30]

NvU32 NV_GPU_DYNAMIC_PSTATES_INFO_EX::flags

bit 0 indicates if the dynamic Pstate is enabled or not

◆ flags [12/30]

NvU32 NvAPI_D3D11_CREATE_FASTGS_EXPLICIT_DESC_V1::flags

◆ flags [13/30]

NvU32 NVAPI_D3D12_PSO_CREATE_FASTGS_EXPLICIT_DESC_V1::flags

◆ Flags

NvU64 NV_META_COMMAND_TENSOR_DESC::Flags

◆ flags [14/30]

NvU32 _NV_VRS_HELPER_LATCH_GAZE_PARAMS_V1::flags

(IN) Reserved for future use

◆ flags [15/30]

NvU32 _NV_FOVEATED_RENDERING_DESC_V1::flags

(IN) Reserved for future use

◆ flags [16/30]

NvU32 _NV_VRS_HELPER_ENABLE_PARAMS_V1::flags

(IN) Reserved for future use

◆ flags [17/30]

NvU32 _NV_VRS_HELPER_INIT_PARAMS_V1::flags

(IN) Reserved for future use

◆ flags [18/30]

NvU32 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::flags

(IN) Reserved for future use

◆ flags [19/30]

NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V2::flags

(IN) Reserved for future use

◆ flags [20/30]

NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V1::flags

(IN) Reserved for future use

◆ flags [21/30]

NvU32 _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::flags

(IN) Flags, if any

◆ flags [22/30]

NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::flags

[in] reserved, set to 0

◆ flags [23/30]

NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_BUILD_FLAGS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::flags

Flags which apply to all DMMs in the array.

◆ flags [24/30]

NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_BUILD_FLAGS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::flags

Flags which apply to all OMMs in the array.

◆ flags [25/30]

NvU32 _NVAPI_D3D12_SET_CREATE_PIPELINE_STATE_OPTIONS_PARAMS_V1::flags

[in] A bitwise OR of one or more NVAPI_D3D12_PIPELINE_CREATION_STATE_FLAGS flags for raytracing pipeline creation.

◆ flags [26/30]

D3D12_RAYTRACING_GEOMETRY_FLAGS _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::flags

Flags affecting how this geometry is processed by the raytracing pipeline.

◆ flags [27/30]

NVAPI_D3D12_RAYTRACING_ACCELERATION_STRUCTURE_BUILD_FLAGS_EX _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::flags

Options influencing how the acceleration structure is built and which of its features can be used.

◆ flags [28/30]

NvU32 NV_CHIPSET_INFO_v4::flags

Chipset info flags - obsolete.

◆ flags [29/30]

NvU32 NV_CHIPSET_INFO_v3::flags

Chipset info flags - obsolete.

◆ flags [30/30]

NvU32 NV_CHIPSET_INFO_v2::flags

Chipset info flags.

◆ flagsRsvd

NvU32 _NV_SET_REFLEX_SYNC_PARAMS::flagsRsvd

(IN) Reserved flag bits. Must be set to 0s.

◆ FlipInSyncCount

NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::FlipInSyncCount

The total count of flips from this client since the returned SyncMode is PRESENT_BARRIER_SYNC_SYSTEM or PRESENT_BARRIER_SYNC_CLUSTER. If the returned SyncMode is any other mode, this value is 0. This count is set back to 0 in case the SyncMode switches away from PRESENT_BARRIER_SYNC_SYSTEM or PRESENT_BARRIER_SYNC_CLUSTER.

◆ flipQueueLength [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::flipQueueLength

Number of buffers used for the internal flipqueue.

◆ flipQueueLength [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::flipQueueLength

Number of buffers used for the internal flip queue.

◆ flipQueueLength [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::flipQueueLength

Number of buffers used for the internal flip queue.

◆ fMiddleRadii

float _NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1::fMiddleRadii[2]

(IN) Horizontal and vertical radius for the middle region of the foveated rendering pattern

◆ forcedDockMechanismPresent

NvU32 NV_LID_DOCK_PARAMS::forcedDockMechanismPresent

◆ forcedLidMechanismPresent

NvU32 NV_LID_DOCK_PARAMS::forcedLidMechanismPresent

◆ ForcedSampleCount [1/2]

NvU32 NvAPI_D3D11_RASTERIZER_DESC_EX::ForcedSampleCount

◆ ForcedSampleCount [2/2]

NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::ForcedSampleCount

◆ ForceFastGS [1/2]

BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::ForceFastGS

◆ ForceFastGS [2/2]

BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::ForceFastGS

◆ Format

DXGI_FORMAT _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::Format

(IN) Format of the resource used as Shading Rate Surface. Should be either DXGI_FORMAT_R8_UINT or DXGI_FORMAT_R8_TYPELESS

◆ format [1/4]

NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_FORMAT _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT::format

Displacement Micromap format.

◆ format [2/4]

NvU16 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DESC::format

Format of the DMM of type NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_FORMAT.

◆ format [3/4]

NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_FORMAT _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT::format

Opacity Micromap format.

◆ format [4/4]

NvU16 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_DESC::format

Format of the OMM of type NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_FORMAT.

◆ FoveationPatternCustomPresetDesc

NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1 _NV_FOVEATED_RENDERING_DESC_V1::FoveationPatternCustomPresetDesc

(IN) To be provided only if FoveationPatternPreset is NV_FOVEATED_RENDERING_FOVEATION_PATTERN_PRESET_CUSTOM

◆ FoveationPatternPreset

NV_FOVEATED_RENDERING_FOVEATION_PATTERN_PRESET _NV_FOVEATED_RENDERING_DESC_V1::FoveationPatternPreset

(IN) Preset of the foveation pattern

◆ fPeripheralRadii

float _NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1::fPeripheralRadii[2]

(IN) Horizontal and vertical radius for the peripheral region of the foveated rendering pattern

◆ fPupilDiameter_mm

float _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::fPupilDiameter_mm

(IN) Use flag NV_GAZE_PUPIL_DIAMETER_VALID. Unused at the moment.

◆ frameID [1/3]

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::frameID

◆ frameID [2/3]

NvU64 _NV_LATENCY_MARKER_PARAMS::frameID

◆ frameID [3/3]

NvU64 _NV_ASYNC_FRAME_MARKER_PARAMS_V1::frameID

◆ frameIntervalUs [1/2]

NvU32 _NV_GET_VIRTUAL_REFRESH_RATE_DATA_V1::frameIntervalUs

[out] frame interval in micro seconds if Virtual RR is currently applied

◆ frameIntervalUs [2/2]

NvU32 _NV_SET_VIRTUAL_REFRESH_RATE_DATA_V1::frameIntervalUs

[in] frame interval in micro seconds if Virtual RR is currently applied

◆ frameLockEnable [1/4]

NvU32 _NVVIOOUTPUTSTATUS::frameLockEnable

Framelock enable flag.

◆ frameLockEnable [2/4]

NvU32 _NVVIOOUTPUTCONFIG_V1::frameLockEnable

Flag indicating whether framelock was on/off.

◆ frameLockEnable [3/4]

NvU32 _NVVIOOUTPUTCONFIG_V2::frameLockEnable

Flag indicating whether framelock was on/off.

◆ frameLockEnable [4/4]

NvU32 _NVVIOOUTPUTCONFIG_V3::frameLockEnable

Flag indicating whether framelock was on/off.

◆ frameReport

struct _NV_LATENCY_RESULT_PARAMS::FrameReport _NV_LATENCY_RESULT_PARAMS::frameReport[64]

◆ [] [1/6]

NvU32 { ... } ::freq

Clock frequency in kHz.

◆ freq [2/6]

NvU32 NV_GPU_PERF_PSTATES_INFO_V1::freq

Clock frequency in kHz.

◆ freq [3/6]

NvU32 NV_GPU_PERF_PSTATES_INFO_V2::freq

◆ [] [4/6]

NvU32 { ... } ::freq

◆ freq [5/6]

NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::freq

Display frequency.

◆ freq [6/6]

NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::freq

Display frequency.

◆ [] [1/2]

NvU32 { ... } ::freq_kHz

Clock frequency within given pstate in (kHz)

◆ freq_kHz [2/2]

NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::freq_kHz

Clock frequency within given pstate in (kHz)

◆ freqDelta_kHz

NV_GPU_PERF_PSTATES20_PARAM_DELTA NV_GPU_PSTATE20_CLOCK_ENTRY_V1::freqDelta_kHz

Current frequency delta from nominal settings in (kHz)

◆ frequency [1/4]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V1::frequency

Clock frequency (kHz)

◆ [] [2/4]

NvU32 { ... } ::frequency

Clock frequency (kHz)

◆ [] [3/4]

NvU32 { ... } ::frequency

Clock frequency (kHz)

◆ frequency [4/4]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::frequency

Clock frequency (kHz)

◆ fReserved

float _NV_MODIFIED_W_COEFFICIENTS::fReserved[2]

◆ FrontCounterClockwise

BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::FrontCounterClockwise

◆ [] [1/2]

NvU16 { ... } ::full_frame_peak_luminance_index

Full frame peak luminance index.

◆ full_frame_peak_luminance_index [2/2]

NvU16 _NV_HDR_CAPABILITIES_V3::full_frame_peak_luminance_index

Full frame peak luminance index.

◆ function

NvU16 NVLINK_DEVICE_INFO_V1::function

◆ Function

NvU64 NV_META_COMMAND_ACTIVATION_DESC::Function

◆ FuseDesc

NV_META_COMMAND_CONVOLUTION_FUSE_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_FUSED_DESC::FuseDesc

◆ Future10

NvU32 NV_INFOFRAME_AUDIO::Future10

◆ Future12

NvU32 NV_INFOFRAME_AUDIO::Future12

◆ Future17

NvU32 NV_INFOFRAME_VIDEO::Future17

◆ Future2x

NvU32 NV_INFOFRAME_AUDIO::Future2x

◆ Future3x

NvU32 NV_INFOFRAME_AUDIO::Future3x

◆ Future47

NvU32 NV_INFOFRAME_VIDEO::Future47

◆ Future52

NvU32 NV_INFOFRAME_AUDIO::Future52

◆ Future6

NvU32 NV_INFOFRAME_AUDIO::Future6

◆ Future7

NvU32 NV_INFOFRAME_AUDIO::Future7

◆ Future8

NvU32 NV_INFOFRAME_AUDIO::Future8

◆ Future9

NvU32 NV_INFOFRAME_AUDIO::Future9

◆ fVericalFOV [1/2]

float _NV_GAZE_HANDLER_INIT_PARAMS_V2::fVericalFOV

(IN) Vertical Field of View

◆ fVericalFOV [2/2]

float _NV_GAZE_HANDLER_INIT_PARAMS_V1::fVericalFOV

(IN) Vertical Field of View

◆ gammaCorrection [1/3]

NVVIOGAMMACORRECTION _NVVIOOUTPUTCONFIG_V1::gammaCorrection

◆ gammaCorrection [2/3]

NVVIOGAMMACORRECTION _NVVIOOUTPUTCONFIG_V2::gammaCorrection

◆ gammaCorrection [3/3]

NVVIOGAMMACORRECTION _NVVIOOUTPUTCONFIG_V3::gammaCorrection

◆ [union]

union { ... } _NVVIOGAMMACORRECTION::gammaRamp

Gamma correction:

◆ [] [1/2]

NVVIOGAMMARAMP10 { ... } ::gammaRamp10

Gamma ramp (10-bit index, 16-bit values)

◆ gammaRamp10 [2/2]

NVVIOGAMMARAMP10 _NVVIOGAMMACORRECTION::gammaRamp10

Gamma ramp (10-bit index, 16-bit values)

◆ [] [1/2]

NVVIOGAMMARAMP8 { ... } ::gammaRamp8

Gamma ramp (8-bit index, 16-bit values)

◆ gammaRamp8 [2/2]

NVVIOGAMMARAMP8 _NVVIOGAMMACORRECTION::gammaRamp8

Gamma ramp (8-bit index, 16-bit values)

◆ GazeDataDeviceId [1/3]

NvU32 _NV_FOVEATED_RENDERING_DESC_V1::GazeDataDeviceId

(IN) ID of the gaze data provider. Needed only for supporting more than one device with eye tracking.

◆ GazeDataDeviceId [2/3]

NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V2::GazeDataDeviceId

(IN) ID of the gaze data provider. Needed only for supporting more than one device with eye tracking.

◆ GazeDataDeviceId [3/3]

NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V1::GazeDataDeviceId

(IN) ID of the gaze data provider. Needed only for supporting more than one device with eye tracking.

◆ GazeDataType [1/2]

NV_GAZE_DATA_TYPE _NV_GAZE_HANDLER_INIT_PARAMS_V2::GazeDataType

(IN) Describes whether gaze is Mono or Stereo

◆ GazeDataType [2/2]

NV_GAZE_DATA_TYPE _NV_GAZE_HANDLER_INIT_PARAMS_V1::GazeDataType

(IN) Describes whether gaze is Mono or Stereo

◆ GazeDataValidityFlags

NvU32 _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::GazeDataValidityFlags

(IN) To be populated with OR'ing flags from NV_GAZE_DATA_VALIDITY_FLAGS

◆ geforce

NvU32 _NVDRS_GPU_SUPPORT::geforce

◆ geometryDescStrideInBytes

NvU32 _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::geometryDescStrideInBytes

Stride between consecutive geometry descriptors. Should typically be set to sizeof(NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX). Only used if type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_TYPE_BOTTOM_LEVEL and descLayout is D3D12_ELEMENTS_LAYOUT_ARRAY. This field guarantees backwards compatibility, even if the geometry descriptor size increases in future NVAPI versions.

◆ gpioPinBlue

NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW::gpioPinBlue

Blue drive GPIO pin.

◆ gpioPinGreen

NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW::gpioPinGreen

Green drive GPIO pin.

◆ gpioPinRed

NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW::gpioPinRed

Red drive GPIO pin.

◆ gpioPinSingleColor

NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_SINGLE_COLOR::gpioPinSingleColor

Single Color GPIO pin.

◆ gpioPinWhite

NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW::gpioPinWhite

White drive GPIO pin.

◆ [] [1/2]

NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW { ... } ::gpioPwmRgbwv10

◆ gpioPwmRgbwv10 [2/2]

NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_RGBW _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::gpioPwmRgbwv10

◆ [] [1/2]

NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_SINGLE_COLOR { ... } ::gpioPwmSingleColorv10

◆ gpioPwmSingleColorv10 [2/2]

NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_GPIO_PWM_SINGLE_COLOR _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::gpioPwmSingleColorv10

◆ gpuActiveRenderTimeUs

NvU32 _NV_LATENCY_RESULT_PARAMS::FrameReport::gpuActiveRenderTimeUs

(OUT) Difference between gpuRenderStartTime and gpuRenderEndTime, excluding the idles in between, in microseconds.

◆ gpuCount [1/2]

NvU32 NV_COMPUTE_GPU_TOPOLOGY_V1::gpuCount

Total number of compute-capable GPUs.

◆ gpuCount [2/2]

NvU32 _NV_COMPUTE_GPU_TOPOLOGY_V2::gpuCount

Size of array.

◆ gpuFrameTimeUs

NvU32 _NV_LATENCY_RESULT_PARAMS::FrameReport::gpuFrameTimeUs

(OUT) Difference between previous and current frame's gpuRenderEndTime, in microseconds.

◆ gpuHandleCount [1/2]

NvU32 _NV_PHYSICAL_GPUS::gpuHandleCount

◆ gpuHandleCount [2/2]

NvU32 _NV_LOGICAL_GPUS::gpuHandleCount

◆ gpuHandleData [1/2]

NV_LOGICAL_GPU_HANDLE_DATA _NV_LOGICAL_GPUS::gpuHandleData[NVAPI_MAX_LOGICAL_GPUS]

◆ gpuHandleData [2/2]

NV_PHYSICAL_GPU_HANDLE_DATA _NV_PHYSICAL_GPUS::gpuHandleData[NVAPI_MAX_PHYSICAL_GPUS]

◆ gpuId

NvU32 NV_DISPLAY_PATH::gpuId

(IN) the physical display/target Gpu id which is the owner of the scan out (for SLI multimon, display from the slave Gpu)

◆ [struct] [1/2]

struct { ... } NV_MOSAIC_TOPO_DETAILS::gpuLayout[NVAPI_MAX_MOSAIC_DISPLAY_ROWS][NVAPI_MAX_MOSAIC_DISPLAY_COLUMNS]

◆ [struct] [2/2]

struct { ... } NV_MOSAIC_TOPOLOGY::gpuLayout[NVAPI_MAX_MOSAIC_DISPLAY_ROWS][NVAPI_MAX_MOSAIC_DISPLAY_COLUMNS]

◆ gpuRenderEndTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::gpuRenderEndTime

◆ gpuRenderStartTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::gpuRenderStartTime

◆ gpuSupport

NVDRS_GPU_SUPPORT _NVDRS_PROFILE_V1::gpuSupport

This read-only flag indicates the profile support on either Quadro, or Geforce, or both.

◆ gpuVASize [1/3]

NvU64 NVAPI_UAV_INFO_V1::gpuVASize

[OUT] virtual memory size

◆ gpuVASize [2/3]

NvU64 NVAPI_UAV_INFO_V2::gpuVASize

[OUT] virtual memory size

◆ gpuVASize [3/3]

NvU64 NV_GET_GPU_VIRTUAL_ADDRESS_V1::gpuVASize

[OUT] virtual memory size

◆ gpuVAStart [1/3]

NvU64 NVAPI_UAV_INFO_V1::gpuVAStart

[OUT] gpu virtual address where resource starts

◆ gpuVAStart [2/3]

NvU64 NVAPI_UAV_INFO_V2::gpuVAStart

[OUT] gpu virtual address where resource starts

◆ gpuVAStart [3/3]

NvU64 NV_GET_GPU_VIRTUAL_ADDRESS_V1::gpuVAStart

[OUT] gpu virtual address where resource starts

◆ gridDim [1/2]

NVAPI_DIM3 _NVAPI_CU_KERNEL_LAUNCH_PARAMS::gridDim

◆ gridDim [2/2]

NVAPI_DIM3 _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::gridDim

◆ GroupCount

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::GroupCount

◆ grpCount

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::grpCount

Number of times to repeat function within group period.

◆ grpIdleTimems

NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::grpIdleTimems

Time in ms to remain idle before next group of repeated function cycles.

◆ h

float NV_VIEWPORTF::h

Height of the viewport.

◆ handle

NvU64 NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::handle

[out] A pointer to memory that receives the driver handle

◆ has3dEntries

NvU8 _NV_MONITOR_CAPS_VSDB::has3dEntries

Byte 10.

◆ hasInterlacedLatencyField

NvU8 _NV_MONITOR_CAPS_VSDB::hasInterlacedLatencyField

Byte 5.

◆ hasLatencyField

NvU8 _NV_MONITOR_CAPS_VSDB::hasLatencyField

Byte 5.

◆ hasVicEntries

NvU8 _NV_MONITOR_CAPS_VSDB::hasVicEntries

Byte 5.

◆ HBdeviceId

NvU32 NV_CHIPSET_INFO_v4::HBdeviceId

Host bridge device identification.

◆ HBorder

NvU16 _NV_TIMING::HBorder

horizontal border

◆ HBsubSysDeviceId

NvU32 NV_CHIPSET_INFO_v4::HBsubSysDeviceId

Host bridge subsystem device identification.

◆ HBsubSysVendorId

NvU32 NV_CHIPSET_INFO_v4::HBsubSysVendorId

Host bridge subsystem vendor identification.

◆ HBvendorId

NvU32 NV_CHIPSET_INFO_v4::HBvendorId

Host bridge vendor identification.

◆ hdcpFuseState

NV_GPU_HDCP_FUSE_STATE NV_GPU_GET_HDCP_SUPPORT_STATUS::hdcpFuseState

Structure version constucted by macro NV_GPU_GET_HDCP_SUPPORT_STATUS.

◆ hdcpKeySource

NV_GPU_HDCP_KEY_SOURCE NV_GPU_GET_HDCP_SUPPORT_STATUS::hdcpKeySource

GPU's HDCP fuse state.

◆ hdcpKeySourceState

NV_GPU_HDCP_KEY_SOURCE_STATE NV_GPU_GET_HDCP_SUPPORT_STATUS::hdcpKeySourceState

GPU's HDCP key source.

◆ hdmi3dLength

NvU8 _NV_MONITOR_CAPS_VSDB::hdmi3dLength

Byte 11.

◆ hdmi_3d

NvU8 _NV_MONITOR_CAPS_VSDB::hdmi_3d[31]

Keeping maximum length for 5 bits.

◆ hdmi_vic

NvU8 _NV_MONITOR_CAPS_VSDB::hdmi_vic[7]

Keeping maximum length for 3 bits.

◆ hdmiVicLength

NvU8 _NV_MONITOR_CAPS_VSDB::hdmiVicLength

Byte 11.

◆ [struct]

struct { ... } _NV_HDR_CAPABILITIES_V3::hdr10plus_vsvdb

◆ hdrBpc

NV_BPC _NV_HDR_COLOR_DATA_V2::hdrBpc

Optional, One of NV_BPC enum values, if set it will apply requested color depth Dolby Vision mode: DV supports specific combinations of colorformat, dynamic range and bpc. Please refer Dolby Vision specification. If invalid or no combination is passed driver will force default combination of RGB format + full range + 8bpc. HDR mode: These fields are ignored in hdr mode

◆ hdrColorFormat

NV_COLOR_FORMAT _NV_HDR_COLOR_DATA_V2::hdrColorFormat

Optional, One of NV_COLOR_FORMAT enum values, if set it will apply requested color format for HDR session.

◆ hdrDynamicRange

NV_DYNAMIC_RANGE _NV_HDR_COLOR_DATA_V2::hdrDynamicRange

Optional, One of NV_DYNAMIC_RANGE enum values, if set it will apply requested dynamic range for HDR session.

◆ hdrMode [1/2]

NV_HDR_MODE _NV_HDR_COLOR_DATA_V1::hdrMode

HDR mode.

◆ hdrMode [2/2]

NV_HDR_MODE _NV_HDR_COLOR_DATA_V2::hdrMode

HDR mode.

◆ height [1/9]

NvU32 NV_DISPLAY_PATH::height

(IN) Height of the mode

◆ height [2/9]

NvU32 _NV_RESOLUTION::height

◆ height [3/9]

NvU32 NV_SCANOUT_INTENSITY_DATA_V1::height

height of the input texture

◆ height [4/9]

NvU32 NV_SCANOUT_INTENSITY_DATA_V2::height

height of the input texture

◆ height [5/9]

NvU32 _NV_TIMING_INPUT::height

Visible vertical size.

◆ height [6/9]

NvU32 NV_CUSTOM_DISPLAY::height

Source surface(source mode) height.

◆ height [7/9]

NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::height

Per-display height.

◆ height [8/9]

NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::height

Per-display height.

◆ height [9/9]

NvU32 _NVVIOOUTPUTREGION::height

Height of region in pixels.

◆ HFrontPorch

NvU16 _NV_TIMING::HFrontPorch

horizontal front porch

◆ hFunction [1/2]

NVDX_ObjectHandle _NVAPI_CU_KERNEL_LAUNCH_PARAMS::hFunction

◆ hFunction [2/2]

NVDX_ObjectHandle _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::hFunction

◆ highestNciVersion

NvU8 NVLINK_GET_CAPS_V1::highestNciVersion

This field specifies the highest supported NCI version for this GPU.

◆ highestNvlinkVersion

NvU8 NVLINK_GET_CAPS_V1::highestNvlinkVersion

This field specifies the highest supported NVLink version for this GPU.

◆ hLinkedSurface

NVDX_ObjectHandle _NV_DX_VIDEO_STEREO_INFO::hLinkedSurface

The linked surface (must be valid when eFormat==NV_STEREO_VIDEO_FORMAT_TWO_FRAMES_LR)

◆ hLogicalGPU

NvLogicalGpuHandle NV_MOSAIC_TOPO_DETAILS::hLogicalGPU

Logical GPU for this topology.

◆ hLogicalGpu

NvLogicalGpuHandle _NV_LOGICAL_GPU_HANDLE_DATA::hLogicalGpu

◆ horizontalDelay

NvU32 _NVVIOSYNCDELAY::horizontalDelay

Horizontal delay in pixels.

◆ horizontalPixels

NvU32 _NVVIOVIDEOMODE::horizontalPixels

Horizontal resolution (in pixels)

◆ hotkey

UINT NVAPI_ANSEL_FEATURE_CONFIGURATION_STRUCT::hotkey

An optional virtual key associated with this feature.

◆ hotkeyModifier

NVAPI_ANSEL_HOTKEY_MODIFIER NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::hotkeyModifier

Modifier key to use in hotkey combination.

◆ hour

NvU16 _NV_LICENSE_EXPIRY_DETAILS::hour

Hour value of license expiry.

◆ houseSyncIncoming [1/2]

NvU32 _NV_GSYNC_STATUS_PARAMS_V1::houseSyncIncoming

Incoming house sync frequency in Hz.

◆ houseSyncIncoming [2/2]

NvU32 _NV_GSYNC_STATUS_PARAMS_V2::houseSyncIncoming

Incoming house sync frequency in Hz.

◆ hPhysicalGpu [1/9]

NvPhysicalGpuHandle NV_COMPUTE_GPU_TOPOLOGY_V1::hPhysicalGpu

Compute-capable physical GPU handle.

◆ [] [2/9]

NvPhysicalGpuHandle { ... } ::hPhysicalGpu

Compute-capable physical GPU handle.

◆ hPhysicalGpu [3/9]

NvPhysicalGpuHandle _NV_COMPUTE_GPU::hPhysicalGpu

Compute-capable physical GPU handle.

◆ hPhysicalGpu [4/9]

NvPhysicalGpuHandle _NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM_V1::hPhysicalGpu

The handle of the GPU that you are checking for the specified attribute. note that this is the GPU that is managing the attribute. Only a single GPU can manage an given attribute on a given HW element, regardless of how many are attatched. I.E. only one GPU will be used to control the brightness of the LED on an SLI bridge, regardless of how many are physicaly attached. You enumerate thru the GPUs with this call to determine which GPU is managing the attribute.

◆ hPhysicalGpu [5/9]

NvPhysicalGpuHandle _NV_GPU_GET_ILLUMINATION_PARM_V1::hPhysicalGpu

The handle of the GPU that you are checking for the specified attribute. Note that this is the GPU that is managing the attribute. Only a single GPU can manage an given attribute on a given HW element, regardless of how many are attatched. I.E. only one GPU will be used to control the brightness of the LED on an SLI bridge, regardless of how many are physicaly attached. You enumerate thru the GPUs with this call to determine which GPU is managing the attribute.

◆ hPhysicalGpu [6/9]

NvPhysicalGpuHandle _NV_GPU_SET_ILLUMINATION_PARM_V1::hPhysicalGpu

The handle of the GPU that you are checking for the specified attribute. Note that this is the GPU that is managing the attribute. Only a single GPU can manage an given attribute on a given HW element, regardless of how many are attatched. I.E. only one GPU will be used to control the brightness of the LED on an SLI bridge, regardless of how many are physicaly attached. You enumerate thru the GPUs with this call to determine which GPU is managing the attribute.

◆ [] [1/4]

NvPhysicalGpuHandle { ... } ::hPhysicalGPU

Physical GPU to be used in the topology (0 if GPU missing)

◆ hPhysicalGPU [2/4]

NvPhysicalGpuHandle NV_MOSAIC_TOPO_DETAILS::hPhysicalGPU

Physical GPU to be used in the topology (0 if GPU missing)

◆ [] [3/4]

NvPhysicalGpuHandle { ... } ::hPhysicalGPU

Physical GPU to be used in the topology.

◆ hPhysicalGPU [4/4]

NvPhysicalGpuHandle NV_MOSAIC_TOPOLOGY::hPhysicalGPU

Physical GPU to be used in the topology.

◆ hPhysicalGpu [7/9]

NvPhysicalGpuHandle _NV_GSYNC_GPU::hPhysicalGpu

GPU handle.

◆ hPhysicalGpu [8/9]

NvPhysicalGpuHandle NVVIOTOPOLOGYTARGET::hPhysicalGpu

Handle to Physical GPU (This could be NULL for GVI device if its not binded)

◆ hPhysicalGpu [9/9]

NvPhysicalGpuHandle _NV_PHYSICAL_GPU_HANDLE_DATA::hPhysicalGpu

◆ hProxyPhysicalGpu

NvPhysicalGpuHandle _NV_GSYNC_GPU::hProxyPhysicalGpu

GPU through which hPhysicalGpu is connected to the Sync device (if not directly connected)

  • this is NULL otherwise

◆ hResource

NVDX_ObjectHandle NV_GET_GPU_VIRTUAL_ADDRESS_V1::hResource

[IN]

◆ hShader

NVDX_ObjectHandle NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::hShader

[out] variable that receives the handle to the created shader.

◆ hSurface

NVDX_ObjectHandle _NV_DX_VIDEO_STEREO_INFO::hSurface

The surface whose stereo format is to be set.

◆ HSyncPol

NvU8 _NV_TIMING::HSyncPol

horizontal sync polarity: 1-negative, 0-positive

◆ HSyncWidth

NvU16 _NV_TIMING::HSyncWidth

horizontal sync width

◆ HTotal

NvU16 _NV_TIMING::HTotal

horizontal total

◆ hVioHandle

NvVioHandle NVVIOTOPOLOGYTARGET::hVioHandle

handle to SDI Input/Output device

◆ HVisible

NvU16 _NV_TIMING::HVisible

horizontal visible

◆ hwModeSetOnly

NvU32 NV_CUSTOM_DISPLAY::hwModeSetOnly

If set, it means a hardware modeset without OS update.

◆ i2cDevAddress [1/3]

NvU8 NV_I2C_INFO_V1::i2cDevAddress

The address of the I2C slave. The address should be shifted left by one. For example, the I2C address 0x50, often used for reading EDIDs, would be stored here as 0xA0. This matches the position within the byte sent by the master, as the last bit is reserved to specify the read or write direction.

◆ i2cDevAddress [2/3]

NvU8 NV_I2C_INFO_V2::i2cDevAddress

The address of the I2C slave. The address should be shifted left by one. For example, the I2C address 0x50, often used for reading EDIDs, would be stored here as 0xA0. This matches the position within the byte sent by the master, as the last bit is reserved to specify the read or write direction.

◆ i2cDevAddress [3/3]

NvU8 NV_I2C_INFO_V3::i2cDevAddress

The address of the I2C slave. The address should be shifted left by one. For example, the I2C address 0x50, often used for reading EDIDs, would be stored here as 0xA0. This matches the position within the byte sent by the master, as the last bit is reserved to specify the read or write direction.

◆ i2cDevIdx

NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_MCUV10::i2cDevIdx

I2C Device Index: Pointing to the illumination device in I2C Devices Table.

◆ i2cSpeed [1/3]

NvU32 NV_I2C_INFO_V1::i2cSpeed

The target speed of the transaction (between 28Kbps to 40Kbps; not guaranteed).

◆ i2cSpeed [2/3]

NvU32 NV_I2C_INFO_V2::i2cSpeed

Deprecated, Must be set to NVAPI_I2C_SPEED_DEPRECATED.

◆ i2cSpeed [3/3]

NvU32 NV_I2C_INFO_V3::i2cSpeed

Deprecated, Must be set to NVAPI_I2C_SPEED_DEPRECATED.

◆ i2cSpeedKhz [1/2]

NV_I2C_SPEED NV_I2C_INFO_V2::i2cSpeedKhz

The target speed of the transaction in (kHz) (Chosen from the enum NV_I2C_SPEED).

◆ i2cSpeedKhz [2/2]

NV_I2C_SPEED NV_I2C_INFO_V3::i2cSpeedKhz

The target speed of the transaction in (kHz) (Chosen from the enum NV_I2C_SPEED).

◆ Id

GUID NVAPI_META_COMMAND_DESC::Id

◆ id

NvU32 _NV_MODIFIED_W_PARAMS::id

◆ illumDeviceIdx

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::illumDeviceIdx

Index pointing to an Illumination Device that controls this zone.

◆ immersiveGaming [1/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::immersiveGaming

Enable as immersive gaming instead of Mosaic SLI (for Quadro-boards only)

◆ immersiveGaming [2/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::immersiveGaming

Enable as immersive gaming instead of Mosaic SLI (for Quadro-boards only)

◆ implementation [1/3]

NvU32 NV_GPU_ARCH_INFO_V1::implementation

◆ implementation [2/3]

NvU32 NV_GPU_ARCH_INFO_V2::implementation

implementation and implementation_id are the same. The former is NvU32 while the latter is an enum made for readability.

◆ [] [3/3]

NvU32 { ... } ::implementation

implementation and implementation_id are the same. The former is NvU32 while the latter is an enum made for readability.

◆ implementation_id [1/2]

NV_GPU_ARCH_IMPLEMENTATION_ID NV_GPU_ARCH_INFO_V2::implementation_id

specifies the implementation of the architecture for the GPU.

◆ [] [2/2]

NV_GPU_ARCH_IMPLEMENTATION_ID { ... } ::implementation_id

specifies the implementation of the architecture for the GPU.

◆ inConfig [1/6]

NVVIOINPUTCONFIG _NVVIOCONFIG_V1::inConfig

Input device configuration.

◆ [] [2/6]

NVVIOINPUTCONFIG { ... } ::inConfig

Input device configuration.

◆ inConfig [3/6]

NVVIOINPUTCONFIG _NVVIOCONFIG_V2::inConfig

Input device configuration.

◆ [] [4/6]

NVVIOINPUTCONFIG { ... } ::inConfig

Input device configuration.

◆ inConfig [5/6]

NVVIOINPUTCONFIG _NVVIOCONFIG_V3::inConfig

Input device configuration.

◆ [] [6/6]

NVVIOINPUTCONFIG { ... } ::inConfig

Input device configuration.

◆ independentViewportMaskEnable

NvU8 _NV_MULTIVIEW_PARAMS_V1::independentViewportMaskEnable

◆ [union]

union { ... } NV_INFOFRAME_DATA::infoframe

◆ infoType [1/3]

NvU32 _NV_MONITOR_CAPABILITIES_V1::infoType

◆ infoType [2/3]

NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_TYPE _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_DESC::infoType

Type of postbuild information to retrieve.

◆ infoType [3/3]

NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_TYPE _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_DESC::infoType

Type of postbuild information to retrieve.

◆ InitializationDirtyState

NV_D3D_GRAPHICS_STATES NVAPI_META_COMMAND_DESC::InitializationDirtyState

◆ InnerMostRegionShadingRate

NV_PIXEL_SHADING_RATE _NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1::InnerMostRegionShadingRate

(IN) Shading Rate for the inner-most region of the foveated rendering pattern

◆ inputBuffer [1/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::inputBuffer

Address for raw DMM input data; it must be 256-byte aligned (NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_BYTE_ALIGNMENT) It is recommended to try to organize DMMs together in memory that are expected to be used close together spatially.

◆ inputBuffer [2/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::inputBuffer

Address for raw OMM input data; it must be 256-byte aligned. It is recommended to try to organize OMMs together in memory that are expected to be used close together spatially.

◆ InputResource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::InputResource

◆ InputResource [2/2]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::InputResource

◆ inputs [1/3]

NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_DESC::inputs

Description of the input data for the OMM Array build.

◆ inputs [2/3]

NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_DESC::inputs

Description of the input data for the DMM Array build.

◆ inputs [3/3]

NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX::inputs

The inputs to the build process.

◆ inputSampleTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::inputSampleTime

◆ instanceDescs [1/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::instanceDescs

If type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_TOP_LEVEL, the referenced instance structures can used the extended set of flags NVAPI_D3D12_RAYTRACING_INSTANCE_FLAGS_EX in place of the D3D12_RAYTRACING_INSTANCE_FLAGS mentioned in D3D12_RAYTRACING_INSTANCE_DESC. Otherwise, this parameter is unused (space repurposed in a union).

◆ [] [2/2]

D3D12_GPU_VIRTUAL_ADDRESS { ... } ::instanceDescs

If type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_TOP_LEVEL, the referenced instance structures can used the extended set of flags NVAPI_D3D12_RAYTRACING_INSTANCE_FLAGS_EX in place of the D3D12_RAYTRACING_INSTANCE_FLAGS mentioned in D3D12_RAYTRACING_INSTANCE_DESC. Otherwise, this parameter is unused (space repurposed in a union).

◆ inStatus [1/2]

NVVIOINPUTSTATUS _NVVIOSTATUS::inStatus

Input device status.

◆ [] [2/2]

NVVIOINPUTSTATUS { ... } ::inStatus

Input device status.

◆ [] [1/4]

NvU32 { ... } ::interface_supported_by_sink

Indicates the interface (standard or low latency) supported by the sink.

◆ interface_supported_by_sink [2/4]

NvU32 _NV_HDR_CAPABILITIES_V2::interface_supported_by_sink

Indicates the interface (standard or low latency) supported by the sink.

◆ interface_supported_by_sink [3/4]

NvU32 _NV_HDR_CAPABILITIES_V3::interface_supported_by_sink

Indicates the interface (standard or low latency) supported by the sink.

◆ [] [4/4]

NvU32 { ... } ::interface_supported_by_sink

Indicates the interface (standard or low latency) supported by the sink.

◆ interlaced [1/3]

NvU16 _NV_TIMING::interlaced

1-interlaced, 0-progressive

◆ interlaced [2/3]

NvU32 NV_DISPLAY_PATH::interlaced

(IN) Interlaced mode flag

◆ interlaced [3/3]

NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::interlaced

(IN) Interlaced mode flag, ignored if refreshRate == 0

◆ interlacedAudioLatency

NvU8 _NV_MONITOR_CAPS_VSDB::interlacedAudioLatency

Byte 9.

◆ interlacedVideoLatency

NvU8 _NV_MONITOR_CAPS_VSDB::interlacedVideoLatency

Byte 8.

◆ interlaceMode [1/3]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::interlaceMode

interlace mode for a Sync device

◆ interlaceMode [2/3]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::interlaceMode

interlace mode for a Sync device

◆ interlaceMode [3/3]

NVVIOINTERLACEMODE _NVVIOVIDEOMODE::interlaceMode

Interlace mode.

◆ InterleavedSampling

BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::InterleavedSampling

◆ InterleavedSamplingEnable [1/2]

bool NvAPI_D3D11_RASTERIZER_DESC_EX::InterleavedSamplingEnable

◆ InterleavedSamplingEnable [2/2]

bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::InterleavedSamplingEnable

◆ interval [1/2]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::interval

Number of pulses to wait between framelock signal generation.

◆ interval [2/2]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::interval

Number of pulses to wait between framelock signal generation.

◆ is10BPCSupported

NvU32 _NV_DISPLAY_PORT_INFO_V1::is10BPCSupported

If 10 bpc is supported.

◆ is10BPCSupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::is10BPCSupportedOnCurrentMode

◆ is12BPCSupported

NvU32 _NV_DISPLAY_PORT_INFO_V1::is12BPCSupported

If 12 bpc is supported.

◆ is12BPCSupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::is12BPCSupportedOnCurrentMode

◆ is16BPCSupported

NvU32 _NV_DISPLAY_PORT_INFO_V1::is16BPCSupported

If 16 bpc is supported.

◆ is16BPCSupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::is16BPCSupportedOnCurrentMode

◆ is6BPCSupported

NvU32 _NV_DISPLAY_PORT_INFO_V1::is6BPCSupported

If 6 bpc is supported.

◆ is6BPCSupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::is6BPCSupportedOnCurrentMode

◆ is8BPCSupported

NvU32 _NV_DISPLAY_PORT_INFO_V1::is8BPCSupported

If 8 bpc is supported.

◆ is8BPCSupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::is8BPCSupportedOnCurrentMode

◆ isAcquired

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::isAcquired

[out] If bit is set, this display has been acquired by another process through NvAPI_DISP_AcquireDedicatedDisplay().

◆ isActive

NvU32 _NV_GPU_DISPLAYIDS::isActive

if bit is set then this display is being actively driven

◆ isChromaLpfOff

NvU32 NV_DISPLAY_PORT_CONFIG::isChromaLpfOff

Force the chroma low_pass_filter to be off.

◆ isCluster

NvU32 _NV_GPU_DISPLAYIDS::isCluster

if bit is set then this display is the representative display

◆ isColorCtrlSupported

NvU32 _NV_DISPLAY_PORT_INFO_V1::isColorCtrlSupported

If the color format change is supported.

◆ isCommandLine [1/2]

NvU32 _NVDRS_APPLICATION_V3::isCommandLine

Command line parsing for the application name.

◆ isCommandLine [2/2]

NvU32 _NVDRS_APPLICATION_V4::isCommandLine

Command line parsing for the application name.

◆ isConnected

NvU32 _NV_GPU_DISPLAYIDS::isConnected

if bit is set, then this display is connected

◆ isCurrentPredefined

NvU32 _NVDRS_SETTING_V1::isCurrentPredefined

It is different than 0 if the currentValue is a predefined Value, 0 if the currentValue is a user value.

◆ isDitherOff

NvU32 NV_DISPLAY_PORT_CONFIG::isDitherOff

Force to turn off dither.

◆ isDolbyVisionSupported [1/2]

NvU32 _NV_HDR_CAPABILITIES_V2::isDolbyVisionSupported

Dolby Vision Support. Boolean: 0 = not supported, 1 = supported;.

◆ isDolbyVisionSupported [2/2]

NvU32 _NV_HDR_CAPABILITIES_V3::isDolbyVisionSupported

Dolby Vision Support. Boolean: 0 = not supported, 1 = supported;.

◆ isDp

NvU32 _NV_DISPLAY_PORT_INFO_V1::isDp

If the monitor is driven by a DisplayPort.

◆ isDynamic

NvU32 _NV_GPU_DISPLAYIDS::isDynamic

if bit is set then this display is part of MST topology and it's a dynamic

◆ isEdrSupported [1/3]

NvU32 _NV_HDR_CAPABILITIES_V1::isEdrSupported

Extended Dynamic Range on SDR displays. Boolean: 0 = not supported, 1 = supported;.

◆ isEdrSupported [2/3]

NvU32 _NV_HDR_CAPABILITIES_V2::isEdrSupported

Extended Dynamic Range on SDR displays. Boolean: 0 = not supported, 1 = supported;.

◆ isEdrSupported [3/3]

NvU32 _NV_HDR_CAPABILITIES_V3::isEdrSupported

Extended Dynamic Range on SDR displays. Boolean: 0 = not supported, 1 = supported;.

◆ isEnabled [1/6]

NvU32 NV_GPU_ECC_STATUS_INFO::isEnabled

Active ECC memory setting.

◆ isEnabled [2/6]

NvU32 NV_GPU_ECC_CONFIGURATION_INFO::isEnabled

Structure version.

◆ isEnabled [3/6]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V1::isEnabled

The current state of the licensed feature, true=enabled, false=disabled.

◆ isEnabled [4/6]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V2::isEnabled

The current state of the licensed feature, true=enabled, false=disabled.

◆ isEnabled [5/6]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V3::isEnabled

The current state of license, true=licensed, false=unlicensed.

◆ isEnabled [6/6]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V4::isEnabled

The current state of license, true=licensed, false=unlicensed.

◆ isEnabledByDefault

NvU32 NV_GPU_ECC_CONFIGURATION_INFO::isEnabledByDefault

Current ECC configuration stored in non-volatile memory.

◆ isFeatureEnabled [1/2]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V3::isFeatureEnabled

The current state of feature, true=enabled, false=disabled.

◆ isFeatureEnabled [2/2]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V4::isFeatureEnabled

The current state of feature, true=enabled, false=disabled.

◆ isGpuHDMICapable [1/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::isGpuHDMICapable

If the GPU can handle HDMI.

◆ isGpuHDMICapable [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isGpuHDMICapable

If the GPU can handle HDMI.

◆ isHdr10PlusGamingSupported

NvU32 _NV_HDR_CAPABILITIES_V3::isHdr10PlusGamingSupported

HDR10+ Gaming, a.k.a HDR10+ Source Side Tonemapping (SSTM), is supported.

◆ isHdr10PlusSupported

NvU32 _NV_HDR_CAPABILITIES_V3::isHdr10PlusSupported

HDR10+ (Sink Side Tonemapping) is supported.

◆ isHPD

NvU32 NV_DISPLAY_PORT_CONFIG::isHPD

If the control panel is making this call due to HPD.

◆ isInterlaced

NvU32 NV_TIMING_FLAG::isInterlaced

To retrieve interlaced/progressive timing.

◆ isInternalDp

NvU32 _NV_DISPLAY_PORT_INFO_V1::isInternalDp

If the monitor is driven by an NV Dp transmitter.

◆ isLicenseSupported [1/4]

NvU32 _NV_LICENSABLE_FEATURES_V1::isLicenseSupported

True if Software Licensing is supported.

◆ isLicenseSupported [2/4]

NvU32 _NV_LICENSABLE_FEATURES_V2::isLicenseSupported

True if Software Licensing is supported.

◆ isLicenseSupported [3/4]

NvU32 _NV_LICENSABLE_FEATURES_V3::isLicenseSupported

True if Software Licensing is supported.

◆ isLicenseSupported [4/4]

NvU32 _NV_LICENSABLE_FEATURES_V4::isLicenseSupported

True if Software Licensing is supported.

◆ isMasterable

NvU32 _NV_GSYNC_DISPLAY::isMasterable

Can this display be the master? (Read only)

◆ isMetro [1/2]

NvU32 _NVDRS_APPLICATION_V3::isMetro

Windows 8 style app.

◆ isMetro [2/2]

NvU32 _NVDRS_APPLICATION_V4::isMetro

Windows 8 style app.

◆ isMonAdobeRGBCapable [1/2]

NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonAdobeRGBCapable

◆ isMonAdobeRGBCapable [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonAdobeRGBCapable

if AdobeRGB extended colorimetry is supported

◆ isMonAdobeYCC601Capable [1/2]

NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonAdobeYCC601Capable

◆ isMonAdobeYCC601Capable [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonAdobeYCC601Capable

if AdobeYCC601 extended colorimetry is supported

◆ isMonBasicAudioCapable [1/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonBasicAudioCapable

If the monitor supports basic audio.

◆ isMonBasicAudioCapable [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonBasicAudioCapable

If the monitor supports basic audio.

◆ isMonBT2020cYCCCapable

NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonBT2020cYCCCapable

◆ isMonBT2020RGBCapable

NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonBT2020RGBCapable

◆ isMonBT2020YCCCapable

NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonBT2020YCCCapable

◆ isMonHDMI [1/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonHDMI

If the monitor is HDMI (with IEEE's HDMI registry ID)

◆ isMonHDMI [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonHDMI

If the monitor is HDMI (with IEEE's HDMI registry ID)

◆ isMonsYCC601Capable [1/2]

NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonsYCC601Capable

◆ isMonsYCC601Capable [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonsYCC601Capable

if sYCC601 extended colorimetry is supported

◆ isMonUnderscanCapable [1/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonUnderscanCapable

If the monitor supports underscan.

◆ isMonUnderscanCapable [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonUnderscanCapable

If the monitor supports underscan.

◆ isMonxvYCC601Capable [1/3]

NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonxvYCC601Capable

◆ isMonxvYCC601Capable [2/3]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonxvYCC601Capable

If xvYCC 601 is supported.

◆ isMonxvYCC601Capable [3/3]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonxvYCC601Capable

If xvYCC extended colorimetry 601 is supported.

◆ isMonxvYCC709Capable [1/3]

NvU32 _NV_DISPLAY_PORT_INFO_V1::isMonxvYCC709Capable

◆ isMonxvYCC709Capable [2/3]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonxvYCC709Capable

If xvYCC 709 is supported.

◆ isMonxvYCC709Capable [3/3]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonxvYCC709Capable

If xvYCC extended colorimetry 709 is supported.

◆ isMonYCbCr422Capable [1/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonYCbCr422Capable

If YCbCr 4:2:2 is supported.

◆ isMonYCbCr422Capable [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonYCbCr422Capable

If YCbCr 4:2:2 is supported.

◆ isMonYCbCr444Capable [1/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::isMonYCbCr444Capable

If YCbCr 4:4:4 is supported.

◆ isMonYCbCr444Capable [2/2]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::isMonYCbCr444Capable

If YCbCr 4:4:4 is supported.

◆ isMosaic

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::isMosaic

[out] If bit is set, this display represents a Mosaic grid.

◆ isMultiStreamRootNode

NvU32 _NV_GPU_DISPLAYIDS::isMultiStreamRootNode

if bit is set then this displayID belongs to a multi stream enabled connector(root node). Note that when multi stream is enabled and a single multi stream capable monitor is connected to it, the monitor will share the display id with the RootNode. When there is more than one monitor connected in a multi stream topology, then the root node will have a separate displayId.

◆ IsNonNVIDIAAdapter

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::IsNonNVIDIAAdapter

True for non-NVIDIA adapter.

◆ IsNull [1/2]

NV_META_COMMAND_BOOL NV_META_COMMAND_OPTIONAL_TENSOR_DESC::IsNull

◆ IsNull [2/2]

NV_META_COMMAND_BOOL NV_META_COMMAND_OPTIONAL_ACTIVATION_DESC::IsNull

◆ isOSVisible

NvU32 _NV_GPU_DISPLAYIDS::isOSVisible

if bit is set, then this display is reported to the OS

◆ isPhysicallyConnected

NvU32 _NV_GPU_DISPLAYIDS::isPhysicallyConnected

if bit is set, then this display is a phycially connected display; Valid only when isConnected bit is set

◆ isPossible

NvU32 NV_MOSAIC_TOPO_BRIEF::isPossible

1 if topo can be enabled, else 0

◆ isPredefined [1/5]

NvU32 _NVDRS_APPLICATION_V1::isPredefined

Is the application userdefined/predefined.

◆ isPredefined [2/5]

NvU32 _NVDRS_APPLICATION_V2::isPredefined

Is the application userdefined/predefined.

◆ isPredefined [3/5]

NvU32 _NVDRS_APPLICATION_V3::isPredefined

Is the application userdefined/predefined.

◆ isPredefined [4/5]

NvU32 _NVDRS_APPLICATION_V4::isPredefined

Is the application userdefined/predefined.

◆ isPredefined [5/5]

NvU32 _NVDRS_PROFILE_V1::isPredefined

Is the Profile user-defined, or predefined.

◆ isPredefinedValid

NvU32 _NVDRS_SETTING_V1::isPredefinedValid

It is different than 0 if the PredefinedValue union contains a valid value.

◆ isPreferredUnscaledTarget

NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::isPreferredUnscaledTarget

◆ isRgb444SupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::isRgb444SupportedOnCurrentMode

If Rgb444 is supported on the current mode.

◆ isRLACapable

NvU8 _NV_MONITOR_CAPS_GENERIC::isRLACapable

whether monitor supports RLA

◆ isSetDeferred

NvU32 NV_DISPLAY_PORT_CONFIG::isSetDeferred

Requires an OS modeset to finalize the setup if set.

◆ isST2084EotfSupported [1/3]

NvU32 _NV_HDR_CAPABILITIES_V1::isST2084EotfSupported

HDMI2.0a UHDA HDR with ST2084 EOTF (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isST2084EotfSupported [2/3]

NvU32 _NV_HDR_CAPABILITIES_V2::isST2084EotfSupported

HDMI2.0a UHDA HDR with ST2084 EOTF (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isST2084EotfSupported [3/3]

NvU32 _NV_HDR_CAPABILITIES_V3::isST2084EotfSupported

HDMI2.0a UHDA HDR with ST2084 EOTF (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isSupported

NvU32 NV_GPU_ECC_STATUS_INFO::isSupported

ECC memory feature support.

◆ isSynced

NvU32 _NV_GSYNC_GPU::isSynced

Whether this GPU is sync'd or not.

◆ isTraditionalHdrGammaSupported [1/3]

NvU32 _NV_HDR_CAPABILITIES_V1::isTraditionalHdrGammaSupported

HDMI2.0a traditional HDR gamma (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isTraditionalHdrGammaSupported [2/3]

NvU32 _NV_HDR_CAPABILITIES_V2::isTraditionalHdrGammaSupported

HDMI2.0a traditional HDR gamma (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isTraditionalHdrGammaSupported [3/3]

NvU32 _NV_HDR_CAPABILITIES_V3::isTraditionalHdrGammaSupported

HDMI2.0a traditional HDR gamma (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isTraditionalSdrGammaSupported [1/3]

NvU32 _NV_HDR_CAPABILITIES_V1::isTraditionalSdrGammaSupported

HDMI2.0a traditional SDR gamma (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isTraditionalSdrGammaSupported [2/3]

NvU32 _NV_HDR_CAPABILITIES_V2::isTraditionalSdrGammaSupported

HDMI2.0a traditional SDR gamma (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isTraditionalSdrGammaSupported [3/3]

NvU32 _NV_HDR_CAPABILITIES_V3::isTraditionalSdrGammaSupported

HDMI2.0a traditional SDR gamma (CEA861.3). Boolean: 0 = not supported, 1 = supported;.

◆ isTrueGsync

NvU8 _NV_MONITOR_CAPS_GENERIC::isTrueGsync

whether the monitor is actually GSYNC or adaptive sync monitor : 0 for adaptive sync.

◆ isVRReady

NvU32 _NV_GPU_VR_READY_V1::isVRReady

Is the requested GPU VR ready.

◆ isWFD

NvU32 _NV_GPU_DISPLAYIDS::isWFD

Deprecated. Will always return 0.

◆ isYCbCr420SupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCbCr420SupportedOnCurrentMode

If YCbCr420 is supported on the current mode.

◆ isYCbCr422SupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCbCr422SupportedOnCurrentMode

If YCbCr422 is supported on the current mode.

◆ isYCbCr444SupportedOnCurrentMode

NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCbCr444SupportedOnCurrentMode

If YCbCr444 is supported on the current mode.

◆ isYCrCb420Supported

NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCrCb420Supported

If YCrCb420 is supported.

◆ isYCrCb422Supported

NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCrCb422Supported

If YCrCb422 is supported.

◆ isYCrCb444Supported

NvU32 _NV_DISPLAY_PORT_INFO_V1::isYCrCb444Supported

If YCrCb444 is supported.

◆ itContent

NvU32 NV_INFOFRAME_VIDEO::itContent

◆ jack [1/2]

NvU32 _NVVIOSTREAM::jack

This stream's link[i] will use the specified (0-based) channel within the.

◆ [] [2/2]

NvU32 { ... } ::jack

This stream's link[i] will use the specified (0-based) channel within the.

◆ kernelParams

void** _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::kernelParams

◆ keyEnable

UINT NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::keyEnable

VKEY to enable/disable Ansel.

◆ laneCount

NV_DP_LANE_COUNT NV_DISPLAY_PORT_CONFIG::laneCount

Lane count.

◆ lastFlipRefreshCount

NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::lastFlipRefreshCount

[out] Number of times the last flip was shown on the screen

◆ lastFlipTimeStamp

NvU64 _NV_GET_ADAPTIVE_SYNC_DATA_V1::lastFlipTimeStamp

[out] Timestamp for the lastest flip on the screen

◆ launcher [1/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V1::launcher

Indicates the name (if any) of the launcher that starts the application

◆ launcher [2/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V2::launcher

Indicates the name (if any) of the launcher that starts the Application.

◆ launcher [3/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V3::launcher

Indicates the name (if any) of the launcher that starts the Application.

◆ launcher [4/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V4::launcher

Indicates the name (if any) of the launcher that starts the Application.

◆ Layout

NvU64 NV_META_COMMAND_TENSOR_DESC::Layout

◆ left_bar

NvU32 NV_INFOFRAME_VIDEO::left_bar

◆ leftCoeffs

float _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::leftCoeffs[4]

◆ leftConst

float _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::leftConst

◆ length

NvU32 NV_INFOFRAME_PROPERTY::length

◆ levelShift

NvU32 NV_INFOFRAME_AUDIO::levelShift

◆ lfePlaybackLevel

NvU32 NV_INFOFRAME_AUDIO::lfePlaybackLevel

◆ licensableFeatureCount [1/4]

NvU32 _NV_LICENSABLE_FEATURES_V1::licensableFeatureCount

The number of licensable features.

◆ licensableFeatureCount [2/4]

NvU32 _NV_LICENSABLE_FEATURES_V2::licensableFeatureCount

The number of licensable features.

◆ licensableFeatureCount [3/4]

NvU32 _NV_LICENSABLE_FEATURES_V3::licensableFeatureCount

The number of licensable features.

◆ licensableFeatureCount [4/4]

NvU32 _NV_LICENSABLE_FEATURES_V4::licensableFeatureCount

The number of licensable features.

◆ licenseDetails [1/4]

NV_LICENSE_FEATURE_DETAILS_V1 _NV_LICENSABLE_FEATURES_V1::licenseDetails[NV_LICENSE_MAX_COUNT]

Array of licensable features.

◆ licenseDetails [2/4]

NV_LICENSE_FEATURE_DETAILS_V2 _NV_LICENSABLE_FEATURES_V2::licenseDetails[NV_LICENSE_MAX_COUNT]

Array of licensable features.

◆ licenseDetails [3/4]

NV_LICENSE_FEATURE_DETAILS_V3 _NV_LICENSABLE_FEATURES_V3::licenseDetails[NV_LICENSE_MAX_COUNT]

Array of licensable features.

◆ licenseDetails [4/4]

NV_LICENSE_FEATURE_DETAILS_V4 _NV_LICENSABLE_FEATURES_V4::licenseDetails[NV_LICENSE_MAX_COUNT]

Array of licensable features.

◆ licenseExpiry

NV_LICENSE_EXPIRY_DETAILS _NV_LICENSE_FEATURE_DETAILS_V4::licenseExpiry

License expiry information.

◆ licenseInfo [1/4]

NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V1::licenseInfo

Deprecated.

◆ licenseInfo [2/4]

NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V2::licenseInfo

Deprecated.

◆ licenseInfo [3/4]

NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V3::licenseInfo

Deprecated.

◆ licenseInfo [4/4]

NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V4::licenseInfo

Deprecated.

◆ linkID

NVVIOLINKID _NVVIOCHANNELSTATUS::linkID

Link ID.

◆ linkInfo [1/2]

NVLINK_LINK_STATUS_INFO_V1 NVLINK_GET_STATUS_V1::linkInfo[NVAPI_NVLINK_MAX_LINKS]

This structure stores the per-link status of different NVLink parameters. The link is identified by the index.

◆ linkInfo [2/2]

NVLINK_LINK_STATUS_INFO_V2 NVLINK_GET_STATUS_V2::linkInfo[NVAPI_NVLINK_MAX_LINKS]

This structure stores the per-link status of different NVLink parameters. The link is identified by the index.

◆ linkMask [1/3]

NvU32 NVLINK_GET_CAPS_V1::linkMask

This field provides a bitfield mask of NVLink links enabled on this GPU.

◆ linkMask [2/3]

NvU32 NVLINK_GET_STATUS_V1::linkMask

This parameter specifies for which links we want the status.

◆ linkMask [3/3]

NvU32 NVLINK_GET_STATUS_V2::linkMask

This parameter specifies for which links we want the status.

◆ linkRate

NV_DP_LINK_RATE NV_DISPLAY_PORT_CONFIG::linkRate

Link rate.

◆ [struct]

struct { ... } _NVVIOSTREAM::links[NVAPI_MAX_VIO_LINKS_PER_STREAM]

◆ linkState [1/2]

NvU32 NVLINK_LINK_STATUS_INFO_V1::linkState

This field specifies the current state of the link.See NVAPI_NVLINK_GET_NVLINK_STATUS_LINK_STATE_* for possible values.

◆ linkState [2/2]

NvU32 NVLINK_LINK_STATUS_INFO_V2::linkState

This field specifies the current state of the link.See NVAPI_NVLINK_GET_NVLINK_STATUS_LINK_STATE_* for possible values.

◆ localDeviceInfo

NVLINK_DEVICE_INFO_V1 NVLINK_LINK_STATUS_INFO_V2::localDeviceInfo

This field stores the device information for the local end of the link.

◆ localDeviceLinkNumber

NvU8 NVLINK_LINK_STATUS_INFO_V2::localDeviceLinkNumber

This field specifies the link number on the local end of the link.

◆ loopProperty [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::loopProperty

This field specifies if the link is a loopback/loopout link. See NVAPI_NVLINK_STATUS_LOOP_PROPERTY_* for possible values.

◆ loopProperty [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::loopProperty

This field specifies if the link is a loopback/loopout link. See NVAPI_NVLINK_STATUS_LOOP_PROPERTY_* for possible values.

◆ lowestNciVersion

NvU8 NVLINK_GET_CAPS_V1::lowestNciVersion

This field specifies the lowest supported NCI version for this GPU.

◆ lowestNvlinkVersion

NvU8 NVLINK_GET_CAPS_V1::lowestNvlinkVersion

This field specifies the lowest supported NVLink version for this GPU.

◆ majorSMVersion [1/2]

NvU16 _NV_D3D1x_GRAPHICS_CAPS_V2::majorSMVersion

(OUT) Major SM version of the device

◆ majorSMVersion [2/2]

NvU16 _NV_D3D12_GRAPHICS_CAPS_V1::majorSMVersion

(OUT) Major SM version of the device

◆ [] [1/3]

NvU32 { ... } ::majorVersion

Major version. For GVI, majorVersion contains MajorVersion(HIWORD) And MinorVersion(LOWORD)

◆ majorVersion [2/3]

NvU32 _NVVIOCAPS::majorVersion

Major version. For GVI, majorVersion contains MajorVersion(HIWORD) And MinorVersion(LOWORD)

Major version. In version 2, for both GVI and GVO, majorVersion contains MajorVersion(HIWORD) And MinorVersion(LOWORD)

◆ [] [3/3]

NvU32 { ... } ::majorVersion

Major version. In version 2, for both GVI and GVO, majorVersion contains MajorVersion(HIWORD) And MinorVersion(LOWORD)

◆ manualColorFixed [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::manualColorFixed

◆ [] [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_COLOR_FIXED { ... } ::manualColorFixed

◆ manualRGB [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::manualRGB

◆ [] [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB { ... } ::manualRGB

◆ manualRGBW [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::manualRGBW

◆ [] [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW { ... } ::manualRGBW

◆ [] [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR { ... } ::manualSingleColor

◆ manualSingleColor [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::manualSingleColor

◆ markerType [1/2]

NV_LATENCY_MARKER_TYPE _NV_LATENCY_MARKER_PARAMS::markerType

◆ markerType [2/2]

NV_LATENCY_MARKER_TYPE _NV_ASYNC_FRAME_MARKER_PARAMS_V1::markerType

◆ [struct] [1/2]

struct { ... } _NV_HDR_COLOR_DATA_V1::mastering_display_data

◆ [struct] [2/2]

struct { ... } _NV_HDR_COLOR_DATA_V2::mastering_display_data

◆ max [1/2]

NvS32 NV_GPU_PERF_PSTATES20_PARAM_DELTA::max

Max value allowed for parameter delta (in respective units [kHz, uV])

◆ [] [2/2]

NvS32 { ... } ::max

Max value allowed for parameter delta (in respective units [kHz, uV])

◆ max_content_light_level [1/5]

NvU16 _NV_HDR_COLOR_DATA_V1::max_content_light_level

Maximum Content Light level (MaxCLL) ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [2/5]

NvU16 { ... } ::max_content_light_level

Maximum Content Light level (MaxCLL) ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ max_content_light_level [3/5]

NvU16 _NV_HDR_COLOR_DATA_V2::max_content_light_level

Maximum Content Light level (MaxCLL) ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [4/5]

NvU16 { ... } ::max_content_light_level

Maximum Content Light level (MaxCLL) ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ max_content_light_level [5/5]

NvU16 _NV_HDR_METADATA_V1::max_content_light_level

Maximum Content Light level (MaxCLL) ([0x0000-0xFFFF] = [0.0 - 65535.0] cd/m^2, in units of 1 cd/m^2)

◆ [] [1/5]

NvU16 { ... } ::max_display_mastering_luminance

Maximum display mastering luminance ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ max_display_mastering_luminance [2/5]

NvU16 _NV_HDR_COLOR_DATA_V1::max_display_mastering_luminance

Maximum display mastering luminance ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ max_display_mastering_luminance [3/5]

NvU16 _NV_HDR_COLOR_DATA_V2::max_display_mastering_luminance

Maximum display mastering luminance ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [4/5]

NvU16 { ... } ::max_display_mastering_luminance

Maximum display mastering luminance ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ max_display_mastering_luminance [5/5]

NvU16 _NV_HDR_METADATA_V1::max_display_mastering_luminance

Maximum display mastering luminance ([0x0000-0xFFFF] = [0.0 - 65535.0] cd/m^2, in units of 1 cd/m^2)

◆ max_frame_average_light_level [1/5]

NvU16 _NV_HDR_COLOR_DATA_V1::max_frame_average_light_level

Maximum Frame-Average Light Level (MaxFALL) ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [2/5]

NvU16 { ... } ::max_frame_average_light_level

Maximum Frame-Average Light Level (MaxFALL) ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ [] [3/5]

NvU16 { ... } ::max_frame_average_light_level

Maximum Frame-Average Light Level (MaxFALL) ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ max_frame_average_light_level [4/5]

NvU16 _NV_HDR_COLOR_DATA_V2::max_frame_average_light_level

Maximum Frame-Average Light Level (MaxFALL) ([0x0001-0xFFFF] = [1.0 - 65535.0] cd/m^2)

◆ max_frame_average_light_level [5/5]

NvU16 _NV_HDR_METADATA_V1::max_frame_average_light_level

Maximum Frame-Average Light Level (MaxFALL) ([0x0000-0xFFFF] = [0.0 - 65535.0] cd/m^2, in units of 1 cd/m^2)

◆ maxFrameInterval [1/2]

NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::maxFrameInterval

[out] maximum frame interval in micro seconds as set previously using NvAPI_DISP_SetAdaptiveSyncData function. If default values from EDID are used, this parameter returns 0.

◆ maxFrameInterval [2/2]

NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::maxFrameInterval

[in] maximum frame interval in micro seconds. If maxFrameInterval is send as 0, default values from EDID will be used.

◆ maxFreq_kHz [1/2]

NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::maxFreq_kHz

Max clock frequency within given pstate in (kHz)

◆ [] [2/2]

NvU32 { ... } ::maxFreq_kHz

Max clock frequency within given pstate in (kHz)

◆ maxLaneCount

NV_DP_LANE_COUNT _NV_DISPLAY_PORT_INFO_V1::maxLaneCount

Maximum supported lane count.

◆ maxLines

NvU32 _NV_GSYNC_DELAY::maxLines

maximum number of lines supported at current display mode to induce delay. Updated by NvAPI_GSync_GetControlParameters(). Read only.

◆ maxLinkRate

NV_DP_LINK_RATE _NV_DISPLAY_PORT_INFO_V1::maxLinkRate

Maximum supported link rate.

◆ maxMulDivValue

NvU32 _NV_GSYNC_CAPABILITIES_V3::maxMulDivValue

This parameter returns the maximum possible value that can be programmed for multiplying / dividing house sync. Only valid if bIsMulDivSupported is set to 1.

◆ maxTmdsClock

NvU8 _NV_MONITOR_CAPS_VSDB::maxTmdsClock

Bye 4.

◆ maxVoltage_uV [1/2]

NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::maxVoltage_uV

◆ [] [2/2]

NvU32 { ... } ::maxVoltage_uV

◆ mcuv10 [1/2]

NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_MCUV10 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::mcuv10

◆ [] [2/2]

NV_GPU_CLIENT_ILLUM_DEVICE_INFO_DATA_MCUV10 { ... } ::mcuv10

◆ MiddleRegionShadingRate

NV_PIXEL_SHADING_RATE _NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1::MiddleRegionShadingRate

(IN) Shading Rate for the middle region of the foveated rendering pattern

◆ [] [1/3]

NvS32 { ... } ::min

Min value allowed for parameter delta (in respective units [kHz, uV])

◆ min [2/3]

NvS32 NV_GPU_PERF_PSTATES20_PARAM_DELTA::min

Min value allowed for parameter delta (in respective units [kHz, uV])

◆ min [3/3]

NvU16 _NV_LICENSE_EXPIRY_DETAILS::min

Minutes value of license expiry.

◆ [] [1/5]

NvU16 { ... } ::min_display_mastering_luminance

Minimum display mastering luminance ([0x0001-0xFFFF] = [1.0 - 6.55350] cd/m^2)

◆ min_display_mastering_luminance [2/5]

NvU16 _NV_HDR_COLOR_DATA_V1::min_display_mastering_luminance

Minimum display mastering luminance ([0x0001-0xFFFF] = [1.0 - 6.55350] cd/m^2)

◆ min_display_mastering_luminance [3/5]

NvU16 _NV_HDR_COLOR_DATA_V2::min_display_mastering_luminance

Minimum display mastering luminance ([0x0001-0xFFFF] = [1.0 - 6.55350] cd/m^2)

◆ [] [4/5]

NvU16 { ... } ::min_display_mastering_luminance

Minimum display mastering luminance ([0x0001-0xFFFF] = [1.0 - 6.55350] cd/m^2)

◆ min_display_mastering_luminance [5/5]

NvU16 _NV_HDR_METADATA_V1::min_display_mastering_luminance

Minimum display mastering luminance ([0x0000-0xFFFF] = [0.0 - 6.55350] cd/m^2, in units of 0.0001 cd/m^2)

◆ minFreq_kHz [1/2]

NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::minFreq_kHz

Min clock frequency within given pstate in (kHz)

◆ [] [2/2]

NvU32 { ... } ::minFreq_kHz

Min clock frequency within given pstate in (kHz)

◆ minimumIntervalUs

NvU32 _NV_SET_SLEEP_MODE_PARAMS::minimumIntervalUs

(IN) Minimum frame interval in microseconds. 0 = no frame rate limit.

◆ minorSMVersion [1/2]

NvU16 _NV_D3D1x_GRAPHICS_CAPS_V2::minorSMVersion

(OUT) Minor SM version of the device

◆ minorSMVersion [2/2]

NvU16 _NV_D3D12_GRAPHICS_CAPS_V1::minorSMVersion

(OUT) Minor SM version of the device

◆ [] [1/3]

NvU32 { ... } ::minorVersion

Minor version. For GVI, minorVersion contains Revison(HIWORD) And Build(LOWORD)

◆ minorVersion [2/3]

NvU32 _NVVIOCAPS::minorVersion

Minor version. For GVI, minorVersion contains Revison(HIWORD) And Build(LOWORD)

Minor version. In version 2, for both GVI and GVO, minorVersion contains Revison(HIWORD) And Build(LOWORD)

◆ [] [3/3]

NvU32 { ... } ::minorVersion

Minor version. In version 2, for both GVI and GVO, minorVersion contains Revison(HIWORD) And Build(LOWORD)

◆ minPixels

NvU32 _NV_GSYNC_DELAY::minPixels

minimum number of pixels required at current display mode to induce delay. Updated by NvAPI_GSync_GetControlParameters(). Read only.

◆ minVoltage_uV [1/2]

NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::minVoltage_uV

◆ [] [2/2]

NvU32 { ... } ::minVoltage_uV

◆ MipSlice [1/2]

UINT _NV_TEX2D_SRRV::MipSlice

◆ MipSlice [2/2]

UINT _NV_TEX2D_ARRAY_SRRV::MipSlice

◆ mode

NvU32 NV_INFOFRAME_PROPERTY::mode

◆ Mode [1/2]

NV_META_COMMAND_PADDING_MODE NV_META_COMMAND_PADDING_DESC::Mode

◆ Mode [2/2]

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Mode

◆ modifiedWCoefficients

NV_MODIFIED_W_COEFFICIENTS _NV_MODIFIED_W_PARAMS::modifiedWCoefficients[NV_MODIFIED_W_MAX_VIEWPORTS]

◆ month

NvU16 _NV_LICENSE_EXPIRY_DETAILS::month

Month value of license expiry.

◆ multiGPUVersion [1/2]

NvU32 _NV_MULTIGPU_CAPS_V1::multiGPUVersion

◆ multiGPUVersion [2/2]

NvU32 _NV_MULTIGPU_CAPS_V2::multiGPUVersion

◆ multiplyDivideMode

NVAPI_GSYNC_MULTIPLY_DIVIDE_MODE _NV_GSYNC_CONTROL_PARAMS_V2::multiplyDivideMode

Indicates multiplier/divider mode for the housesync signal. While setting multiplyDivideMode, source needs to be set as NVAPI_GSYNC_SYNC_SOURCE_HOUSESYNC.

◆ multiplyDivideValue

NvU8 _NV_GSYNC_CONTROL_PARAMS_V2::multiplyDivideValue

Indicates the multiplier/divider value for the housesync signal. Only supported if bIsMulDivSupported field of the structure NV_GSYNC_CAPABILITIES is set to 1. The maximum supported value for this field can be obtained from maxMulDivValue field of the structure NV_GSYNC_CAPABILITIES.

◆ MultisampleEnable

BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::MultisampleEnable

◆ mvolt [1/2]

NvU32 NV_GPU_PERF_PSTATES_INFO_V2::mvolt

Voltage in mV.

◆ [] [2/2]

NvU32 { ... } ::mvolt

Voltage in mV.

◆ name [1/2]

NvU8 tagNV_TIMINGEXT::name[40]

Timing name.

◆ name [2/2]

NvAPI_ShortString _NV_MANAGED_DEDICATED_DISPLAY_METADATA::name

[in][out] Metadata for the virtual name of for the display connector specified by displayId. Valid characters are in the range of 32 ' ' (space) to 126 '~' (both included).

◆ Name

LPCWSTR NVAPI_META_COMMAND_DESC::Name

◆ nciVersion [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::nciVersion

This field specifies the NCI version supported by the link.

◆ nciVersion [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::nciVersion

This field specifies the NCI version supported by the link.

◆ NDCSplitsX [1/2]

float _NV_SMP_ASSIST_FASTGSCBDATA_V1::NDCSplitsX[2]

(OUT) FastGS constant buffer data for Multi-Res Shading/ Lens Matched Shading

◆ NDCSplitsX [2/2]

float _NV_SMP_ASSIST_FASTGSCBDATA_MRS_INSTANCED_STEREO_V1::NDCSplitsX[4]

(OUT) FastGS constant buffer data for Multi-Res Shading (Instanced stereo). 2 splits for left eye followed by 2 splits for right eye

◆ NDCSplitsY [1/2]

float _NV_SMP_ASSIST_FASTGSCBDATA_V1::NDCSplitsY[2]

◆ NDCSplitsY [2/2]

float _NV_SMP_ASSIST_FASTGSCBDATA_MRS_INSTANCED_STEREO_V1::NDCSplitsY[2]

◆ nonuniformScaling

NvU32 NV_INFOFRAME_VIDEO::nonuniformScaling

◆ nSLIGPUs [1/2]

NvU32 _NV_MULTIGPU_CAPS_V1::nSLIGPUs

◆ nSLIGPUs [2/2]

NvU32 _NV_MULTIGPU_CAPS_V2::nSLIGPUs

◆ nTotalGPUs [1/2]

NvU32 _NV_MULTIGPU_CAPS_V1::nTotalGPUs

◆ nTotalGPUs [2/2]

NvU32 _NV_MULTIGPU_CAPS_V2::nTotalGPUs

◆ numAnselFeatures

UINT NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::numAnselFeatures

Number of features in pAnselFeatures.

◆ numBaseVoltages [1/2]

NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::numBaseVoltages

Number of populated base voltages (per pstate)

◆ numBaseVoltages [2/2]

NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::numBaseVoltages

Number of populated base voltages (per pstate)

◆ numBuffers

NvU32 _NV_D3D_LATELATCH_OBJECT_DESC_V1::numBuffers

◆ numClocks [1/4]

NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::numClocks

Number of populated clocks (per pstate)

◆ numClocks [2/4]

NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::numClocks

Number of populated clocks (per pstate)

◆ numClocks [3/4]

NvU32 NV_GPU_PERF_PSTATES_INFO_V1::numClocks

The number of clock domains supported by each P-State.

◆ numClocks [4/4]

NvU32 NV_GPU_PERF_PSTATES_INFO_V2::numClocks

The number of clock domains supported by each P-State.

◆ NumCustomSemantics [1/15]

NvU32 NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::NumCustomSemantics

◆ NumCustomSemantics [2/15]

NvU32 NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V1::NumCustomSemantics

◆ NumCustomSemantics [3/15]

NvU32 NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V2::NumCustomSemantics

◆ NumCustomSemantics [4/15]

NvU32 NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::NumCustomSemantics

◆ NumCustomSemantics [5/15]

NvU32 NvAPI_D3D11_CREATE_HULL_SHADER_EX_V1::NumCustomSemantics

◆ NumCustomSemantics [6/15]

NvU32 NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::NumCustomSemantics

◆ NumCustomSemantics [7/15]

NvU32 NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V1::NumCustomSemantics

◆ NumCustomSemantics [8/15]

NvU32 NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V2::NumCustomSemantics

◆ NumCustomSemantics [9/15]

NvU32 NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::NumCustomSemantics

◆ NumCustomSemantics [10/15]

NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V1::NumCustomSemantics

◆ NumCustomSemantics [11/15]

NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::NumCustomSemantics

◆ NumCustomSemantics [12/15]

NvU32 NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::NumCustomSemantics

◆ NumCustomSemantics [13/15]

NvU32 NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V1::NumCustomSemantics

◆ NumCustomSemantics [14/15]

NvU32 NVAPI_D3D12_PSO_HULL_SHADER_DESC_V1::NumCustomSemantics

◆ NumCustomSemantics [15/15]

NvU32 NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V1::NumCustomSemantics

◆ numDescs

NvU32 _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::numDescs

If type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_TOP_LEVEL, it represents the number of descriptions stored in instanceDescs. Otherwise, it contains the number of geometry descriptions stored in pGeometryDescs or ppGeometryDescs.

◆ numDMMUsageCounts [1/2]

NvU32 _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::numDMMUsageCounts

Number of DMM usage count entries in the pDMMUsageCounts array.

◆ numDMMUsageCounts [2/2]

NvU32 _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::numDMMUsageCounts

Number of DMM usage count entries in the pDMMUsageCounts array.

◆ numEntries

NvU32 _NV_MODIFIED_W_PARAMS::numEntries

◆ numIllumDevices [1/2]

NvU32 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_PARAMS_V1::numIllumDevices

Number of illumination devices present.

◆ numIllumDevices [2/2]

NvU32 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_PARAMS_V1::numIllumDevices

Number of illumination devices present.

◆ numIllumZones

NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_PARAMS_V1::numIllumZones

Number of illumination zones present.

◆ numIllumZonesControl

NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::numIllumZonesControl

Number of illumination zones present.

◆ numLines

NvU32 _NV_GSYNC_DELAY::numLines

delay to be induced in number of horizontal lines.

◆ numLinks

NvU32 _NVVIOSTREAM::numLinks

Number of active links.

◆ numOfApps

NvU32 _NVDRS_PROFILE_V1::numOfApps

Total number of applications that belong to this profile. Read-only.

◆ numOfSettings

NvU32 _NVDRS_PROFILE_V1::numOfSettings

Total number of settings applied for this Profile. Read-only.

◆ numOMMUsageCounts [1/2]

NvU32 _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::numOMMUsageCounts

Number of OMM usage count entries in the pOMMUsageCounts array.

◆ numOMMUsageCounts [2/2]

NvU32 _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::numOMMUsageCounts

Number of OMM usage count entries in the pOMMUsageCounts array.

◆ numPixels

NvU32 _NV_GSYNC_DELAY::numPixels

delay to be induced in number of pixels.

◆ numPostbuildInfoDescs [1/3]

NvU32 _NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::numPostbuildInfoDescs

[in] Size of postbuild info desc array. Set to 0 if none are needed.

◆ numPostbuildInfoDescs [2/3]

NvU32 _NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::numPostbuildInfoDescs

[in] Size of postbuild info desc array. Set to 0 if none are needed.

◆ numPostbuildInfoDescs [3/3]

NvU32 _NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_V1::numPostbuildInfoDescs

[in] Size of postbuild info desc array. Set to 0 if none are needed.

◆ numPstates [1/4]

NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::numPstates

Number of populated pstates.

◆ numPstates [2/4]

NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::numPstates

Number of populated pstates.

◆ numPstates [3/4]

NvU32 NV_GPU_PERF_PSTATES_INFO_V1::numPstates

The number of available p-states.

◆ numPstates [4/4]

NvU32 NV_GPU_PERF_PSTATES_INFO_V2::numPstates

The number of available p-states.

◆ numRawCaptureImages

NvU32 _NVVIOINPUTCONFIG::numRawCaptureImages

numRawCaptureImages is the number of frames to keep in the capture queue. must be between NVAPI_GVI_MIN_RAW_CAPTURE_IMAGES and NVAPI_GVI_MAX_RAW_CAPTURE_IMAGES,

◆ numRects

NvU32 _NV_D3D11_EXCLUSIVE_SCISSOR_RECTS_DESC_V1::numRects

(IN) Number of Exclusive Scissor Rects to be set.

◆ numSettingValues

NvU32 _NVDRS_SETTING_VALUES::numSettingValues

Total number of values available in a setting.

◆ numSources [1/2]

NvU32 _NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::numSources

[in] Number of DMM Arrays in pSources.

◆ numSources [2/2]

NvU32 _NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::numSources

[in] Number of OMM Arrays in pSources.

◆ numStreams

NvU32 _NVVIOINPUTCONFIG::numStreams

Number of active streams.

◆ numUtils

NvU32 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::numUtils

[out] Number of valid entries in utils array.

◆ numVertices

int NV_SCANOUT_WARPING_DATA::numVertices

number of the input vertices

◆ numViewports [1/3]

NvU32 _NV_D3D11_VIEWPORTS_SHADING_RATE_DESC_V1::numViewports

(IN) Number of viewports with shading rate set.

◆ numViewports [2/3]

NvU32 _NV_CUSTOM_RECTS_V1::numViewports[NV_SMP_ASSIST_MINIMAL_LEVEL_NUM_EYE_INDICES]

◆ numViewports [3/3]

NvU32 _NV_SMP_ASSIST_GET_CONSTANTS_V3::numViewports

(OUT) Number of valid viewport entries

◆ numViews

NvU32 _NV_MULTIVIEW_PARAMS_V1::numViews

◆ numVoltages [1/3]

NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::numVoltages

Number of populated voltages.

◆ [] [2/3]

NvU32 { ... } ::numVoltages

Number of populated voltages.

◆ numVoltages [3/3]

NvU32 NV_GPU_PERF_PSTATES_INFO_V2::numVoltages

◆ [union]

union { ... } NV_EVENT_REGISTER_CALLBACK::nvCallBackFunc

◆ NVCustomSemanticNameString

NvAPI_LongString _NV_CUSTOM_SEMANTIC::NVCustomSemanticNameString

◆ NVCustomSemanticType

NV_CUSTOM_SEMANTIC_TYPE _NV_CUSTOM_SEMANTIC::NVCustomSemanticType

◆ NVHeapFlags

NV_D3D12_HEAP_FLAGS _NV_HEAP_PARAMS_V1::NVHeapFlags

Additional NV specific flags.

◆ nvlinkCommonClockSpeedMhz [1/2]

NvU32 NVLINK_LINK_STATUS_INFO_V1::nvlinkCommonClockSpeedMhz

This field gives the value of nvlink common clock in MHz.

◆ nvlinkCommonClockSpeedMhz [2/2]

NvU32 NVLINK_LINK_STATUS_INFO_V2::nvlinkCommonClockSpeedMhz

This field gives the value of nvlink common clock in MHz.

◆ nvlinkLineRateMbps

NvU32 NVLINK_LINK_STATUS_INFO_V2::nvlinkLineRateMbps

Bit rate at which bits toggle on wires in megabits per second.

◆ nvlinkLinkClockMhz [1/2]

NvU32 NVLINK_LINK_STATUS_INFO_V1::nvlinkLinkClockMhz

This field gives the actual clock/speed at which links is running in MHz.

◆ nvlinkLinkClockMhz [2/2]

NvU32 NVLINK_LINK_STATUS_INFO_V2::nvlinkLinkClockMhz

This field gives the actual clock/speed at which links is running in MHz.

◆ NvLinkPresent

NvU32 _NV_MULTIGPU_CAPS_V2::NvLinkPresent

◆ nvlinkRefClkSpeedMhz [1/2]

NvU32 NVLINK_LINK_STATUS_INFO_V1::nvlinkRefClkSpeedMhz

This field gives the value of nvlink refclk clock in MHz.

◆ nvlinkRefClkSpeedMhz [2/2]

NvU32 NVLINK_LINK_STATUS_INFO_V2::nvlinkRefClkSpeedMhz

This field gives the value of nvlink refclk clock in MHz.

◆ nvlinkRefClkType [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::nvlinkRefClkType

This field specifies whether refclk is taken from NVHS reflck or PEX refclk for the current GPU.See NVAPI_NVLINK_REFCLK_TYPE_INVALID* for possible values.

◆ nvlinkRefClkType [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::nvlinkRefClkType

This field specifies whether refclk is taken from NVHS reflck or PEX refclk for the current GPU.See NVAPI_NVLINK_REFCLK_TYPE_INVALID* for possible values.

◆ nvlinkVersion [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::nvlinkVersion

This field specifies the NVLink version supported by the link.

◆ nvlinkVersion [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::nvlinkVersion

This field specifies the NVLink version supported by the link.

◆ nvPsfId [1/2]

NvU32 NV_TIMING_FLAG::nvPsfId

The NV predefined PsF format Id. Used when the timing type is NV_TIMING_OVERRIDE_NV_PREDEFINED.

◆ [] [2/2]

NvU32 { ... } ::nvPsfId

The NV predefined PsF format Id. Used when the timing type is NV_TIMING_OVERRIDE_NV_PREDEFINED.

◆ [] [1/2]

NVAPI_CALLBACK_QSYNCEVENT { ... } ::nvQSYNCEventCallback

Callback function pointer for QSYNC events.

◆ nvQSYNCEventCallback [2/2]

NVAPI_CALLBACK_QSYNCEVENT NV_EVENT_REGISTER_CALLBACK::nvQSYNCEventCallback

Callback function pointer for QSYNC events.

◆ NVResourceFlags

NV_D3D12_RESOURCE_FLAGS _NV_RESOURCE_PARAMS_V1::NVResourceFlags

Additional NV specific flags (set the NV_D3D12_RESOURCE_FLAG_HTEX bit to create HTEX texture)

◆ nvs

NvU32 _NVDRS_GPU_SUPPORT::nvs

◆ nvvioConfigType [1/3]

NVVIOCONFIGTYPE _NVVIOCONFIG_V1::nvvioConfigType

Input or Output configuration.

◆ nvvioConfigType [2/3]

NVVIOCONFIGTYPE _NVVIOCONFIG_V2::nvvioConfigType

Input or Output configuration.

◆ nvvioConfigType [3/3]

NVVIOCONFIGTYPE _NVVIOCONFIG_V3::nvvioConfigType

Input or Output configuration.

◆ nvvioStatusType

NVVIOSTATUSTYPE _NVVIOSTATUS::nvvioStatusType

Input or Output status.

◆ offset

NvU32 NV_EDID_V3::offset

Which 256-byte page of the EDID we want to read. Start at 0. If the read succeeds with edidSize > NV_EDID_DATA_SIZE, call back again with offset+256 until we have read the entire buffer

◆ Offset

NvU64 NV_D3D11_META_COMMAND_RESOURCE::Offset

◆ OffsetRtIndexByVpIndex [1/2]

BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::OffsetRtIndexByVpIndex

◆ OffsetRtIndexByVpIndex [2/2]

BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::OffsetRtIndexByVpIndex

◆ offsetTexChannels

NvU32 NV_SCANOUT_INTENSITY_DATA_V2::offsetTexChannels

number of channels per pixel in the offset texture

◆ offsetTexture

float* NV_SCANOUT_INTENSITY_DATA_V2::offsetTexture

array of floating values building an offset texture

◆ ommAttachment

NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_TRIANGLES_DESC::ommAttachment

Opacity Micromap attachment descriptor.

◆ ommTriangles [1/2]

NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_TRIANGLES_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::ommTriangles

Describes triangle geometry which may optionally use Opacity Micromaps, if type is NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_OMM_TRIANGLES_EX. Otherwise, this parameter is unused (space repurposed in a union).

◆ [] [2/2]

NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_TRIANGLES_DESC { ... } ::ommTriangles

Describes triangle geometry which may optionally use Opacity Micromaps, if type is NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_OMM_TRIANGLES_EX. Otherwise, this parameter is unused (space repurposed in a union).

◆ opacityMicromapArray [1/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::opacityMicromapArray

Pointer to an OMM Array used by this geometry; it may be set to NULL if no non-uniform OMMs are used. Unlike vertex, index, and transform buffers, this resource is dereferenced during raytracing.

◆ opacityMicromapArray [2/2]

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_RELOCATE_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::opacityMicromapArray

[in] OMM Array current memory address; it must be 256-byte aligned (NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_BYTE_ALIGNMENT).

◆ opacityMicromapBaseLocation

NvU32 _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::opacityMicromapBaseLocation

Constant added to all non-negative OMM indices in opacityMicromapIndexBuffer.

◆ opacityMicromapIndexBuffer

D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::opacityMicromapIndexBuffer

Optional buffer specifying which OMM index to use for each triangle; if NULL, there is a 1:1 mapping between input triangles and OMM Array entries. Special values can be used to encode OMMs with uniform state for individual triangles (see NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_SPECIAL_INDEX). For BLAS updates, this input buffer must match that of the original build if the NVAPI_D3D12_RAYTRACING_ACCELERATION_STRUCTURE_BUILD_FLAG_ALLOW_OMM_UPDATE_EX build flag is not set.

◆ opacityMicromapIndexFormat

DXGI_FORMAT _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::opacityMicromapIndexFormat

Format of opacityMicromapIndexBuffer, either DXGI_FORMAT_R32_UINT or DXGI_FORMAT_R16_UINT.

◆ osRenderQueueEndTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::osRenderQueueEndTime

◆ osRenderQueueStartTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::osRenderQueueStartTime

◆ outConfig [1/6]

NVVIOOUTPUTCONFIG_V1 _NVVIOCONFIG_V1::outConfig

Output device configuration.

◆ [] [2/6]

NVVIOOUTPUTCONFIG_V1 { ... } ::outConfig

Output device configuration.

◆ [] [3/6]

NVVIOOUTPUTCONFIG_V2 { ... } ::outConfig

Output device configuration.

◆ outConfig [4/6]

NVVIOOUTPUTCONFIG_V2 _NVVIOCONFIG_V2::outConfig

Output device configuration.

◆ [] [5/6]

NVVIOOUTPUTCONFIG_V3 { ... } ::outConfig

Output device configuration.

◆ outConfig [6/6]

NVVIOOUTPUTCONFIG_V3 _NVVIOCONFIG_V3::outConfig

Output device configuration.

◆ outFlags

NvU64 NVAPI_UAV_INFO_V2::outFlags

◆ outputArea [1/3]

NVVIOOUTPUTAREA _NVVIOOUTPUTCONFIG_V1::outputArea

Usable resolution for video output (safe area)

◆ outputArea [2/3]

NVVIOOUTPUTAREA _NVVIOOUTPUTCONFIG_V2::outputArea

Usable resolution for video output (safe area)

◆ outputArea [3/3]

NVVIOOUTPUTAREA _NVVIOOUTPUTCONFIG_V3::outputArea

Usable resolution for video output (safe area)

◆ outputId

NvU32 NVVIOTOPOLOGYTARGET::outputId

outputId will be 0 for GVI device.

deviceMask of the SDI display connected to GVO device.

◆ OutputPrepool

NV_META_COMMAND_BOOL NV_META_COMMAND_CONVOLUTION_FUSE_DESC::OutputPrepool

◆ outputRegion [1/3]

NVVIOOUTPUTREGION _NVVIOOUTPUTCONFIG_V1::outputRegion

Region for video output (Desktop mode)

◆ outputRegion [2/3]

NVVIOOUTPUTREGION _NVVIOOUTPUTCONFIG_V2::outputRegion

Region for video output (Desktop mode)

◆ outputRegion [3/3]

NVVIOOUTPUTREGION _NVVIOOUTPUTCONFIG_V3::outputRegion

Region for video output (Desktop mode)

◆ OutputResource [1/4]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::OutputResource

◆ OutputResource [2/4]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::OutputResource

◆ OutputResource [3/4]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::OutputResource

◆ OutputResource [4/4]

NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::OutputResource

◆ outputVideoLocked

NvU32 _NVVIOOUTPUTSTATUS::outputVideoLocked

Output locked status.

◆ outStatus [1/2]

NVVIOOUTPUTSTATUS _NVVIOSTATUS::outStatus

Output device status.

◆ [] [2/2]

NVVIOOUTPUTSTATUS { ... } ::outStatus

Output device status.

◆ [struct]

struct { ... } _NV_GPU_PERF_PSTATES20_INFO_V2::ov

OV settings - Please refer to NVIDIA over-volting recommendation to understand impact of this functionality Valid index range is 0 to numVoltages-1

◆ overlapX [1/6]

NvS32 NV_MOSAIC_TOPO_DETAILS::overlapX

Pixels of overlap on left of target: (+overlap, -gap)

◆ [] [2/6]

NvS32 { ... } ::overlapX

Pixels of overlap on left of target: (+overlap, -gap)

◆ overlapX [3/6]

NvS32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::overlapX

(+overlap, -gap)

◆ overlapX [4/6]

NvS32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::overlapX

(+overlap, -gap)

◆ overlapX [5/6]

NvS32 NV_MOSAIC_TOPOLOGY::overlapX

Pixels of overlap on the left of target: (+overlap, -gap)

◆ [] [6/6]

NvS32 { ... } ::overlapX

Pixels of overlap on the left of target: (+overlap, -gap)

◆ overlapY [1/6]

NvS32 NV_MOSAIC_TOPO_DETAILS::overlapY

Pixels of overlap on top of target: (+overlap, -gap)

◆ [] [2/6]

NvS32 { ... } ::overlapY

Pixels of overlap on top of target: (+overlap, -gap)

◆ overlapY [3/6]

NvS32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::overlapY

(+overlap, -gap)

◆ overlapY [4/6]

NvS32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::overlapY

(+overlap, -gap)

◆ overlapY [5/6]

NvS32 NV_MOSAIC_TOPOLOGY::overlapY

Pixels of overlap on the top of target: (+overlap, -gap)

◆ [] [6/6]

NvS32 { ... } ::overlapY

Pixels of overlap on the top of target: (+overlap, -gap)

◆ ownerId

NVVIOOWNERID _NVVIOCAPS::ownerId

Unique identifier for owner of video output (NVVIOOWNERID_INVALID if free running)

◆ ownerType [1/2]

NVVIOOWNERTYPE _NVVIOCAPS::ownerType

Owner type (OpenGL application or Desktop mode)

◆ ownerType [2/2]

NvU32 NVVIOOWNERTYPE ownerType

◆ pAdapterCaps

NVVIOCAPS* pAdapterCaps

◆ Padding [1/2]

NV_META_COMMAND_PADDING_DESC NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Padding

◆ Padding [2/2]

float _NV_SMP_ASSIST_REMAPCBDATA_V1::Padding[2]

◆ pAnselFeatures

NVAPI_ANSEL_FEATURE_CONFIGURATION_STRUCT* NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::pAnselFeatures

Array of features configurations.

◆ Params

float NV_META_COMMAND_ACTIVATION_DESC::Params[NV_META_COMMAND_ACTIVATION_MAX_PARAMS]

◆ paramSize [1/2]

NvU32 _NVAPI_CU_KERNEL_LAUNCH_PARAMS::paramSize

◆ paramSize [2/2]

NvU32 _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::paramSize

◆ parity [1/2]

NvU32 _NV_HDR_CAPABILITIES_V3::parity

resolution and frame-rate relationships between Dolby Vision and other video processing

◆ [] [2/2]

NvU32 { ... } ::parity

resolution and frame-rate relationships between Dolby Vision and other video processing

◆ path [1/2]

NV_DISPLAY_PATH NV_DISPLAY_PATH_INFO::path[NVAPI_ADVANCED_MAX_DISPLAY_PATH]

◆ path [2/2]

NV_DISPLAY_PATH NV_DISPLAY_PATH_INFO_V3::path[NVAPI_MAX_DISPLAY_PATH]

◆ pbCompatible

NvU32 NvU32 NvU32* pbCompatible

◆ pbData [1/3]

NvU8* NV_I2C_INFO_V1::pbData

The buffer of data which is to be read or written (depending on the command).

◆ pbData [2/3]

NvU8* NV_I2C_INFO_V2::pbData

The buffer of data which is to be read or written (depending on the command).

◆ pbData [3/3]

NvU8* NV_I2C_INFO_V3::pbData

The buffer of data which is to be read or written (depending on the command).

◆ pbI2cRegAddress [1/3]

NvU8* NV_I2C_INFO_V1::pbI2cRegAddress

The I2C target register address. May be NULL, which indicates no register address should be sent.

◆ pbI2cRegAddress [2/3]

NvU8* NV_I2C_INFO_V2::pbI2cRegAddress

The I2C target register address. May be NULL, which indicates no register address should be sent.

◆ pbI2cRegAddress [3/3]

NvU8* NV_I2C_INFO_V3::pbI2cRegAddress

The I2C target register address. May be NULL, which indicates no register address should be sent.

◆ pCallbackParam [1/2]

void* _NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1::pCallbackParam

[in] Generic callback parameter which will be passed to the callback.

◆ pCallbackParam [2/2]

void* _NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1::pCallbackParam

[out] Generic callback parameter which was passed in at registration time.

◆ pciBus

NvU32 _NVVIOPCIINFO::pciBus

specifies the PCI bus number of the GVI device.

◆ pciDeviceId [1/2]

NvU32 NVLINK_DEVICE_INFO_V1::pciDeviceId

◆ pciDeviceId [2/2]

NvU32 _NVVIOPCIINFO::pciDeviceId

specifies the internal PCI device identifier for the GVI.

◆ pciDomain

NvU32 _NVVIOPCIINFO::pciDomain

specifies the PCI domain of the GVI device.

◆ pciLinkRate

NVVIOPCILINKRATE _NVVIOPCIINFO::pciLinkRate

specifies the the negotiated PCIE link rate.

◆ pciLinkWidth

NVVIOPCILINKWIDTH _NVVIOPCIINFO::pciLinkWidth

specifies the the negotiated PCIE link width.

◆ pciRevisionId

NvU32 _NVVIOPCIINFO::pciRevisionId

specifies the internal PCI device-specific revision identifier for the GVI.

◆ pciSlot

NvU32 _NVVIOPCIINFO::pciSlot

specifies the PCI slot number of the GVI device.

◆ pciSubSystemId

NvU32 _NVVIOPCIINFO::pciSubSystemId

specifies the internal PCI subsystem identifier for the GVI.

◆ pclk

NvU32 _NV_TIMING::pclk

pixel clock in 10 kHz

◆ pConfig

const NVVIOCONFIG * pConfig

◆ pCoordinateSwizzling [1/4]

NvAPI_D3D11_SWIZZLE_MODE* NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::pCoordinateSwizzling

◆ pCoordinateSwizzling [2/4]

NvAPI_D3D11_SWIZZLE_MODE* NvAPI_D3D11_CREATE_FASTGS_EXPLICIT_DESC_V1::pCoordinateSwizzling

◆ pCoordinateSwizzling [3/4]

NvAPI_D3D11_SWIZZLE_MODE* NVAPI_D3D12_PSO_CREATE_FASTGS_EXPLICIT_DESC_V1::pCoordinateSwizzling

◆ pCoordinateSwizzling [4/4]

NvAPI_D3D11_SWIZZLE_MODE* NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::pCoordinateSwizzling

◆ pCSC

NVVIOCOLORCONVERSION * pCSC

◆ pCubin

const void* NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::pCubin

[in] pointer to blob containing the cubin

◆ pCustomSemantics [1/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::pCustomSemantics

◆ pCustomSemantics [2/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V1::pCustomSemantics

◆ pCustomSemantics [3/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V2::pCustomSemantics

◆ pCustomSemantics [4/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::pCustomSemantics

◆ pCustomSemantics [5/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_HULL_SHADER_EX_V1::pCustomSemantics

◆ pCustomSemantics [6/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::pCustomSemantics

◆ pCustomSemantics [7/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V1::pCustomSemantics

◆ pCustomSemantics [8/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V2::pCustomSemantics

◆ pCustomSemantics [9/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::pCustomSemantics

◆ pCustomSemantics [10/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V1::pCustomSemantics

◆ pCustomSemantics [11/15]

NV_CUSTOM_SEMANTIC* NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::pCustomSemantics

◆ pCustomSemantics [12/15]

NV_CUSTOM_SEMANTIC* NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::pCustomSemantics

◆ pCustomSemantics [13/15]

NV_CUSTOM_SEMANTIC* NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V1::pCustomSemantics

◆ pCustomSemantics [14/15]

NV_CUSTOM_SEMANTIC* NVAPI_D3D12_PSO_HULL_SHADER_DESC_V1::pCustomSemantics

◆ pCustomSemantics [15/15]

NV_CUSTOM_SEMANTIC* NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V1::pCustomSemantics

◆ pDataFormatDetail

NvU32 NVVIODATAFORMATDETAIL* pDataFormatDetail

◆ pDesc [1/8]

const NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS* _NVAPI_GET_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::pDesc

[in] Description of the DMM Array build.

◆ pDesc [2/8]

const NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS* _NVAPI_GET_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::pDesc

[in] Description of the OMM Array build.

◆ pDesc [3/8]

const NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX* _NVAPI_GET_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO_EX_PARAMS_V1::pDesc

[in] Description of the acceleration-structure build.

◆ pDesc [4/8]

const NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_DESC* _NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::pDesc

[in] Description of the OMM Array build.

◆ pDesc [5/8]

const NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_DESC* _NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::pDesc

[in] Description of the DMM Array build.

◆ pDesc [6/8]

const NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_DESC* _NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::pDesc

[in] Description of which postbuild info to emit.

◆ pDesc [7/8]

const NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_DESC* _NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::pDesc

[in] Description of which postbuild info to emit.

◆ pDesc [8/8]

const NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX* _NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_V1::pDesc

[in] Description of the acceleration structure to build.

◆ pDevice [1/5]

__in ID3D12Device* _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::pDevice

The ID3D12Device created by application.

◆ pDevice [2/5]

__in ID3D12Device* _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pDevice

The ID3D12Device created by application.

◆ pDevice [3/5]

ID3D12Device* NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::pDevice

[in] pointer to ID3D12Device object

◆ pDevice [4/5]

ID3D12Device* NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::pDevice

[in] pointer to ID3D12Device object

◆ pDevice [5/5]

ID3D12Device* NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::pDevice

[in] Pointer to ID3D12Device object

◆ pDMMUsageCounts [1/2]

const NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT* _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::pDMMUsageCounts

Usage counts for each subdivision level and format combination across all the DMM entries in the build.

◆ pDMMUsageCounts [2/2]

const NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT* _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::pDMMUsageCounts

Usage counts for each subdivision level and format combination across all the DMM entries referred-to by the DMM index buffer specified by this geometry.

◆ [] [1/2]

NvU16 { ... } ::peak_luminance_index

Peak luminance index.

◆ peak_luminance_index [2/2]

NvU16 _NV_HDR_CAPABILITIES_V3::peak_luminance_index

Peak luminance index.

◆ pEDID [1/2]

NvU8* _NV_EDID_DATA_V1::pEDID

Pointer to EDID data.

◆ pEDID [2/2]

NvU8* _NV_EDID_DATA_V2::pEDID

Pointer to EDID data.

◆ [] [1/2]

NvU32 { ... } ::percentage

Percentage of time where the domain is considered busy in the last 1 second interval.

◆ percentage [2/2]

NvU32 NV_GPU_DYNAMIC_PSTATES_INFO_EX::percentage

Percentage of time where the domain is considered busy in the last 1 second interval.

◆ PerChannelScaling

NV_META_COMMAND_BOOL NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::PerChannelScaling

◆ perDMMDescs

D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_INPUTS::perDMMDescs

GPU array with one NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DESC entry per DMM.

◆ PeripheralRegionShadingRate

NV_PIXEL_SHADING_RATE _NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1::PeripheralRegionShadingRate

(IN) Shading Rate for the peripheral region of the foveated rendering pattern

◆ perOMMDescs

D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::perOMMDescs

GPU array with one NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_DESC entry per OMM.

◆ PersistentResource [1/8]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_INITIALIZE_CONVOLUTION_EX_DESC::PersistentResource

◆ PersistentResource [2/8]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::PersistentResource

◆ PersistentResource [3/8]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_INITIALIZE_GEMM_DESC::PersistentResource

◆ PersistentResource [4/8]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::PersistentResource

◆ PersistentResource [5/8]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_INITIALIZE_CONVOLUTION_EX_DESC::PersistentResource

◆ PersistentResource [6/8]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::PersistentResource

◆ PersistentResource [7/8]

NvU64 NV_D3D12_META_COMMAND_INITIALIZE_GEMM_DESC::PersistentResource

◆ PersistentResource [8/8]

NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::PersistentResource

◆ pFastGSCBData

NV_SMP_ASSIST_FASTGSCBDATA_V1* _NV_SMP_ASSIST_GET_CONSTANTS_V3::pFastGSCBData

(OUT) If not NULL, this will contain constant buffer data to supply the FastGS for culling primitives per-viewport

◆ pFastGSCBDataMRS_IS

NV_SMP_ASSIST_FASTGSCBDATA_MRS_INSTANCED_STEREO_V1* _NV_SMP_ASSIST_GET_CONSTANTS_V3::pFastGSCBDataMRS_IS

(OUT) If non-NULL and eSMPAssistType is MRS and eEyeIndex is NV_SMP_ASSIST_EYE_INDEX_INSTANCED_STEREO then MRS Instanced stereo FastGS constant buffer data will be populated

◆ pGamma

NVVIOGAMMACORRECTION * pGamma

◆ [] [1/2]

const NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX* { ... } ::pGeometryDescs

If type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_BOTTOM_LEVEL and descLayout is D3D12_ELEMENTS_LAYOUT_ARRAY, it contains the descriptions of all geometries to be built into a BLAS. Otherwise, this parameter is unused (space repurposed in a union).

◆ pGeometryDescs [2/2]

const NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX* _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::pGeometryDescs

If type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_BOTTOM_LEVEL and descLayout is D3D12_ELEMENTS_LAYOUT_ARRAY, it contains the descriptions of all geometries to be built into a BLAS. Otherwise, this parameter is unused (space repurposed in a union).

◆ phaseOffsetms

NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::phaseOffsetms

Time in ms to offset the cycle relative to other zones.

◆ physicalGpuCount

NvU32 _NV_LOGICAL_GPU_DATA_V1::physicalGpuCount

[out] Number of physical GPU handles associated with the specified logical GPU handle.

◆ physicalGpuHandles

NvPhysicalGpuHandle _NV_LOGICAL_GPU_DATA_V1::physicalGpuHandles[NVAPI_MAX_PHYSICAL_GPUS]

[out] This array will be filled with physical GPU handles associated with the given logical GPU handle. The array index refers to the Physical Gpu Index (Idx). Idx value is the same as D3D11 MultiGPUDevice GPU index, D3D12 node index, OpenGL GL_NV_gpu_multicast GPU index. When converted to a bit mask (1 << Idx), it matches:

  1. Vulkan deviceNodeMask in VkPhysicalDeviceIDProperties
  2. CUDA deviceNodeMask returned by cuDeviceGetLuid

◆ phyType [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::phyType

This field specifies the type of PHY (NVHS or GRS) being used for this link.

◆ phyType [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::phyType

This field specifies the type of PHY (NVHS or GRS) being used for this link.

◆ phyVersion [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::phyVersion

This field specifies the version of PHY being used by the link.

◆ phyVersion [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::phyVersion

This field specifies the version of PHY being used by the link.

◆ picAspectRatio

NvU32 NV_INFOFRAME_VIDEO::picAspectRatio

◆ pIdentifierToCheck

const D3D12_SERIALIZED_DATA_DRIVER_MATCHING_IDENTIFIER* _NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_V1::pIdentifierToCheck

[in] Identifier from the header of the serialized data to check with the driver; see D3D12_SERIALIZED_DATA_DRIVER_MATCHING_IDENTIFIER. Information about how to retrieve that identifier can be found in the description of each NVAPI_D3D12_SERIALIZED_DATA_TYPE_EX enum.

◆ [] [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_COLOR_FIXED { ... } ::piecewiseLinearColorFixed

◆ piecewiseLinearColorFixed [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_COLOR_FIXED _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::piecewiseLinearColorFixed

◆ piecewiseLinearData [1/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGB::piecewiseLinearData

◆ piecewiseLinearData [2/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_COLOR_FIXED::piecewiseLinearData

◆ piecewiseLinearData [3/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGBW::piecewiseLinearData

◆ piecewiseLinearData [4/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_SINGLE_COLOR::piecewiseLinearData

◆ [] [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGB { ... } ::piecewiseLinearRGB

◆ piecewiseLinearRGB [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGB _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::piecewiseLinearRGB

◆ [] [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGBW { ... } ::piecewiseLinearRGBW

◆ piecewiseLinearRGBW [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGBW _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::piecewiseLinearRGBW

◆ piecewiseLinearSingleColor [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_SINGLE_COLOR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::piecewiseLinearSingleColor

◆ [] [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_SINGLE_COLOR { ... } ::piecewiseLinearSingleColor

◆ pInfo [1/3]

NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO* _NVAPI_GET_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::pInfo

[out] Result of the query.

◆ pInfo [2/3]

NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO* _NVAPI_GET_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::pInfo

[out] Result of the query.

◆ pInfo [3/3]

D3D12_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO* _NVAPI_GET_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO_EX_PARAMS_V1::pInfo

[out] Result of the query.

◆ Pixel_1x2

NV_PIXEL_SRSO_1x2 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_1x2

◆ Pixel_2x1

NV_PIXEL_SRSO_2x1 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_2x1

◆ Pixel_2x2

NV_PIXEL_SRSO_2x2 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_2x2

◆ Pixel_2x4

NV_PIXEL_SRSO_2x4 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_2x4

◆ Pixel_4x2

NV_PIXEL_SRSO_4x2 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_4x2

◆ Pixel_4x4

NV_PIXEL_SRSO_4x4 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::Pixel_4x4

◆ pixelRepeat

NvU32 NV_INFOFRAME_VIDEO::pixelRepeat

◆ pixelShift

NvU32 _NV_MOSAIC_GRID_TOPO_V2::pixelShift

Enable Pixel shift.

◆ pixelShiftType

NV_PIXEL_SHIFT_TYPE _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::pixelShiftType

Type of the pixel shift enabled display.

◆ pNodeMask

__inout NvU32* _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pNodeMask

An optional array to hold the GPU mask where this viewport must be valid per partition. When this is valid pViewport must also be valid.

◆ polarity [1/2]

NVAPI_GSYNC_POLARITY _NV_GSYNC_CONTROL_PARAMS_V1::polarity

Leading edge / Falling edge / both.

◆ polarity [2/2]

NVAPI_GSYNC_POLARITY _NV_GSYNC_CONTROL_PARAMS_V2::polarity

Leading edge / Falling edge / both.

◆ pOMMUsageCounts [1/2]

const NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT* _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_INPUTS::pOMMUsageCounts

Usage counts for each subdivision level and format combination across all the OMM entries in the build.

◆ pOMMUsageCounts [2/2]

const NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT* _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_ATTACHMENT_DESC::pOMMUsageCounts

Usage counts for each subdivision level and format combination across all the OMM entries referred-to by the OMM index buffer specified by this geometry.

◆ PoolMode

NV_META_COMMAND_CONVOLUTION_POOL_MODE NV_META_COMMAND_CONVOLUTION_FUSE_DESC::PoolMode

◆ portId

NvU8 NV_I2C_INFO_V3::portId

The portid on which device is connected (remember to set bIsPortIdSet if this value is set) Optional for pre-Kepler

◆ pOSAdapterID

void* _NV_DISPLAYCONFIG_PATH_INFO_V2::pOSAdapterID

Used by Non-NVIDIA adapter for pointer to OS Adapter of LUID type, type casted to void *.

◆ pOSAdapterId

void* _NV_LOGICAL_GPU_DATA_V1::pOSAdapterId

[out] Returns OS-AdapterId. User must send memory buffer of size atleast equal to the size of LUID structure before calling the NVAPI.

◆ position

NV_POSITION _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::position

Is all positions are 0 or invalid, displays will be automatically positioned from left to right with GDI Primary at 0,0, and all other displays in the order of the path array.

◆ positionX

NvS32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::positionX

[in][out] Metadata for the virtual horizontal position for the display connector specified by displayId.

◆ positionY

NvS32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::positionY

[in][out] Metadata for the virtual vertical position for the display connector specified by displayId.

◆ PostZCoverage

BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::PostZCoverage

◆ PostZCoverageEnable [1/2]

bool NvAPI_D3D11_RASTERIZER_DESC_EX::PostZCoverageEnable

◆ PostZCoverageEnable [2/2]

bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::PostZCoverageEnable

◆ posx

NvU32 NV_DISPLAY_PATH::posx

(IN/OUT) X-offset of this display on the Windows desktop

◆ posy

NvU32 NV_DISPLAY_PATH::posy

(IN/OUT) Y-offset of this display on the Windows desktop

◆ pParams [1/2]

void const* _NVAPI_CU_KERNEL_LAUNCH_PARAMS::pParams

◆ pParams [2/2]

void const* _NVAPI_CU_KERNEL_LAUNCH_PARAMS_EX::pParams

◆ pPartitionCount

__inout NvU32* _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pPartitionCount

A variable to receive the number of NV_MGPU_MOSAIC_DISPLAY_SURFACE_PARTITION elements returned or that holds the size of pPartitions when it is non-NULL.

◆ ppBufferDesc

D3D11_BUFFER_DESC** _NV_D3D_LATELATCH_OBJECT_DESC_V1::ppBufferDesc

◆ ppCompanionResources

__inout ID3D12Resource** _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::ppCompanionResources

An array of ID3D12Resource pointers sized to match companionBufferCount, which will receive the companion allocations.

◆ ppD3DLateLatchObject

ID3DLateLatchObject** _NV_D3D_LATELATCH_OBJECT_DESC_V1::ppD3DLateLatchObject

◆ ppD3DNvSMPAssist

ID3DNvSMPAssist** _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::ppD3DNvSMPAssist

(OUT) Interface pointer returned by the Init call. Use for future Enable/Disable etc. calls

◆ ppGeometryDescs [1/2]

const NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX* const* _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::ppGeometryDescs

If type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_BOTTOM_LEVEL and descLayout is D3D12_ELEMENTS_LAYOUT_ARRAY_OF_POINTERS, it contains the addresses of descriptions for all geometries to be built into a BLAS. Otherwise, this parameter is unused (space repurposed in a union).

◆ [] [2/2]

const NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX* const* { ... } ::ppGeometryDescs

If type is D3D12_RAYTRACING_ACCELERATION_STRUCTURE_BOTTOM_LEVEL and descLayout is D3D12_ELEMENTS_LAYOUT_ARRAY_OF_POINTERS, it contains the addresses of descriptions for all geometries to be built into a BLAS. Otherwise, this parameter is unused (space repurposed in a union).

◆ ppNvGazeHandler [1/2]

ID3DNvGazeHandler_V2** _NV_GAZE_HANDLER_INIT_PARAMS_V2::ppNvGazeHandler

(OUT) Interface for Gaze Data Handler

◆ ppNvGazeHandler [2/2]

ID3DNvGazeHandler_V1** _NV_GAZE_HANDLER_INIT_PARAMS_V1::ppNvGazeHandler

(OUT) Interface for Gaze Data Handler

◆ pPostbuildInfoDescs [1/3]

const NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_DESC* _NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::pPostbuildInfoDescs

[in] Optional array of descriptions for postbuild info to generate describing properties of the acceleration structure that was built. [in] Any given postbuild info type, D3D12_RAYTRACING_ACCEELRATION_STRUCTURE_POSTBUILD_INFO_TYPE, can only be selected for output by at most one array entry.

◆ pPostbuildInfoDescs [2/3]

const NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_DESC* _NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::pPostbuildInfoDescs

[in] Optional array of descriptions for postbuild info to generate describing properties of the acceleration structure that was built. [in] Any given postbuild info type, D3D12_RAYTRACING_ACCEELRATION_STRUCTURE_POSTBUILD_INFO_TYPE, can only be selected for output by at most one array entry.

◆ pPostbuildInfoDescs [3/3]

const D3D12_RAYTRACING_ACCELERATION_STRUCTURE_POSTBUILD_INFO_DESC* _NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_V1::pPostbuildInfoDescs

[in] Optional array of descriptions for postbuild info to generate describing properties of the acceleration structure that was built. Any given postbuild info type, D3D12_RAYTRACING_ACCEELRATION_STRUCTURE_POSTBUILD_INFO_TYPE, can only be selected for output by at most one array entry.

◆ ppShadingRateResource

IUnknown** _NV_VRS_HELPER_GET_SHADING_RATE_RESOURCE_PARAMS_V1::ppShadingRateResource

(OUT) Pointer to 2D Texture resource with currently applied shading rate pattern

◆ ppVRSHelper

ID3DNvVRSHelper_V1** _NV_VRS_HELPER_INIT_PARAMS_V1::ppVRSHelper

(OUT) Interface for Shading Rate Pattern Tracker

◆ Precision [1/2]

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Precision

◆ Precision [2/2]

NvU64 NV_META_COMMAND_CREATE_GEMM_DESC::Precision

◆ pRects

NV_D3D11_EXCLUSIVE_SCISSOR_RECT_DESC_V1* _NV_D3D11_EXCLUSIVE_SCISSOR_RECTS_DESC_V1::pRects

(IN) Array of NV_D3D11_EXCLUSIVE_SCISSOR_RECT_DESC with number of elements equal to Exclusive Scissor Rects

◆ pRemapCBData

NV_SMP_ASSIST_REMAPCBDATA_V1* _NV_SMP_ASSIST_GET_CONSTANTS_V3::pRemapCBData

(OUT) If not NULL, this will contain constant buffer data to supply the UV-remapping helper functions

◆ PresentCount

NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::PresentCount

The total count of times that a frame has been presented from this client after it joined presentBarrier successfully.

◆ presentEndTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::presentEndTime

◆ presentFrameID

NvU64 _NV_ASYNC_FRAME_MARKER_PARAMS_V1::presentFrameID

◆ PresentInSyncCount

NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::PresentInSyncCount

The total count of times that a frame has been presented from this client and that has happened since the returned SyncMode is PRESENT_BARRIER_SYNC_SYSTEM or PRESENT_BARRIER_SYNC_CLUSTER. If the returned SyncMode is any other mode, this value is 0. This count is set back to 0 in case the SyncMode switches away from PRESENT_BARRIER_SYNC_SYSTEM or PRESENT_BARRIER_SYNC_CLUSTER.

◆ presentStartTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::presentStartTime

◆ primary

NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::primary

(IN) Declares primary display in clone configuration. This is NOT GDI Primary. Only one target can be primary per source. If no primary is specified, the first target will automatically be primary.

◆ productName [1/3]

NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V2::productName

Nvidia Grid licensable product name.

◆ productName [2/3]

NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V3::productName

Nvidia Grid licensable product name.

◆ productName [3/3]

NvAPI_LicenseString _NV_LICENSE_FEATURE_DETAILS_V4::productName

Nvidia Grid licensable product name.

◆ profileName

NvAPI_UnicodeString _NVDRS_PROFILE_V1::profileName

String name of the Profile.

◆ ProgrammableSamplePositions

BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::ProgrammableSamplePositions

◆ ProgrammableSamplePositionsEnable [1/2]

bool NvAPI_D3D11_RASTERIZER_DESC_EX::ProgrammableSamplePositionsEnable

◆ ProgrammableSamplePositionsEnable [2/2]

bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::ProgrammableSamplePositionsEnable

◆ projectionSizeHeight

float _NV_SMP_ASSIST_GET_CONSTANTS_V3::projectionSizeHeight

(OUT)

◆ projectionSizeWidth

float _NV_SMP_ASSIST_GET_CONSTANTS_V3::projectionSizeWidth

(OUT) MRS/LMS projection size

◆ property [1/2]

NV_INFOFRAME_PROPERTY NV_INFOFRAME_DATA::property

This is NVIDIA-specific and corresponds to the property cmds and associated infoframe.

◆ [] [2/2]

NV_INFOFRAME_PROPERTY { ... } ::property

This is NVIDIA-specific and corresponds to the property cmds and associated infoframe.

◆ provIdx

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::provIdx

Provider index for representing logical to physical zone mapping.

◆ pScissors [1/2]

D3D11_RECT* _NV_CUSTOM_RECTS_V1::pScissors[NV_SMP_ASSIST_MINIMAL_LEVEL_NUM_EYE_INDICES]

(IN) Scissors, for each eye index, that should be set when app calls Enable(eyeIndex)

◆ pScissors [2/2]

D3D11_RECT* _NV_SMP_ASSIST_GET_CONSTANTS_V3::pScissors

(OUT) If not NULL, this will contain the scissors computed by the driver based on init params

◆ psfSignalFormat [1/3]

NvU32 _NVVIOOUTPUTCONFIG_V1::psfSignalFormat

Indicates whether contained format is PSF Signal format.

◆ psfSignalFormat [2/3]

NvU32 _NVVIOOUTPUTCONFIG_V2::psfSignalFormat

Indicates whether contained format is PSF Signal format.

◆ psfSignalFormat [3/3]

NvU32 _NVVIOOUTPUTCONFIG_V3::psfSignalFormat

Indicates whether contained format is PSF Signal format.

◆ pShaderName

const char* NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::pShaderName

[in] pointer to shader name, acts as identifier for SLI special handling, doesn't need to be accurate

◆ pSignalFormatDetail

NvU32 NVVIOSIGNALFORMATDETAIL* pSignalFormatDetail

◆ psoExtension

NV_PSO_EXTENSION NVAPI_D3D12_PSO_EXTENSION_DESC_V1::psoExtension

◆ pSources [1/2]

const D3D12_GPU_VIRTUAL_ADDRESS* _NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::pSources

[in] List of DMM Arrays for which postbuild info should be emitted.

◆ pSources [2/2]

const D3D12_GPU_VIRTUAL_ADDRESS* _NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::pSources

[in] List of OMM Arrays for which postbuild info should be emitted.

◆ [] [1/8]

NV_GPU_PERF_PSTATE_ID { ... } ::pstateId

ID of the P-State.

◆ pstateId [2/8]

NV_GPU_PERF_PSTATE_ID NV_GPU_PERF_PSTATES20_INFO_V1::pstateId

ID of the P-State.

◆ [] [3/8]

NV_GPU_PERF_PSTATE_ID { ... } ::pstateId

ID of the P-State.

◆ pstateId [4/8]

NV_GPU_PERF_PSTATE_ID _NV_GPU_PERF_PSTATES20_INFO_V2::pstateId

ID of the P-State.

◆ pstateId [5/8]

NV_GPU_PERF_PSTATE_ID NV_GPU_PERF_PSTATES_INFO_V1::pstateId

ID of the p-state.

◆ [] [6/8]

NV_GPU_PERF_PSTATE_ID { ... } ::pstateId

ID of the p-state.

◆ [] [7/8]

NV_GPU_PERF_PSTATE_ID { ... } ::pstateId

ID of the p-state.

◆ pstateId [8/8]

NV_GPU_PERF_PSTATE_ID NV_GPU_PERF_PSTATES_INFO_V2::pstateId

ID of the p-state.

◆ [struct] [1/4]

struct { ... } NV_GPU_PERF_PSTATES_INFO_V1::pstates[NVAPI_MAX_GPU_PERF_PSTATES]

◆ [struct] [2/4]

struct { ... } NV_GPU_PERF_PSTATES_INFO_V2::pstates[NVAPI_MAX_GPU_PERF_PSTATES]

Valid index range is 0 to numVoltages-1.

◆ [struct] [3/4]

struct { ... } NV_GPU_PERF_PSTATES20_INFO_V1::pstates[NVAPI_MAX_GPU_PSTATE20_PSTATES]

Performance state (P-State) settings Valid index range is 0 to numPstates-1

◆ [struct] [4/4]

struct { ... } _NV_GPU_PERF_PSTATES20_INFO_V2::pstates[NVAPI_MAX_GPU_PSTATE20_PSTATES]

Performance state (P-State) settings Valid index range is 0 to numPstates-1

◆ pSwapChainBuffer [1/2]

__in ID3D12Resource* _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::pSwapChainBuffer

The ID3D12Resource part of the application swap chain that has companion allocations.

◆ pSwapChainBuffer [2/2]

__in ID3D12Resource* _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pSwapChainBuffer

The ID3D12Resource part of the application swap chain.

◆ pSyncDelay

NVVIOSYNCDELAY * pSyncDelay

◆ pViewport

__inout RECT* _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::pViewport

An optional array to hold the viewport information per partition. When this is valid pNodeMask must also be valid.

◆ pViewports [1/3]

NV_D3D11_VIEWPORT_SHADING_RATE_DESC_V1* _NV_D3D11_VIEWPORTS_SHADING_RATE_DESC_V1::pViewports

(IN) Array of NV_D3D11_VIEWPORT_SHADING_RATE_DESC with number of elements equal to NumViewports

◆ pViewports [2/3]

D3D11_VIEWPORT* _NV_CUSTOM_RECTS_V1::pViewports[NV_SMP_ASSIST_MINIMAL_LEVEL_NUM_EYE_INDICES]

(IN) Viewports, for each eye index, that should be set when app calls Enable(eyeIndex)

◆ pViewports [3/3]

D3D11_VIEWPORT* _NV_SMP_ASSIST_GET_CONSTANTS_V3::pViewports

(OUT) If not NULL, this will contain the viewports computed by driver based on init params

◆ pVioPCIInfo

__inout NVVIOPCIINFO* pVioPCIInfo

◆ pWait

NvU32* pWait

◆ qsyncEvent

NV_QSYNC_EVENT NV_QSYNC_EVENT_DATA::qsyncEvent

◆ QuadFillMode [1/2]

NVAPI_QUAD_FILLMODE NvAPI_D3D11_RASTERIZER_DESC_EX::QuadFillMode

◆ QuadFillMode [2/2]

NVAPI_QUAD_FILLMODE NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::QuadFillMode

◆ quadro

NvU32 _NVDRS_GPU_SUPPORT::quadro

◆ quantizationRangeRgb

NvU8 _NV_MONITOR_CAPS_VCDB::quantizationRangeRgb

◆ quantizationRangeYcc

NvU8 _NV_MONITOR_CAPS_VCDB::quantizationRangeYcc

◆ [struct] [1/2]

struct { ... } NV_GPU_PSTATE20_CLOCK_ENTRY_V1::range

◆ [struct] [2/2]

struct { ... } NV_GPU_PSTATE20_CLOCK_ENTRY_V1::range

◆ rayTracingCores

NvU32 _NV_GPU_INFO_V2::rayTracingCores

Number of "Ray Tracing Cores" supported by the GPU.

◆ rdmaHeapSize

NvU64 _NV_D3D12_WORKSTATION_FEATURE_RDMA_PROPERTIES::rdmaHeapSize

◆ rdmaInfo [1/2]

NV_D3D12_WORKSTATION_FEATURE_RDMA_PROPERTIES _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::rdmaInfo

(OUT) RDMA feature related information, returned only if workstationFeatureType is NV_D3D12_WORKSTATION_FEATURE_TYPE_RDMA_BAR1_SUPPORT

◆ [] [2/2]

NV_D3D12_WORKSTATION_FEATURE_RDMA_PROPERTIES { ... } ::rdmaInfo

(OUT) RDMA feature related information, returned only if workstationFeatureType is NV_D3D12_WORKSTATION_FEATURE_TYPE_RDMA_BAR1_SUPPORT

◆ RefreshCount

NvU32 _NV_PRESENT_BARRIER_FRAME_STATISTICS::RefreshCount

The total count of v-blanks since the returned SyncMode of this client is PRESENT_BARRIER_SYNC_SYSTEM or PRESENT_BARRIER_SYNC_CLUSTER. If the returned SyncMode is any other mode, this value is 0. This count is set back to 0 in case the SyncMode switches away from PRESENT_BARRIER_SYNC_SYSTEM or PRESENT_BARRIER_SYNC_CLUSTER.

◆ refreshRate [1/3]

NvU32 NV_DISPLAY_PATH::refreshRate

(IN) Refresh rate of the mode

◆ refreshRate [2/3]

NvU32 _NV_GSYNC_STATUS_PARAMS_V1::refreshRate

The refresh rate.

◆ refreshRate [3/3]

NvU32 _NV_GSYNC_STATUS_PARAMS_V2::refreshRate

The refresh rate.

◆ refreshRate1K

NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::refreshRate1K

(IN) Non-interlaced Refresh Rate of the mode, multiplied by 1000, 0 = ignored This is the value which driver reports to the OS.

◆ regAddrSize [1/3]

NvU32 NV_I2C_INFO_V1::regAddrSize

The size in bytes of target register address. If pbI2cRegAddress is NULL, this field must be 0.

◆ regAddrSize [2/3]

NvU32 NV_I2C_INFO_V2::regAddrSize

The size in bytes of target register address. If pbI2cRegAddress is NULL, this field must be 0.

◆ regAddrSize [3/3]

NvU32 NV_I2C_INFO_V3::regAddrSize

The size in bytes of target register address. If pbI2cRegAddress is NULL, this field must be 0.

◆ RegisterMask

NvU32 _NV_CUSTOM_SEMANTIC::RegisterMask

◆ RegisterNum

NvU32 _NV_CUSTOM_SEMANTIC::RegisterNum

◆ registerSpace

NvU32 NVAPI_D3D12_PSO_SET_SHADER_EXTENSION_SLOT_DESC_V1::registerSpace

◆ RegisterSpecified

BOOL _NV_CUSTOM_SEMANTIC::RegisterSpecified

◆ relativeSizeDown

float _NV_LMS_CUSTOM_CONFIG_V1::relativeSizeDown

(IN) LMS params to control the height of the 2 lower quandrants relative to the bounding box height

◆ relativeSizeLeft

float _NV_LMS_CUSTOM_CONFIG_V1::relativeSizeLeft

(IN) LMS params to control the width of the 2 left quandrants relative to the bounding box width

◆ relativeSizeRight

float _NV_LMS_CUSTOM_CONFIG_V1::relativeSizeRight

(IN) LMS params to control the width of the 2 right quandrants relative to the bounding box width

◆ relativeSizeUp

float _NV_LMS_CUSTOM_CONFIG_V1::relativeSizeUp

(IN) LMS params to control the height of the 2 upper quandrants relative to the bounding box height

◆ remoteDeviceInfo [1/2]

NVLINK_DEVICE_INFO_V1 NVLINK_LINK_STATUS_INFO_V1::remoteDeviceInfo

This field stores the GPU information for the remote end of the link.

◆ remoteDeviceInfo [2/2]

NVLINK_DEVICE_INFO_V1 NVLINK_LINK_STATUS_INFO_V2::remoteDeviceInfo

This field stores the device information for the remote end of the link.

◆ remoteDeviceLinkNumber [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::remoteDeviceLinkNumber

This field specifies the link number on the remote end of the link.

◆ remoteDeviceLinkNumber [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::remoteDeviceLinkNumber

This field specifies the link number on the remote end of the link.

◆ RenderMode

NV_VRS_RENDER_MODE _NV_VRS_HELPER_ENABLE_PARAMS_V1::RenderMode

(IN) This defines whether subsequent render calls are for mono/stereo

◆ renderSubmitEndTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::renderSubmitEndTime

◆ renderSubmitStartTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::renderSubmitStartTime

◆ renderTargetIndexOffset

NvU32 _NV_MULTIVIEW_PARAMS_V1::renderTargetIndexOffset[NV_MULTIVIEW_MAX_SUPPORTED_VIEWS]

◆ rep

NvU16 tagNV_TIMINGEXT::rep

Bit-wise pixel repetition factor: 0x1:no pixel repetition; 0x2:each pixel repeats twice horizontally,..

◆ reserved [1/82]

NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::reserved

◆ reserved [2/82]

NvU32 _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::reserved

Must be 0.

◆ reserved [3/82]

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::reserved

Must be 0.

◆ reserved [4/82]

NvU32 NV_GPU_PSTATE20_CLOCK_ENTRY_V1::reserved

These bits are reserved for future use (must be always 0)

◆ reserved [5/82]

NvU32 NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::reserved

These bits are reserved for future use (must be always 0)

◆ reserved [6/82]

NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::reserved

These bits are reserved for future use (must be always 0)

◆ [] [7/82]

NvU32 { ... } ::reserved

These bits are reserved for future use (must be always 0)

◆ reserved [8/82]

NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::reserved

These bits are reserved for future use (must be always 0)

◆ [] [9/82]

NvU32 { ... } ::reserved

These bits are reserved for future use (must be always 0)

◆ reserved [10/82]

NvU32 _NV_GPU_DISPLAYIDS::reserved

must be zero

◆ reserved [11/82]

NvU32 _NV_GPU_VIRTUALIZATION_INFO::reserved

reserved for future use. Should be set to ZERO.

◆ reserved [12/82]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V1::reserved

Reserved.

◆ reserved [13/82]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V2::reserved

Reserved.

◆ reserved [14/82]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V3::reserved

Reserved.

◆ reserved [15/82]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V4::reserved

Reserved.

◆ reserved [16/82]

NvU32 _NV_LICENSABLE_FEATURES_V1::reserved

Reserved.

◆ reserved [17/82]

NvU32 _NV_LICENSABLE_FEATURES_V2::reserved

Reserved.

◆ reserved [18/82]

NvU32 _NV_LICENSABLE_FEATURES_V3::reserved

Reserved.

◆ reserved [19/82]

NvU32 _NV_LICENSABLE_FEATURES_V4::reserved

Reserved.

◆ reserved [20/82]

NvU32 NVLINK_LINK_STATUS_INFO_V1::reserved

Reserved for future use.

◆ reserved [21/82]

NvU32 NVLINK_LINK_STATUS_INFO_V2::reserved

Reserved for future use.

◆ reserved [22/82]

NvU32 _NV_GPU_INFO_V1::reserved

Reserved for future use.

◆ reserved [23/82]

NvU32 _NV_GPU_VR_READY_V1::reserved

◆ reserved [24/82]

NvU32 _NV_GPU_GSP_INFO_V1::reserved

Reserved for future use.

◆ reserved [25/82]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V1::reserved

These bits are reserved for future use.

◆ [] [26/82]

NvU32 { ... } ::reserved

These bits are reserved for future use.

◆ reserved [27/82]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::reserved

These bits are reserved for future use. Must be set to 0.

These bits are reserved for future use.

◆ [] [28/82]

NvU32 { ... } ::reserved

These bits are reserved for future use.

◆ reserved [29/82]

NvU32 _NV_DISPLAY_PORT_INFO_V1::reserved

reserved

◆ reserved [30/82]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::reserved

Reserved.

◆ reserved [31/82]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::reserved

Reserved.

◆ reserved [32/82]

NvU32 NV_INFOFRAME_PROPERTY::reserved

◆ reserved [33/82]

NvU32 _NV_HDR_CAPABILITIES_V1::reserved

◆ reserved [34/82]

NvU32 _NV_HDR_CAPABILITIES_V2::reserved

Should be set to zero All values below are encoded use DolbyVisionHDMITransmissionSpecification document to decode

◆ [] [35/82]

NvU32 { ... } ::reserved

Should be set to zero All values below are encoded use DolbyVisionHDMITransmissionSpecification document to decode

◆ reserved [36/82]

NvU32 _NV_HDR_CAPABILITIES_V3::reserved

Should be set to zero.

All values below are encoded use DolbyVisionHDMITransmissionSpecification document to decode

◆ [] [37/82]

NvU32 { ... } ::reserved

Should be set to zero.

All values below are encoded use DolbyVisionHDMITransmissionSpecification document to decode

◆ reserved [38/82]

NvU16 _NV_HDR_CAPABILITIES_V3::reserved

◆ [] [39/82]

NvU16 { ... } ::reserved

◆ reserved [40/82]

NvU8 _NV_MONITOR_CAPS_GENERIC::reserved

◆ reserved [41/82]

NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::reserved

reserved for future use.

◆ reserved [42/82]

NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::reserved

reserved for future use.

◆ reserved [43/82]

NvU32 NV_SET_PREFERRED_STEREO_DISPLAY_V1::reserved

Reserved for future use without adding versioning.

◆ reserved [44/82]

NvU32 NV_GET_PREFERRED_STEREO_DISPLAY_V1::reserved

Reserved for future use without adding versioning.

◆ reserved [45/82]

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::reserved

[out] Reserved for future use without adding versioning.

◆ reserved [46/82]

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::reserved

[in][out] Reserved for future use without adding versioning.

◆ reserved [47/82]

NvU32 _NV_GET_VRR_INFO_V1::reserved

Reserved for future use.

◆ reserved [48/82]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::reserved

Reserved, must be 0.

◆ reserved [49/82]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::reserved

Reserved, must be 0.

◆ [] [50/82]

NvU32 { ... } ::reserved

(OUT) reserved

◆ reserved [51/82]

NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::reserved

(OUT) reserved

◆ reserved [52/82]

NvU32 _NV_GSYNC_CAPABILITIES_V3::reserved

Reserved for future use.

◆ reserved [53/82]

NvU32 _NV_GSYNC_GPU::reserved

Should be set to ZERO.

◆ reserved [54/82]

NvU32 _NV_GSYNC_DISPLAY::reserved

Should be set to ZERO.

◆ reserved [55/82]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::reserved

should be set zero

◆ reserved [56/82]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::reserved

should be set zero

◆ reserved [57/82]

NvU32 _NV_GSYNC_STATUS_PARAMS_V2::reserved

Reserved for future use.

◆ Reserved [1/2]

NvU32 _NV_CUSTOM_SEMANTIC::Reserved

◆ reserved [58/82]

NvU32 NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::reserved

◆ reserved [59/82]

NvU32 _NV_MULTIGPU_CAPS_V1::reserved

◆ [] [60/82]

NvU32 { ... } ::reserved

◆ reserved [61/82]

NvU32 _NV_MULTIGPU_CAPS_V2::reserved

◆ reserved [62/82]

NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V2::reserved

◆ reserved [63/82]

NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::reserved

◆ reserved [64/82]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::reserved[14]

◆ reserved [65/82]

NvU32 _NV_VRS_HELPER_DISABLE_PARAMS_V1::reserved

(IN) Reserved for future use

◆ reserved [66/82]

NvU32 _NV_VRS_HELPER_PURGE_INTERNAL_RESOURCES_PARAMS_V1::reserved

(IN) Reserved for future use

◆ Reserved [2/2]

NvU32 _NV_SMP_ASSIST_DISABLE_PARAMS_V1::Reserved

(IN) Unused.

◆ reserved [67/82]

NvU32 _NVAPI_STEREO_CAPS::reserved

◆ reserved [68/82]

NvU32 _NVDRS_APPLICATION_V3::reserved

Reserved. Should be 0.

◆ reserved [69/82]

NvU32 _NVDRS_APPLICATION_V4::reserved

Reserved. Should be 0.

◆ reserved [70/82]

NvU32 _NV_DISPLAY_DRIVER_INFO::reserved

Reserved for future use.

◆ reserved [71/82]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::reserved

Reserved for future use.

◆ reserved [72/82]

NvU32 _NV_PHYSICAL_GPUS::reserved[4]

◆ reserved [73/82]

NvU32 _NV_LOGICAL_GPU_HANDLE_DATA::reserved[4]

◆ reserved [74/82]

NvU32 _NV_LOGICAL_GPUS::reserved[4]

◆ reserved [75/82]

NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::reserved[62]

◆ reserved [76/82]

NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::reserved[63]

◆ reserved [77/82]

NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::reserved[6]

◆ reserved [78/82]

NvU32 NV_QSYNC_EVENT_DATA::reserved[7]

◆ reserved [79/82]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V1::reserved[7]

◆ reserved [80/82]

NvU32 _NV_LOGICAL_GPU_DATA_V1::reserved[8]

Reserved for future use. Should be set to ZERO.

◆ reserved [81/82]

NvU32 _NV_EDID_DATA_V2::reserved[8]

Reserved for future use.

◆ reserved [82/82]

NvU32 _NV_MODIFIED_W_PARAMS::reserved[NV_MODIFIED_W_MAX_VIEWPORTS]

◆ reserved0 [1/2]

NvU32 _NV_GPU_INFO_V2::reserved0

Reserved for future use.

◆ reserved0 [2/2]

NvU32 NV_TIMING_FLAG::reserved0

◆ reserved1 [1/2]

NvU64 _NV_GPU_INFO_V2::reserved1

Reserved for future use.

◆ reserved1 [2/2]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::reserved1

These bits are reserved.

◆ reserved10

NvU32 _NVDRS_GPU_SUPPORT::reserved10

◆ reserved11

NvU32 _NVDRS_GPU_SUPPORT::reserved11

◆ reserved12

NvU32 _NVDRS_GPU_SUPPORT::reserved12

◆ reserved13 [1/2]

NvU8 _NV_MONITOR_CAPS_VSDB::reserved13

Byte 10.

◆ reserved13 [2/2]

NvU32 _NVDRS_GPU_SUPPORT::reserved13

◆ reserved14

NvU32 _NVDRS_GPU_SUPPORT::reserved14

◆ reserved15

NvU32 _NVDRS_GPU_SUPPORT::reserved15

◆ reserved16

NvU32 _NVDRS_GPU_SUPPORT::reserved16

◆ reserved17

NvU32 _NVDRS_GPU_SUPPORT::reserved17

◆ reserved18

NvU32 _NVDRS_GPU_SUPPORT::reserved18

◆ reserved19

NvU32 _NVDRS_GPU_SUPPORT::reserved19

◆ reserved2 [1/3]

NvU32 _NV_GPU_INFO_V2::reserved2[14]

Reserved for future use.

◆ reserved2 [2/3]

NvU32 _NVAPI_STEREO_CAPS::reserved2[3]

◆ reserved2 [3/3]

NvU32 _NV_PHYSICAL_GPU_HANDLE_DATA::reserved2[4]

◆ reserved20

NvU32 _NVDRS_GPU_SUPPORT::reserved20

◆ reserved21

NvU32 _NVDRS_GPU_SUPPORT::reserved21

◆ reserved22

NvU32 _NVDRS_GPU_SUPPORT::reserved22

◆ reserved23

NvU32 _NVDRS_GPU_SUPPORT::reserved23

◆ reserved24

NvU32 _NVDRS_GPU_SUPPORT::reserved24

◆ reserved25

NvU32 _NVDRS_GPU_SUPPORT::reserved25

◆ reserved26

NvU32 _NVDRS_GPU_SUPPORT::reserved26

◆ reserved27

NvU32 _NVDRS_GPU_SUPPORT::reserved27

◆ reserved28

NvU32 _NVDRS_GPU_SUPPORT::reserved28

◆ reserved29

NvU32 _NVDRS_GPU_SUPPORT::reserved29

◆ reserved30

NvU32 _NVDRS_GPU_SUPPORT::reserved30

◆ reserved31

NvU32 _NVDRS_GPU_SUPPORT::reserved31

◆ reserved32

NvU32 _NVDRS_GPU_SUPPORT::reserved32

◆ reserved4

NvU32 _NVDRS_GPU_SUPPORT::reserved4

◆ reserved5

NvU32 _NVDRS_GPU_SUPPORT::reserved5

◆ reserved6 [1/2]

NvU8 _NV_MONITOR_CAPS_VSDB::reserved6

Byte 3.

◆ reserved6 [2/2]

NvU32 _NVDRS_GPU_SUPPORT::reserved6

◆ reserved7

NvU32 _NVDRS_GPU_SUPPORT::reserved7

◆ reserved8 [1/2]

NvU8 _NV_MONITOR_CAPS_VSDB::reserved8

Byte 5.

◆ reserved8 [2/2]

NvU32 _NVDRS_GPU_SUPPORT::reserved8

◆ reserved9

NvU32 _NVDRS_GPU_SUPPORT::reserved9

◆ reserved_sourceId [1/3]

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V1::reserved_sourceId

This field is reserved. There is ongoing debate if we need this field. Identifies sourceIds used by Windows. If all sourceIds are 0, these will be computed automatically.

◆ [] [2/3]

NvU32 { ... } ::reserved_sourceId

Only for compatibility.

◆ reserved_sourceId [3/3]

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::reserved_sourceId

Only for compatibility.

◆ reservedBit1

NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::reservedBit1

◆ reservedBits [1/3]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V1::reservedBits

◆ reservedBits [2/3]

NvU32 _NV_D3D1x_GRAPHICS_CAPS_V2::reservedBits

◆ reservedBits [3/3]

NvU32 _NV_D3D12_GRAPHICS_CAPS_V1::reservedBits

◆ reservedData [1/3]

NvU8 _NVVIOOUTPUTCONFIG_V1::reservedData[256]

Inicates last stored SDI output state TRUE-ON / FALSE-OFF.

◆ reservedData [2/3]

NvU8 _NVVIOOUTPUTCONFIG_V2::reservedData[256]

Indicates last stored SDI output state TRUE-ON / FALSE-OFF.

◆ reservedData [3/3]

NvU8 _NVVIOOUTPUTCONFIG_V3::reservedData[256]

Indicates last stored SDI output state TRUE-ON / FALSE-OFF.

◆ reservedEx [1/7]

NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::reservedEx[4]

reserved for future use.

◆ reservedEx [2/7]

NvU32 _NV_GET_VRR_INFO_V1::reservedEx[4]

Reserved for future use.

◆ reservedEx [3/7]

NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::reservedEx[7]

reserved for future use.

◆ reservedEx [4/7]

NvU32 NVLINK_LINK_STATUS_INFO_V2::reservedEx[8]

Reserved for future use to avoid versioning.

◆ reservedEx [5/7]

NvU32 _NV_GET_VIRTUAL_REFRESH_RATE_DATA_V1::reservedEx[8]

reserved for future use.

◆ reservedEx [6/7]

NvU32 _NV_SET_VIRTUAL_REFRESH_RATE_DATA_V1::reservedEx[8]

reserved for future use.

◆ reservedEx [7/7]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::reservedEx

Reserved for future use.

◆ reservedInternal

NvU32 _NV_GPU_DISPLAYIDS::reservedInternal

Do not use.

◆ resolution

NV_RESOLUTION _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::resolution

◆ resolutionScale

float _NV_SMP_ASSIST_SETUP_PARAMS_V1::resolutionScale

(IN) A resolution multiplier in the range [0.1, 3.0] if app wants to render at higher resolution

◆ ResourceHandle [1/2]

NVDX_ObjectHandle NV_D3D11_META_COMMAND_RESOURCE::ResourceHandle

◆ [] [2/2]

NVDX_ObjectHandle { ... } ::ResourceHandle

◆ resultDataMaxSizeInBytes [1/2]

NvU64 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO::resultDataMaxSizeInBytes

Size required to hold the result of a DMM Array build based on the specified inputs.

◆ resultDataMaxSizeInBytes [2/2]

NvU64 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO::resultDataMaxSizeInBytes

Size required to hold the result of an OMM Array build based on the specified inputs.

◆ revision [1/6]

NvU32 NV_GPU_ARCH_INFO_V1::revision

◆ revision [2/6]

NvU32 NV_GPU_ARCH_INFO_V2::revision

revision and revision_id are the same. The former is NvU32 while the latter is an enum made for readability.

◆ [] [3/6]

NvU32 { ... } ::revision

revision and revision_id are the same. The former is NvU32 while the latter is an enum made for readability.

◆ revision [4/6]

NvU32 _NV_GSYNC_CAPABILITIES_V1::revision

FPGA Revision.

◆ revision [5/6]

NvU32 _NV_GSYNC_CAPABILITIES_V2::revision

FPGA major revision.

◆ revision [6/6]

NvU32 _NV_GSYNC_CAPABILITIES_V3::revision

FPGA major revision.

◆ revision_id [1/2]

NV_GPU_CHIP_REVISION NV_GPU_ARCH_INFO_V2::revision_id

specifies the architecture revision of the GPU.

◆ [] [2/2]

NV_GPU_CHIP_REVISION { ... } ::revision_id

specifies the architecture revision of the GPU.

◆ rgb [1/4]

NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGB _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rgb

◆ [] [2/4]

NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGB { ... } ::rgb

◆ rgb [3/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rgb

◆ [] [4/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB { ... } ::rgb

◆ rgbParams [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB::rgbParams

Parameters required to represent control mode of type NV_GPU_CLIENT_ILLUM_CTRL_MODE_MANUAL_RGB.

◆ rgbParams [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGB_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGB::rgbParams[NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_COLOR_ENDPOINTS]

Parameters required to represent control mode of type NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_RGB.

◆ rgbQuantizationRange

NvU32 NV_INFOFRAME_VIDEO::rgbQuantizationRange

◆ [] [1/4]

NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGBW { ... } ::rgbw

◆ rgbw [2/4]

NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGBW _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rgbw

◆ [] [3/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW { ... } ::rgbw

◆ rgbw [4/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rgbw

◆ rgbwParams [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW::rgbwParams

Parameters required to represent control mode of type NV_GPU_ILLUM_CTRL_MODE_MANUAL_RGBW.

◆ rgbwParams [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_RGBW_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_RGBW::rgbwParams[NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_COLOR_ENDPOINTS]

Parameters required to represent control mode of type NV_GPU_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_RGBW.

◆ right_bar

NvU32 NV_INFOFRAME_VIDEO::right_bar

◆ rightCoeffs

float _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::rightCoeffs[4]

◆ rightConst

float _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::rightConst

◆ riseTimems

NvU16 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR::riseTimems

Time in ms to transition from color A to color B.

◆ RJ45_Ethernet [1/2]

NvU32 _NV_GSYNC_STATUS_PARAMS_V1::RJ45_Ethernet[NVAPI_MAX_RJ45_PER_GSYNC]

Connected to ethernet hub? [ERRONEOUSLY CONNECTED!].

◆ RJ45_Ethernet [2/2]

NvU32 _NV_GSYNC_STATUS_PARAMS_V2::RJ45_Ethernet[NVAPI_MAX_RJ45_PER_GSYNC]

Connected to ethernet hub? [ERRONEOUSLY CONNECTED!].

◆ RJ45_IO [1/2]

NVAPI_GSYNC_RJ45_IO _NV_GSYNC_STATUS_PARAMS_V1::RJ45_IO[NVAPI_MAX_RJ45_PER_GSYNC]

Configured as input / output.

◆ RJ45_IO [2/2]

NVAPI_GSYNC_RJ45_IO _NV_GSYNC_STATUS_PARAMS_V2::RJ45_IO[NVAPI_MAX_RJ45_PER_GSYNC]

Configured as input / output.

◆ rotation [1/4]

NV_ROTATE NV_DISPLAY_PATH::rotation

(IN) Rotation setting.

◆ rotation [2/4]

NV_ROTATE _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::rotation

(IN) rotation setting.

◆ rotation [3/4]

NV_ROTATE _NV_MOSAIC_GRID_TOPO_DISPLAY_V1::rotation

Rotation of display.

◆ rotation [4/4]

NV_ROTATE _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::rotation

Rotation of display.

◆ rowCount [1/2]

NvU32 NV_MOSAIC_TOPO_DETAILS::rowCount

Number of displays in a row.

◆ rowCount [2/2]

NvU32 NV_MOSAIC_TOPOLOGY::rowCount

Horizontal display count.

◆ rows [1/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::rows

Number of rows.

◆ rows [2/2]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::rows

Number of rows.

◆ rr [1/2]

NvU16 tagNV_TIMINGEXT::rr

Logical refresh rate to present.

◆ rr [2/2]

float _NV_TIMING_INPUT::rr

Timing refresh rate.

◆ rrx1k [1/2]

NvU32 tagNV_TIMINGEXT::rrx1k

Physical vertical refresh rate in 0.001Hz.

◆ rrx1k [2/2]

NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::rrx1k

Display frequency in x1k.

◆ rsvd [1/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_SINGLE_COLOR::rsvd

◆ rsvd [2/36]

NvU8 _NV_LATENCY_RESULT_PARAMS::FrameReport::rsvd[120]

◆ [] [3/36]

NvU8 { ... } ::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ rsvd [4/36]

NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::rsvd

Reserved bytes for possible future extension of this struct.

Reserved for future.

◆ rsvd [5/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGB::rsvd

◆ rsvd [6/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_RGBW::rsvd

◆ rsvd [7/36]

NvU8 _NV_GET_SLEEP_STATUS_PARAMS::rsvd[121]

(IN) Reserved. Must be set to 0s.

◆ rsvd [8/36]

NvU8 _NV_SET_REFLEX_SYNC_PARAMS::rsvd[28]

(IN) Reserved. Must be set to 0s.

◆ rsvd [9/36]

NvU8 _NV_SET_SLEEP_MODE_PARAMS::rsvd[31]

(IN) Reserved. Must be set to 0s.

◆ rsvd [10/36]

NvU8 _NV_LATENCY_RESULT_PARAMS::rsvd[32]

◆ rsvd [11/36]

NvU8 _NV_LATENCY_MARKER_PARAMS::rsvd[56]

◆ rsvd [12/36]

NvU8 _NV_ASYNC_FRAME_MARKER_PARAMS_V1::rsvd[56]

◆ rsvd [13/36]

NvU8 _NV_GPU_CLIENT_UTILIZATION_DATA_V1::rsvd[61]

Reserved bytes for future expansion.

◆ rsvd [14/36]

NvU8 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_PARAMS_V1::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ rsvd [15/36]

NvU8 NV_GPU_CLIENT_ILLUM_DEVICE_SYNC_V1::rsvd[64]

Reserved for future.

◆ rsvd [16/36]

NvU8 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_V1::rsvd[64]

Reserved for future.

◆ rsvd [17/36]

NvU8 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_PARAMS_V1::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ rsvd [18/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::rsvd

Reserved bytes for possible future extension of this struct.

◆ [] [19/36]

NvU8 { ... } ::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ rsvd [20/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_PARAMS_V1::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ [] [21/36]

NvU8 { ... } ::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ rsvd [22/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGB::rsvd

Reserved bytes for possible future extension of this struct.

Reserved for future.

◆ rsvd [23/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_COLOR_FIXED::rsvd

Reserved bytes for possible future extension of this struct.

Reserved for future.

◆ [] [24/36]

NvU8 { ... } ::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ rsvd [25/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_RGBW::rsvd

Reserved bytes for possible future extension of this struct.

Reserved for future.

◆ [] [26/36]

NvU8 { ... } ::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ rsvd [27/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR::rsvd

Reserved bytes for possible future extension of this struct.

Reserved for future.

◆ [] [28/36]

NvU8 { ... } ::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ [] [29/36]

NvU8 { ... } ::rsvd[64]

◆ rsvd [30/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::rsvd

◆ rsvd [31/36]

NvU8 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::rsvd[64]

Reserved bytes for possible future extension of this struct.

◆ rsvd [32/36]

NvU8 _NV_CLIENT_CALLBACK_SETTINGS_SUPER_V1::rsvd[64]

Reserved bytes for future expansion.

◆ rsvd [33/36]

NvU8 _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1::rsvd[64]

Reserved bytes for future expansion.

◆ rsvd [34/36]

NvU8 _NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1::rsvd[64]

Reserved bytes for future expansion.

◆ rsvd [35/36]

NvU8 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::rsvd[64]

Reserved bytes for future expansion.

◆ rsvd [36/36]

NvU8 _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1::rsvd[64]

Reserved bytes for future expansion.

◆ rsvd0

NvU64 _NV_LATENCY_MARKER_PARAMS::rsvd0

◆ rsvdField

NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::rsvdField

◆ rxSublinkStatus [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::rxSublinkStatus

This field specifies the current state of RX sublink.See NVAPI_NVLINK_GET_NVLINK_STATUS_SUBLINK_RX_STATE_* for possible values.

◆ rxSublinkStatus [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::rxSublinkStatus

This field specifies the current state of RX sublink.See NVAPI_NVLINK_GET_NVLINK_STATUS_SUBLINK_RX_STATE_* for possible values.

◆ SampleCount [1/2]

NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::SampleCount

◆ SampleCount [2/2]

NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::SampleCount

◆ SamplePositionsX [1/2]

NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::SamplePositionsX[16]

◆ SamplePositionsX [2/2]

NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::SamplePositionsX[16]

◆ SamplePositionsY [1/2]

NvU8 NvAPI_D3D11_RASTERIZER_DESC_EX::SamplePositionsY[16]

◆ SamplePositionsY [2/2]

NvU8 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::SamplePositionsY[16]

◆ sampleRate

NvU32 NV_INFOFRAME_AUDIO::sampleRate

◆ sampleSize

NvU32 NV_INFOFRAME_AUDIO::sampleSize

◆ sampling

NVVIOCOMPONENTSAMPLING _NVVIOSTREAM::sampling

Sampling

◆ samplingFormat

NVVIOCOMPONENTSAMPLING _NVVIOCHANNELSTATUS::samplingFormat

Sampling format.

◆ scaling [1/3]

NV_SCALING NV_DISPLAY_PATH::scaling

(IN) Scaling setting

◆ scaling [2/3]

NV_SCALING _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::scaling

(IN) scaling setting.

◆ scaling [3/3]

NvU32 NV_TIMING_FLAG::scaling

Define preferred scaling.

◆ scanInfo

NvU32 NV_INFOFRAME_VIDEO::scanInfo

◆ scanInfoCEVideoFormats

NvU8 _NV_MONITOR_CAPS_VCDB::scanInfoCEVideoFormats

◆ scanInfoITVideoFormats

NvU8 _NV_MONITOR_CAPS_VCDB::scanInfoITVideoFormats

◆ scanInfoPreferredVideoFormat

NvU8 _NV_MONITOR_CAPS_VCDB::scanInfoPreferredVideoFormat

◆ ScissorEnable

BOOL NvAPI_D3D11_RASTERIZER_DESC_EX::ScissorEnable

◆ scissorRect

D3D11_RECT _NV_D3D11_EXCLUSIVE_SCISSOR_RECT_DESC_V1::scissorRect

(IN) Single rect dimensions

◆ scratchAccelerationStructureData

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX::scratchAccelerationStructureData

Memory that will be temporarily used during the building process.

◆ scratchDataSizeInBytes [1/2]

NvU64 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO::scratchDataSizeInBytes

Scratch storage on GPU required during DMM Array build based on the specified inputs.

◆ scratchDataSizeInBytes [2/2]

NvU64 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO::scratchDataSizeInBytes

Scratch storage on GPU required during OMM Array build based on the specified inputs.

◆ scratchDisplacementMicromapArrayData

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_DESC::scratchDisplacementMicromapArrayData

Location where the build will store temporary data. NvAPI_D3D12_GetRaytracingDisplacementMicromapArrayPrebuildInfo() reports the amount of scratch memory the implementation will need for a given set of input parameters. The address must be aligned to 256 bytes (NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_BYTE_ALIGNMENT). Contents of this memory going into a build on the GPU timeline are irrelevant and will not be preserved. After the build is complete on the GPU timeline, the memory is left with whatever undefined contents the build finished with. The memory pointed to must be in state D3D12_RESOURCE_STATE_UNORDERED_ACCESS.

◆ scratchOpacityMicromapArrayData

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_DESC::scratchOpacityMicromapArrayData

Location where the build will store temporary data. NvAPI_D3D12_GetRaytracingOpacityMicromapArrayPrebuildInfo() reports the amount of scratch memory the implementation will need for a given set of input parameters. The address must be aligned to 256 bytes (NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_ARRAY_BYTE_ALIGNMENT). Contents of this memory going into a build on the GPU timeline are irrelevant and will not be preserved. After the build is complete on the GPU timeline, the memory is left with whatever undefined contents the build finished with. The memory pointed to must be in state D3D12_RESOURCE_STATE_UNORDERED_ACCESS.

◆ sCustomRects [1/2]

NV_CUSTOM_RECTS_V1 _NV_SMP_ASSIST_SETUP_PARAMS_V1::sCustomRects

(IN) If SMP Assist Level is Minimal, provide custom viewports and scissor rects for each eye index.

◆ [] [2/2]

NV_CUSTOM_RECTS_V1 { ... } ::sCustomRects

(IN) If SMP Assist Level is Minimal, provide custom viewports and scissor rects for each eye index.

◆ sdiSyncIn

NVVIOSYNCSTATUS _NVVIOOUTPUTSTATUS::sdiSyncIn

SDI sync input status.

◆ sec

NvU16 _NV_LICENSE_EXPIRY_DETAILS::sec

Seconds value of license expiry.

◆ [struct] [1/2]

struct { ... } NV_GPU_THERMAL_SETTINGS_V1::sensor[NVAPI_MAX_THERMAL_SENSORS_PER_GPU]

◆ [struct] [2/2]

struct { ... } NV_GPU_THERMAL_SETTINGS_V2::sensor[NVAPI_MAX_THERMAL_SENSORS_PER_GPU]

◆ serializedDataType

NVAPI_D3D12_SERIALIZED_DATA_TYPE_EX _NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_V1::serializedDataType

[in] Type of data to be deserialized; see NVAPI_D3D12_SERIALIZED_DATA_TYPE_EX.

◆ settingId

NvU32 _NVDRS_SETTING_V1::settingId

32 bit setting Id

◆ settingLocation

NVDRS_SETTING_LOCATION _NVDRS_SETTING_V1::settingLocation

Describes where the value in CurrentValue comes from.

◆ settingName

NvAPI_UnicodeString _NVDRS_SETTING_V1::settingName

String name of setting.

◆ settingType [1/2]

NVDRS_SETTING_TYPE _NVDRS_SETTING_VALUES::settingType

Type of setting value.

◆ settingType [2/2]

NVDRS_SETTING_TYPE _NVDRS_SETTING_V1::settingType

Type of setting value.

◆ [union]

union { ... } _NVDRS_SETTING_VALUES::settingValues[NVAPI_SETTING_MAX_VALUES]

◆ sFoveatedRenderingDesc

NV_FOVEATED_RENDERING_DESC_V1 _NV_VRS_HELPER_ENABLE_PARAMS_V1::sFoveatedRenderingDesc

(IN) Provide this if ContentType has NV_VRS_CONTENT_TYPE_FOVEATED_RENDERING flag

◆ ShadingRateCustomPresetDesc

NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1 _NV_FOVEATED_RENDERING_DESC_V1::ShadingRateCustomPresetDesc

(IN) To be provided only if ShadingRatePreset is NV_FOVEATED_RENDERING_SHADING_RATE_PRESET_CUSTOM

◆ ShadingRatePreset

NV_FOVEATED_RENDERING_SHADING_RATE_PRESET _NV_FOVEATED_RENDERING_DESC_V1::ShadingRatePreset

(IN) Preset of the shading rate

◆ shadingRateTable [1/2]

NV_PIXEL_SHADING_RATE _NV_D3D11_VIEWPORT_SHADING_RATE_DESC_V1::shadingRateTable[NV_MAX_PIXEL_SHADING_RATES]

(IN) Lookup table of converting Shading Rate Index to NV_PIXEL_SHADING_RATE

◆ shadingRateTable [2/2]

NV_PIXEL_SHADING_RATE _NV_VRS_HELPER_GET_SHADING_RATE_RESOURCE_PARAMS_V1::shadingRateTable[NV_MAX_PIXEL_SHADING_RATES]

(OUT) Shading Rate Table filled by the driver

◆ signalFormat [1/6]

NVVIOSIGNALFORMAT _NVVIOCHANNELSTATUS::signalFormat

Signal format.

◆ signalFormat [2/6]

NVVIOSIGNALFORMAT _NVVIOSIGNALFORMATDETAIL::signalFormat

Signal format enumerated value.

◆ signalFormat [3/6]

NVVIOSIGNALFORMAT _NVVIOOUTPUTCONFIG_V1::signalFormat

Signal format for video output.

◆ signalFormat [4/6]

NVVIOSIGNALFORMAT _NVVIOOUTPUTCONFIG_V2::signalFormat

Signal format for video output.

◆ signalFormat [5/6]

NVVIOSIGNALFORMAT _NVVIOOUTPUTCONFIG_V3::signalFormat

Signal format for video output.

◆ signalFormat [6/6]

NVVIOSIGNALFORMAT _NVVIOINPUTCONFIG::signalFormat

Signal format. Please note that both numRawCaptureImages and signalFormat should be set together.

◆ signature [1/4]

NvU8 _NV_LICENSABLE_FEATURES_V1::signature[NV_LICENSE_SIGNATURE_SIZE]

Dynamic signature required for Authentication of the components, signature length limited to NV_LICENSE_SIGNATURE_SIZE

◆ signature [2/4]

NvU8 _NV_LICENSABLE_FEATURES_V2::signature[NV_LICENSE_SIGNATURE_SIZE]

Dynamic signature required for Authentication of the components, signature length limited to NV_LICENSE_SIGNATURE_SIZE

◆ signature [3/4]

NvU8 _NV_LICENSABLE_FEATURES_V3::signature[NV_LICENSE_SIGNATURE_SIZE]

Dynamic signature required for Authentication of the components, signature length limited to NV_LICENSE_SIGNATURE_SIZE

◆ signature [4/4]

NvU8 _NV_LICENSABLE_FEATURES_V4::signature[NV_LICENSE_SIGNATURE_SIZE]

Dynamic signature required for Authentication of the components, signature length limited to NV_LICENSE_SIGNATURE_SIZE

◆ simEndTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::simEndTime

◆ simStartTime

NvU64 _NV_LATENCY_RESULT_PARAMS::FrameReport::simStartTime

◆ [struct] [1/2]

struct { ... } NV_GPU_PSTATE20_CLOCK_ENTRY_V1::single

◆ [struct] [2/2]

struct { ... } NV_GPU_PSTATE20_CLOCK_ENTRY_V1::single

◆ singleBitErrors [1/3]

NvU64 NV_GPU_ECC_ERROR_INFO::singleBitErrors

Number of single-bit ECC errors detected since last boot.

Number of single-bit ECC errors detected since last counter reset.

◆ [] [2/3]

NvU64 { ... } ::singleBitErrors

Number of single-bit ECC errors detected since last boot.

◆ [] [3/3]

NvU64 { ... } ::singleBitErrors

Number of single-bit ECC errors detected since last counter reset.

◆ singleColor [1/4]

NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_SINGLE_COLOR _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::singleColor

◆ [] [2/4]

NV_GPU_CLIENT_ILLUM_ZONE_INFO_DATA_SINGLE_COLOR { ... } ::singleColor

◆ singleColor [3/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::singleColor

◆ [] [4/4]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_SINGLE_COLOR { ... } ::singleColor

◆ singleColorParams [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR::singleColorParams

Parameters required to represent control mode of type NV_GPU_ILLUM_CTRL_MODE_MANUAL_SINGLE_COLOR.

◆ singleColorParams [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_MANUAL_SINGLE_COLOR_PARAMS _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_DATA_PIECEWISE_LINEAR_SINGLE_COLOR::singleColorParams[NV_GPU_CLIENT_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_COLOR_ENDPOINTS]

Parameters required to represent control mode of type NV_GPU_ILLUM_CTRL_MODE_PIECEWISE_LINEAR_SINGLE_COLOR.

◆ size [1/8]

NvU16 NV_INFOFRAME_DATA::size

size of this structure

◆ size [2/8]

NvU16 _NV_COLOR_DATA_V1::size

Size of this structure.

◆ size [3/8]

NvU16 _NV_COLOR_DATA_V2::size

Size of this structure.

◆ size [4/8]

NvU16 _NV_COLOR_DATA_V3::size

Size of this structure.

◆ size [5/8]

NvU16 _NV_COLOR_DATA_V4::size

Size of this structure.

◆ size [6/8]

NvU16 _NV_COLOR_DATA_V5::size

Size of this structure.

◆ size [7/8]

NvU16 _NV_MONITOR_CAPABILITIES_V1::size

◆ Size

NvU64 NV_META_COMMAND_TENSOR_DESC::Size[NV_META_COMMAND_MAX_TENSOR_DIM]

◆ size [8/8]

NvU32 NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::size

[in] size of pCubin blob in bytes

◆ sizeofEDID [1/2]

NvU32 NV_EDID_V2::sizeofEDID

◆ sizeofEDID [2/2]

NvU32 NV_EDID_V3::sizeofEDID

◆ sizeOfEDID [1/2]

NvU32 _NV_EDID_DATA_V1::sizeOfEDID

Size of EDID data.

◆ sizeOfEDID [2/2]

NvU32 _NV_EDID_DATA_V2::sizeOfEDID

Size of EDID data.

◆ SkipConnectionResource [1/2]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::SkipConnectionResource

◆ SkipConnectionResource [2/2]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::SkipConnectionResource

◆ SkipMode

NV_META_COMMAND_CONVOLUTION_SKIP_MODE NV_META_COMMAND_CONVOLUTION_FUSE_DESC::SkipMode

◆ sleepIntervalUs

NvU32 _NV_GET_SLEEP_STATUS_PARAMS::sleepIntervalUs

(OUT) Latest sleep interval in microseconds.

◆ sLeftConfig

NV_LMS_CUSTOM_CONFIG_V1 _NV_LMS_INSTANCED_STEREO_CONFIG_V1::sLeftConfig

< (OUT) LMS Instanced stereo config returned by the SMP Assist GetConstants API

(OUT) LMS config for the Left eye view

◆ sLeftEye [1/2]

NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sLeftEye

(IN) Gaze data for Left Eye of Stereo rendering mode

◆ [] [2/2]

NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1 { ... } ::sLeftEye

(IN) Gaze data for Left Eye of Stereo rendering mode

◆ sLMS_ISConfig [1/2]

NV_LMS_INSTANCED_STEREO_CONFIG_V1 _NV_SMP_ASSIST_GET_CONSTANTS_V3::sLMS_ISConfig

(OUT) If eSMPAssistType is LMS and eEyeIndex is NV_SMP_ASSIST_EYE_INDEX_INSTANCED_STEREO then LMS Instanced stereo config will be populated

◆ [] [2/2]

NV_LMS_INSTANCED_STEREO_CONFIG_V1 { ... } ::sLMS_ISConfig

(OUT) If eSMPAssistType is LMS and eEyeIndex is NV_SMP_ASSIST_EYE_INDEX_INSTANCED_STEREO then LMS Instanced stereo config will be populated

◆ [] [1/2]

NV_LMS_CUSTOM_CONFIG_V1 { ... } ::sLMSConfig

(OUT) If eSMPAssistType is LMS, then LMS config will be populated

◆ sLMSConfig [2/2]

NV_LMS_CUSTOM_CONFIG_V1 _NV_SMP_ASSIST_GET_CONSTANTS_V3::sLMSConfig

(OUT) If eSMPAssistType is LMS, then LMS config will be populated

◆ [] [1/2]

NV_LMS_CUSTOM_CONFIG_V1 { ... } ::sLMSCustomConfig

(IN) If eSMPAssistType is LMS and SMP Assist Level is Partial, then provide LMS config

◆ sLMSCustomConfig [2/2]

NV_LMS_CUSTOM_CONFIG_V1 _NV_SMP_ASSIST_SETUP_PARAMS_V1::sLMSCustomConfig

(IN) If eSMPAssistType is LMS and SMP Assist Level is Partial, then provide LMS config

◆ SlopeScaledDepthBias

FLOAT NvAPI_D3D11_RASTERIZER_DESC_EX::SlopeScaledDepthBias

◆ [] [1/2]

NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1 { ... } ::sMonoData

(IN) Gaze data for Mono rendering mode

◆ sMonoData [2/2]

NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sMonoData

(IN) Gaze data for Mono rendering mode

◆ smpDesc

D3D12_CPU_DESCRIPTOR_HANDLE NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::smpDesc

[in] CPU descriptor handle of the sampler (set to 0 if sampler isn't required)

◆ smpte352

NvU32 _NVVIOCHANNELSTATUS::smpte352

4-byte SMPTE 352 video payload identifier

◆ sMRS_ISConfig [1/2]

NV_MRS_INSTANCED_STEREO_CONFIG_V1 _NV_SMP_ASSIST_GET_CONSTANTS_V3::sMRS_ISConfig

(OUT) If eSMPAssistType is MRS and eEyeIndex is NV_SMP_ASSIST_EYE_INDEX_INSTANCED_STEREO then MRS Instanced stereo config will be populated

◆ [] [2/2]

NV_MRS_INSTANCED_STEREO_CONFIG_V1 { ... } ::sMRS_ISConfig

(OUT) If eSMPAssistType is MRS and eEyeIndex is NV_SMP_ASSIST_EYE_INDEX_INSTANCED_STEREO then MRS Instanced stereo config will be populated

◆ [] [1/2]

NV_MRS_CUSTOM_CONFIG_V1 { ... } ::sMRSConfig

(OUT) If eSMPAssistType is MRS, then MRS config will be populated

◆ sMRSConfig [2/2]

NV_MRS_CUSTOM_CONFIG_V1 _NV_SMP_ASSIST_GET_CONSTANTS_V3::sMRSConfig

(OUT) If eSMPAssistType is MRS, then MRS config will be populated

◆ sMRSCustomConfig [1/2]

NV_MRS_CUSTOM_CONFIG_V1 _NV_SMP_ASSIST_SETUP_PARAMS_V1::sMRSCustomConfig

(IN) If eSMPAssistType is MRS and SMP Assist Level is Partial, then provide MRS config

◆ [] [2/2]

NV_MRS_CUSTOM_CONFIG_V1 { ... } ::sMRSCustomConfig

(IN) If eSMPAssistType is MRS and SMP Assist Level is Partial, then provide MRS config

◆ source [1/2]

NVAPI_GSYNC_SYNC_SOURCE _NV_GSYNC_CONTROL_PARAMS_V1::source

VSync/House sync.

◆ source [2/2]

NVAPI_GSYNC_SYNC_SOURCE _NV_GSYNC_CONTROL_PARAMS_V2::source

VSync/House sync.

◆ sourceAccelerationStructureData

D3D12_GPU_VIRTUAL_ADDRESS _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_DESC_EX::sourceAccelerationStructureData

The acceleration structure to be updated. Otherwise if the acceleration structure should be rebuilt entirely, this value must be NULL.

◆ sourceDesktopRect

NvSBox _NV_SCANOUT_INFORMATION::sourceDesktopRect

Operating system display device rect in desktop coordinates displayId is scanning out from.

◆ sourceId [1/5]

NvU32 NV_VIEW_TARGET_INFO::sourceId

(IN/OUT) Source ID - values will be based on the number of heads exposed per GPU.

◆ [] [2/5]

NvU32 { ... } ::sourceId

(IN/OUT) Source ID - values will be based on the number of heads exposed per GPU.

◆ sourceId [3/5]

NvU32 NV_DISPLAY_PATH::sourceId

(IN) Values will be based on the number of heads exposed per GPU(0, 1?)

◆ sourceId [4/5]

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::sourceId

Identifies sourceId used by Windows CCD. This can be optionally set.

◆ [] [5/5]

NvU32 { ... } ::sourceId

Identifies sourceId used by Windows CCD. This can be optionally set.

◆ sourceModeInfo [1/2]

NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1* _NV_DISPLAYCONFIG_PATH_INFO_V1::sourceModeInfo

May be NULL if mode info is not important.

◆ sourceModeInfo [2/2]

NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1* _NV_DISPLAYCONFIG_PATH_INFO_V2::sourceModeInfo

May be NULL if mode info is not important.

◆ sourcePhysicalAddressA

NvU8 _NV_MONITOR_CAPS_VSDB::sourcePhysicalAddressA

Byte 1.

◆ sourcePhysicalAddressB

NvU8 _NV_MONITOR_CAPS_VSDB::sourcePhysicalAddressB

Byte 1.

◆ sourcePhysicalAddressC

NvU8 _NV_MONITOR_CAPS_VSDB::sourcePhysicalAddressC

Byte 2.

◆ sourcePhysicalAddressD

NvU8 _NV_MONITOR_CAPS_VSDB::sourcePhysicalAddressD

Byte 2.

◆ sourceToTargetRotation

NV_ROTATE _NV_SCANOUT_INFORMATION::sourceToTargetRotation

Rotation performed between the sourceViewportRect and the targetViewportRect.

◆ sourceViewportRect

NvSBox _NV_SCANOUT_INFORMATION::sourceViewportRect

Area inside the sourceDesktopRect which is scanned out to the display.

◆ spanningOrientation

NV_DISPLAYCONFIG_SPANNING_ORIENTATION _NV_DISPLAYCONFIG_SOURCE_MODE_INFO_V1::spanningOrientation

Spanning is only supported on XP.

◆ speakerPlacement

NvU32 NV_INFOFRAME_AUDIO::speakerPlacement

◆ srcEnumIndex

NvU32 srcEnumIndex

◆ srcPartition

NV_VIEWPORTF NV_CUSTOM_DISPLAY::srcPartition

For multimon support, should be set to (0,0,1.0,1.0) for now.

◆ sRightConfig

NV_LMS_CUSTOM_CONFIG_V1 _NV_LMS_INSTANCED_STEREO_CONFIG_V1::sRightConfig

(OUT) LMS config for the Right eye view

◆ sRightEye [1/2]

NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sRightEye

(IN) Gaze data for Right Eye of Stereo rendering mode

◆ [] [2/2]

NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE_V1 { ... } ::sRightEye

(IN) Gaze data for Right Eye of Stereo rendering mode

◆ [struct] [1/2]

struct { ... } _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sStereoData

◆ [struct] [2/2]

struct { ... } _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::sStereoData

◆ StartPadding

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::StartPadding[NV_META_COMMAND_NUM_SPATIAL_DIM]

◆ startupDelay [1/2]

NV_GSYNC_DELAY _NV_GSYNC_CONTROL_PARAMS_V1::startupDelay

Sync start delay for master.

◆ startupDelay [2/2]

NV_GSYNC_DELAY _NV_GSYNC_CONTROL_PARAMS_V2::startupDelay

Sync start delay for master.

◆ static_metadata_descriptor_id [1/5]

NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_CAPABILITIES_V1::static_metadata_descriptor_id

Static Metadata Descriptor Id (0 for static metadata type 1)

◆ static_metadata_descriptor_id [2/5]

NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_CAPABILITIES_V2::static_metadata_descriptor_id

Static Metadata Descriptor Id (0 for static metadata type 1)

◆ static_metadata_descriptor_id [3/5]

NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_CAPABILITIES_V3::static_metadata_descriptor_id

Static Metadata Descriptor Id (0 for static metadata type 1)

◆ static_metadata_descriptor_id [4/5]

NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_COLOR_DATA_V1::static_metadata_descriptor_id

Static Metadata Descriptor Id (0 for static metadata type 1)

◆ static_metadata_descriptor_id [5/5]

NV_STATIC_METADATA_DESCRIPTOR_ID _NV_HDR_COLOR_DATA_V2::static_metadata_descriptor_id

Static Metadata Descriptor Id (0 for static metadata type 1)

◆ status [1/2]

NvU32 tagNV_TIMINGEXT::status

Timing standard.

◆ status [2/2]

NvU8 _NV_LICENSE_EXPIRY_DETAILS::status

License expiry status.

◆ streams

NVVIOSTREAM _NVVIOINPUTCONFIG::streams[NVAPI_MAX_VIO_STREAMS]

Stream configurations.

◆ Stride [1/2]

NvU64 NV_META_COMMAND_TENSOR_DESC::Stride[NV_META_COMMAND_MAX_TENSOR_DIM]

◆ Stride [2/2]

NvU64 NV_META_COMMAND_CREATE_CONVOLUTION_EX_DESC::Stride[NV_META_COMMAND_NUM_SPATIAL_DIM]

◆ structSizeIn [1/3]

size_t NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::structSizeIn

[in] Caller's version of input params

◆ structSizeIn [2/3]

size_t NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::structSizeIn

[in] Caller's version of input params

◆ structSizeIn [3/3]

size_t NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::structSizeIn

[in] Caller's version of input params

◆ structSizeOut [1/3]

size_t NVAPI_D3D12_CREATE_CUBIN_SHADER_PARAMS::structSizeOut

[out] Driver's version of input params

◆ structSizeOut [2/3]

size_t NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::structSizeOut

[out] Driver's version of input params

◆ structSizeOut [3/3]

size_t NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::structSizeOut

[out] Driver's version of input params

◆ subdivisionLevel [1/4]

NvU32 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_USAGE_COUNT::subdivisionLevel

Number of subdivisions for the DMM; valid inputs are [0, 5] (NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DC1_MAX_SUBDIVISION_LEVEL). The total number of micro-triangles is 4subdivisionLevel.

◆ subdivisionLevel [2/4]

NvU16 _NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DESC::subdivisionLevel

Number of subdivisions for the DMM; valid inputs are [0, 5] (NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_DC1_MAX_SUBDIVISION_LEVEL). The total number of micro-triangles is 4subdivisionLevel.

◆ subdivisionLevel [3/4]

NvU32 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_USAGE_COUNT::subdivisionLevel

Number of subdivisions for the OMM; valid inputs are [0, 12] (NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_OC1_MAX_SUBDIVISION_LEVEL). The total number of micro-triangles is 4subdivisionLevel.

◆ subdivisionLevel [4/4]

NvU16 _NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_DESC::subdivisionLevel

Number of subdivisions for the OMM; valid inputs are [0, 12] (NVAPI_D3D12_RAYTRACING_OPACITY_MICROMAP_OC1_MAX_SUBDIVISION_LEVEL). The total number of micro-triangles is 4subdivisionLevel.

◆ subLinkWidth [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::subLinkWidth

This field specifies the no. of lanes per sublink.

◆ subLinkWidth [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::subLinkWidth

This field specifies the no. of lanes per sublink.

◆ subSysDeviceId [1/2]

NvU32 NV_CHIPSET_INFO_v4::subSysDeviceId

Chipset subsystem device identification.

◆ subSysDeviceId [2/2]

NvU32 NV_CHIPSET_INFO_v3::subSysDeviceId

subsystem device ID

◆ subSysVendorId [1/2]

NvU32 NV_CHIPSET_INFO_v4::subSysVendorId

Chipset subsystem vendor identification.

◆ subSysVendorId [2/2]

NvU32 NV_CHIPSET_INFO_v3::subSysVendorId

subsystem vendor ID

◆ super [1/3]

NV_GPU_CLIENT_CALLBACK_SETTINGS_SUPER_V1 _NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1::super

[in] Super class data.

◆ super [2/3]

NV_GPU_CLIENT_CALLBACK_DATA_SUPER_V1 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::super

[out] Super struct.

◆ super [3/3]

NV_GPU_CLIENT_PERIODIC_CALLBACK_SETTINGS_SUPER_V1 _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1::super

[in] Generic callback settings. Some data within will be passed to the callback when invoked.

◆ supportAI

NvU8 _NV_MONITOR_CAPS_VSDB::supportAI

Byte 3.

◆ supportDeepColor30bits

NvU8 _NV_MONITOR_CAPS_VSDB::supportDeepColor30bits

Byte 3.

◆ supportDeepColor36bits

NvU8 _NV_MONITOR_CAPS_VSDB::supportDeepColor36bits

Byte 3.

◆ supportDeepColor48bits

NvU8 _NV_MONITOR_CAPS_VSDB::supportDeepColor48bits

Byte 3.

◆ supportDeepColorYCbCr444

NvU8 _NV_MONITOR_CAPS_VSDB::supportDeepColorYCbCr444

Byte 3.

◆ supportDualDviOperation

NvU8 _NV_MONITOR_CAPS_VSDB::supportDualDviOperation

Byte 3.

◆ supported

NvBool _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::supported

(OUT) boolean returning if feature is supported

◆ [] [1/4]

NvU32 { ... } ::supports_10b_12b_444

It is set when interface supported is low latency, it tells whether it supports 10 bit or 12 bit RGB 4:4:4 or YCbCr 4:4:4 or both.

◆ supports_10b_12b_444 [2/4]

NvU32 _NV_HDR_CAPABILITIES_V2::supports_10b_12b_444

It is set when interface supported is low latency, it tells whether it supports 10 bit or 12 bit RGB 4:4:4 or YCbCr 4:4:4 or both.

◆ supports_10b_12b_444 [3/4]

NvU32 _NV_HDR_CAPABILITIES_V3::supports_10b_12b_444

It is set when interface supported is low latency, it tells whether it supports 10 bit or 12 bit RGB 4:4:4 or YCbCr 4:4:4 or both.

◆ [] [4/4]

NvU32 { ... } ::supports_10b_12b_444

It is set when interface supported is low latency, it tells whether it supports 10 bit or 12 bit RGB 4:4:4 or YCbCr 4:4:4 or both.

◆ supports_2160p60hz [1/4]

NvU32 _NV_HDR_CAPABILITIES_V2::supports_2160p60hz

If set sink is capable of 4kx2k @ 60hz.

◆ [] [2/4]

NvU32 { ... } ::supports_2160p60hz

If set sink is capable of 4kx2k @ 60hz.

◆ [] [3/4]

NvU32 { ... } ::supports_2160p60hz

If set sink is capable of 4kx2k @ 60hz.

◆ supports_2160p60hz [4/4]

NvU32 _NV_HDR_CAPABILITIES_V3::supports_2160p60hz

If set sink is capable of 4kx2k @ 60hz.

◆ [] [1/4]

NvU32 { ... } ::supports_backlight_control

This is set when sink is using lowlatency interface and can control its backlight.

◆ supports_backlight_control [2/4]

NvU32 _NV_HDR_CAPABILITIES_V2::supports_backlight_control

This is set when sink is using lowlatency interface and can control its backlight.

◆ supports_backlight_control [3/4]

NvU32 _NV_HDR_CAPABILITIES_V3::supports_backlight_control

This is set when sink is using lowlatency interface and can control its backlight.

◆ [] [4/4]

NvU32 { ... } ::supports_backlight_control

This is set when sink is using lowlatency interface and can control its backlight.

◆ [] [1/4]

NvU32 { ... } ::supports_global_dimming

Indicates if sink supports global dimming.

◆ supports_global_dimming [2/4]

NvU32 _NV_HDR_CAPABILITIES_V2::supports_global_dimming

Indicates if sink supports global dimming.

◆ supports_global_dimming [3/4]

NvU32 _NV_HDR_CAPABILITIES_V3::supports_global_dimming

Indicates if sink supports global dimming.

◆ [] [4/4]

NvU32 { ... } ::supports_global_dimming

Indicates if sink supports global dimming.

◆ [] [1/4]

NvU32 { ... } ::supports_YUV422_12bit

If set, sink is capable of YUV422-12 bit.

◆ supports_YUV422_12bit [2/4]

NvU32 _NV_HDR_CAPABILITIES_V2::supports_YUV422_12bit

If set, sink is capable of YUV422-12 bit.

◆ supports_YUV422_12bit [3/4]

NvU32 _NV_HDR_CAPABILITIES_V3::supports_YUV422_12bit

If set, sink is capable of YUV422-12 bit.

◆ [] [4/4]

NvU32 { ... } ::supports_YUV422_12bit

If set, sink is capable of YUV422-12 bit.

◆ [] [1/2]

NvU32 { ... } ::supportsRotation

(OUT) This display can be rotated

◆ supportsRotation [2/2]

NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::supportsRotation

(OUT) This display can be rotated

◆ supportsWindowedModeAutomatic

NvU32 _NVAPI_STEREO_CAPS::supportsWindowedModeAutomatic

◆ supportsWindowedModeOff

NvU32 _NVAPI_STEREO_CAPS::supportsWindowedModeOff

◆ supportsWindowedModePersistent

NvU32 _NVAPI_STEREO_CAPS::supportsWindowedModePersistent

◆ supportULMB

NvU8 _NV_MONITOR_CAPS_GENERIC::supportULMB

monitor supports ULMB with variable refresh rate. Valid for NV_MONITOR_CAPS_TYPE_GENERIC only.

◆ supportVRR

NvU8 _NV_MONITOR_CAPS_GENERIC::supportVRR

monitor supports variable refresh rate. Valid for NV_MONITOR_CAPS_TYPE_GENERIC only.

◆ surfaceHandle [1/2]

NvU32 NVAPI_UAV_INFO_V1::surfaceHandle

[OUT] driver handle for a UAV (that can be used as a cudaSurfaceObject_t)

◆ surfaceHandle [2/2]

NvU32 NVAPI_UAV_INFO_V2::surfaceHandle

[OUT] driver handle for a UAV (that can be used as a cudaSurfaceObject_t)

◆ sViewOffset

NvS32 _NV_DX_VIDEO_STEREO_INFO::sViewOffset

Signed offset of each view (positive offset indicating left view is shifted left)

◆ syncData

NV_GPU_CLIENT_ILLUM_DEVICE_SYNC_V1 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_V1::syncData

Structure containing the synchronization data for the illumination device.

◆ syncDelay [1/3]

NVVIOSYNCDELAY _NVVIOOUTPUTCONFIG_V1::syncDelay

Sync delay.

◆ syncDelay [2/3]

NVVIOSYNCDELAY _NVVIOOUTPUTCONFIG_V2::syncDelay

Sync delay.

◆ syncDelay [3/3]

NVVIOSYNCDELAY _NVVIOOUTPUTCONFIG_V3::syncDelay

Sync delay.

◆ syncEnable [1/4]

NvU32 _NVVIOOUTPUTSTATUS::syncEnable

Sync enable (TRUE if using syncSource)

◆ syncEnable [2/4]

NvU32 _NVVIOOUTPUTCONFIG_V1::syncEnable

Sync enable (TRUE to use syncSource)

◆ syncEnable [3/4]

NvU32 _NVVIOOUTPUTCONFIG_V2::syncEnable

Sync enable (TRUE to use syncSource)

◆ syncEnable [4/4]

NvU32 _NVVIOOUTPUTCONFIG_V3::syncEnable

Sync enable (TRUE to use syncSource)

◆ syncFormat

NVVIOSIGNALFORMAT _NVVIOOUTPUTSTATUS::syncFormat

Sync format.

◆ SyncMode

NV_PRESENT_BARRIER_SYNC_MODE _NV_PRESENT_BARRIER_FRAME_STATISTICS::SyncMode

The presentBarrier mode of this client from last present call.

◆ syncSkew [1/2]

NV_GSYNC_DELAY _NV_GSYNC_CONTROL_PARAMS_V1::syncSkew

The time delay between the frame sync signal and the GPUs signal.

◆ syncSkew [2/2]

NV_GSYNC_DELAY _NV_GSYNC_CONTROL_PARAMS_V2::syncSkew

The time delay between the frame sync signal and the GPUs signal.

◆ syncSource [1/4]

NVVIOSYNCSOURCE _NVVIOOUTPUTSTATUS::syncSource

Sync source.

◆ syncSource [2/4]

NVVIOSYNCSOURCE _NVVIOOUTPUTCONFIG_V1::syncSource

Sync source.

◆ syncSource [3/4]

NVVIOSYNCSOURCE _NVVIOOUTPUTCONFIG_V2::syncSource

Sync source.

◆ syncSource [4/4]

NVVIOSYNCSOURCE _NVVIOOUTPUTCONFIG_V3::syncSource

Sync source.

◆ syncSourceIsOutput [1/2]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::syncSourceIsOutput

Set this to make house sync as an output; valid only when NV_GSYNC_CONTROL_PARAMS::source is NVAPI_GSYNC_SYNC_SOURCE_VSYNC on P2061 boards. syncSourceIsOutput should always be NVAPI_GSYNC_SYNC_SOURCE_HOUSESYNC i.e. 0 on P2060 boards or when NV_GSYNC_CONTROL_PARAMS::source is set to NVAPI_GSYNC_SYNC_SOURCE_HOUSESYNC.

◆ syncSourceIsOutput [2/2]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::syncSourceIsOutput

Set this to make house sync as an output; valid only when NV_GSYNC_CONTROL_PARAMS::source is NVAPI_GSYNC_SYNC_SOURCE_VSYNC on P2061 boards. syncSourceIsOutput should always be NVAPI_GSYNC_SYNC_SOURCE_HOUSESYNC i.e. 0 on P2060 boards or when NV_GSYNC_CONTROL_PARAMS::source is set to NVAPI_GSYNC_SYNC_SOURCE_HOUSESYNC.

◆ syncState

NVAPI_GSYNC_DISPLAY_SYNC_STATE _NV_GSYNC_DISPLAY::syncState

Is this display slave/master (Retrieved with topology or set by caller for enable/disable sync)

◆ szAdapterString

NvAPI_ShortString NV_DISPLAY_DRIVER_VERSION::szAdapterString

◆ szBuildBaseBranch

NvAPI_ShortString _NV_DISPLAY_DRIVER_INFO_V2::szBuildBaseBranch

(OUT) Contains the driver base branch string after successful return.

◆ szBuildBranch [1/2]

NvAPI_ShortString _NV_DISPLAY_DRIVER_INFO::szBuildBranch

Contains the driver-branch string after successful return.

◆ szBuildBranch [2/2]

NvAPI_ShortString _NV_DISPLAY_DRIVER_INFO_V2::szBuildBranch

Contains the driver-branch string after successful return.

◆ szBuildBranchString

NvAPI_ShortString NV_DISPLAY_DRIVER_VERSION::szBuildBranchString

◆ szChipsetName [1/4]

NvAPI_ShortString NV_CHIPSET_INFO_v4::szChipsetName

Chipset device Name.

◆ szChipsetName [2/4]

NvAPI_ShortString NV_CHIPSET_INFO_v3::szChipsetName

device Name

◆ szChipsetName [3/4]

NvAPI_ShortString NV_CHIPSET_INFO_v2::szChipsetName

device Name

◆ szChipsetName [4/4]

NvAPI_ShortString NV_CHIPSET_INFO_v1::szChipsetName

◆ szSubSysVendorName [1/2]

NvAPI_ShortString NV_CHIPSET_INFO_v4::szSubSysVendorName

subsystem vendor Name

◆ szSubSysVendorName [2/2]

NvAPI_ShortString NV_CHIPSET_INFO_v3::szSubSysVendorName

subsystem vendor Name

◆ szVendorName [1/4]

NvAPI_ShortString NV_CHIPSET_INFO_v4::szVendorName

Chipset vendor Name.

◆ szVendorName [2/4]

NvAPI_ShortString NV_CHIPSET_INFO_v3::szVendorName

vendor Name

◆ szVendorName [3/4]

NvAPI_ShortString NV_CHIPSET_INFO_v2::szVendorName

vendor Name

◆ szVendorName [4/4]

NvAPI_ShortString NV_CHIPSET_INFO_v1::szVendorName

◆ [struct] [1/5]

struct { ... } NV_VIEW_TARGET_INFO::target[NVAPI_MAX_VIEW_TARGET]

◆ target [2/5]

NV_THERMAL_TARGET NV_GPU_THERMAL_SETTINGS_V1::target

Thermal sensor targeted @ GPU, memory, chipset, powersupply, Visual Computing Device, etc.

◆ [] [3/5]

NV_THERMAL_TARGET { ... } ::target

Thermal sensor targeted @ GPU, memory, chipset, powersupply, Visual Computing Device, etc.

◆ target [4/5]

NV_THERMAL_TARGET NV_GPU_THERMAL_SETTINGS_V2::target

Thermal sensor targeted - GPU, memory, chipset, powersupply, Visual Computing Device, etc.

◆ [] [5/5]

NV_THERMAL_TARGET { ... } ::target

Thermal sensor targeted - GPU, memory, chipset, powersupply, Visual Computing Device, etc.

◆ target_max_luminance [1/4]

NvU16 _NV_HDR_CAPABILITIES_V2::target_max_luminance

Represents max luminance level of sink.

◆ [] [2/4]

NvU16 { ... } ::target_max_luminance

Represents max luminance level of sink.

◆ [] [3/4]

NvU16 { ... } ::target_max_luminance

Represents max luminance level of sink.

◆ target_max_luminance [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::target_max_luminance

Represents max luminance level of sink.

◆ [] [1/4]

NvU16 { ... } ::target_min_luminance

Represents min luminance level of Sink.

◆ target_min_luminance [2/4]

NvU16 _NV_HDR_CAPABILITIES_V2::target_min_luminance

Represents min luminance level of Sink.

◆ [] [3/4]

NvU16 { ... } ::target_min_luminance

Represents min luminance level of Sink.

◆ target_min_luminance [4/4]

NvU16 _NV_HDR_CAPABILITIES_V3::target_min_luminance

Represents min luminance level of Sink.

◆ targetDisplayHeight

NvU32 _NV_SCANOUT_INFORMATION::targetDisplayHeight

Vertical size of the active resolution scanned out to the display.

◆ targetDisplayWidth

NvU32 _NV_SCANOUT_INFORMATION::targetDisplayWidth

Horizontal size of the active resolution scanned out to the display.

◆ targetId

NvU32 _NV_DISPLAYCONFIG_PATH_TARGET_INFO_V2::targetId

Windows CCD target ID. Must be present only for non-NVIDIA adapter, for NVIDIA adapter this parameter is ignored.

◆ TargetIndependentRasterWithDepth

BOOL _NV_D3D11_FEATURE_DATA_RASTERIZER_SUPPORT::TargetIndependentRasterWithDepth

◆ TargetIndepentRasterWithDepth [1/2]

bool NvAPI_D3D11_RASTERIZER_DESC_EX::TargetIndepentRasterWithDepth

◆ TargetIndepentRasterWithDepth [2/2]

bool NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::TargetIndepentRasterWithDepth

◆ targetInfo [1/2]

NV_DISPLAYCONFIG_PATH_TARGET_INFO_V1* _NV_DISPLAYCONFIG_PATH_INFO_V1::targetInfo

◆ targetInfo [2/2]

NV_DISPLAYCONFIG_PATH_TARGET_INFO_V2* _NV_DISPLAYCONFIG_PATH_INFO_V2::targetInfo

◆ targetInfoCount [1/2]

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V1::targetInfoCount

Number of elements in targetInfo array.

◆ targetInfoCount [2/2]

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::targetInfoCount

Number of elements in targetInfo array.

◆ targetViewportRect

NvSBox _NV_SCANOUT_INFORMATION::targetViewportRect

Area inside the rect described by targetDisplayWidth/Height sourceViewportRect is scanned out to.

◆ TemporaryResource [1/4]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::TemporaryResource

◆ TemporaryResource [2/4]

NV_D3D11_META_COMMAND_RESOURCE NV_D3D11_META_COMMAND_EXECUTE_GEMM_DESC::TemporaryResource

◆ TemporaryResource [3/4]

D3D12_GPU_VIRTUAL_ADDRESS NV_D3D12_META_COMMAND_EXECUTE_CONVOLUTION_EX_DESC::TemporaryResource

◆ TemporaryResource [4/4]

NvU64 NV_D3D12_META_COMMAND_EXECUTE_GEMM_DESC::TemporaryResource

◆ tensorCores

NvU32 _NV_GPU_INFO_V2::tensorCores

Number of "Tensor Cores" supported by the GPU.

◆ testColorChange

NvU32 NV_DISPLAY_PORT_CONFIG::testColorChange

If testing mode, skip validation.

◆ testLinkTrain

NvU32 NV_DISPLAY_PORT_CONFIG::testLinkTrain

If testing mode, skip validation.

◆ texDesc

D3D12_CPU_DESCRIPTOR_HANDLE NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::texDesc

[in] CPU descriptor handle of the texture (SRV)

◆ Texture2D [1/2]

NV_TEX2D_SRRV _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::Texture2D

◆ [] [2/2]

NV_TEX2D_SRRV { ... } ::Texture2D

◆ Texture2DArray [1/2]

NV_TEX2D_ARRAY_SRRV _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::Texture2DArray

◆ [] [2/2]

NV_TEX2D_ARRAY_SRRV { ... } ::Texture2DArray

◆ textureHandle

NvU64 NVAPI_D3D12_GET_CUDA_MERGED_TEXTURE_SAMPLER_OBJECT_PARAMS::textureHandle

[out] A variable that receives the driver handle

◆ textureRect

NvSBox* NV_SCANOUT_WARPING_DATA::textureRect

rectangle in desktop coordinates describing the source area for the warping

◆ timeInQueueUs

NvS32 _NV_SET_REFLEX_SYNC_PARAMS::timeInQueueUs

(IN) Amount of time in the completed frame queue. Can be negative. (0 means N/A)

◆ timeInQueueUsTarget

NvU32 _NV_SET_REFLEX_SYNC_PARAMS::timeInQueueUsTarget

(IN) Target amount of time in the completed frame queue. (0 means N/A)

◆ Timestamp

NvU64 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::Timestamp

(IN) Timestamp at which the gaze data has been captured. Should be larger than timestamp provided at previous update.

◆ timestamp

NvU64 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::timestamp

[out] Time at which data was collected. Represented as elapsed microseconds since 00:00:00 UTC on January 1, 1970.

◆ timeStampms

NvU64 NV_GPU_CLIENT_ILLUM_DEVICE_SYNC_V1::timeStampms

Time stamp value required for synchronization.

◆ timing [1/2]

NV_TIMING _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::timing

Scan out timing, valid only if timingOverride == NV_TIMING_OVERRIDE_CUST The value NV_TIMING::NV_TIMINGEXT::rrx1k is obtained from the EDID. The driver may tweak this value for HDTV, stereo, etc., before reporting it to the OS.

◆ timing [2/2]

NV_TIMING NV_CUSTOM_DISPLAY::timing

Timing used to program TMDS/DAC/LVDS/HDMI/TVEncoder, etc.

◆ timingOverride

NV_TIMING_OVERRIDE _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::timingOverride

Ignored if timingOverride == NV_TIMING_OVERRIDE_CURRENT.

◆ top_bar

NvU32 NV_INFOFRAME_VIDEO::top_bar

◆ topo

NV_MOSAIC_TOPO NV_MOSAIC_TOPO_BRIEF::topo

The topology.

◆ topoBriefs [1/2]

NV_MOSAIC_TOPO_BRIEF _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::topoBriefs[NV_MOSAIC_TOPO_MAX]

List of supported topologies with only brief details.

◆ topoBriefs [2/2]

NV_MOSAIC_TOPO_BRIEF _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::topoBriefs[NV_MOSAIC_TOPO_MAX]

List of supported topologies with only brief details.

◆ topoBriefsCount [1/2]

NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::topoBriefsCount

Number of topologies in below array.

◆ topoBriefsCount [2/2]

NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::topoBriefsCount

Number of topologies in below array.

◆ topos [1/2]

NV_MOSAIC_TOPO_DETAILS NV_MOSAIC_TOPO_GROUP::topos[NV_MOSAIC_MAX_TOPO_PER_TOPO_GROUP]

◆ topos [2/2]

NV_MOSAIC_TOPOLOGY NV_MOSAIC_SUPPORTED_TOPOLOGIES::topos[NVAPI_MAX_MOSAIC_TOPOS]

Maximum number of topologies.

◆ totalCount

NvU32 NV_MOSAIC_SUPPORTED_TOPOLOGIES::totalCount

Count of valid topologies.

◆ TransA

NvU64 NV_META_COMMAND_CREATE_GEMM_DESC::TransA

◆ TransB

NvU64 NV_META_COMMAND_CREATE_GEMM_DESC::TransB

◆ triangleMicromapBaseLocation

NvU32 _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::triangleMicromapBaseLocation

Constant added to all DMM indices in displacementMicromapIndexBuffer.

◆ triangleMicromapIndexBuffer

D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::triangleMicromapIndexBuffer

Optional buffer specifying which DMM index to use for each triangle; if NULL, there is a 1:1 mapping between input triangles and DMM Array entries. For BLAS updates, this input buffer must match that of the original build.

◆ triangleMicromapIndexFormat

DXGI_FORMAT _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::triangleMicromapIndexFormat

Format of displacementMicromapIndexBuffer, either DXGI_FORMAT_R32_UINT or DXGI_FORMAT_R16_UINT.

◆ trianglePrimitiveFlagsBuffer

D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::trianglePrimitiveFlagsBuffer

Optional, per-triangle UINT8 mode flags (NVAPI_D3D12_RAYTRACING_DISPLACEMENT_MICROMAP_PRIMITIVE_FLAGS)

◆ triangles [1/4]

D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_TRIANGLES_DESC::triangles

Triangle mesh descriptor.

◆ triangles [2/4]

D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_OMM_TRIANGLES_DESC::triangles

Triangle mesh descriptor.

◆ triangles [3/4]

D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::triangles

Describes triangle geometry if type is NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_TRIANGLES_EX. Otherwise, this parameter is unused (space repurposed in a union).

◆ [] [4/4]

D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC { ... } ::triangles

Describes triangle geometry if type is NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_TRIANGLES_EX. Otherwise, this parameter is unused (space repurposed in a union).

◆ tvFormat [1/4]

NV_DISPLAY_TV_FORMAT NV_DISPLAY_PATH::tvFormat

(IN) To choose the last TV format set this value to NV_DISPLAY_TV_FORMAT_NONE

◆ tvFormat [2/4]

NV_DISPLAY_TV_FORMAT _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::tvFormat

(IN) to choose the last TV format set this value to NV_DISPLAY_TV_FORMAT_NONE In case of NvAPI_DISP_GetDisplayConfig(), this field will indicate the currently applied TV format; if no TV format is applied, this field will have NV_DISPLAY_TV_FORMAT_NONE value. In case of NvAPI_DISP_SetDisplayConfig(), this field should only be set in case of TVs; for other displays this field will be ignored and resolution & refresh rate specified in input will be used to apply the TV format.

◆ [] [3/4]

NvU32 { ... } ::tvFormat

The actual analog HD/SDTV format. Used when the timing type is NV_TIMING_OVERRIDE_ANALOG_TV and width==height==rr==0.

◆ tvFormat [4/4]

NvU32 NV_TIMING_FLAG::tvFormat

The actual analog HD/SDTV format. Used when the timing type is NV_TIMING_OVERRIDE_ANALOG_TV and width==height==rr==0.

◆ txSublinkStatus [1/2]

NvU8 NVLINK_LINK_STATUS_INFO_V1::txSublinkStatus

This field specifies the current state of TX sublink.See NVAPI_NVLINK_GET_NVLINK_STATUS_SUBLINK_TX_STATE_* for possible values.

◆ txSublinkStatus [2/2]

NvU8 NVLINK_LINK_STATUS_INFO_V2::txSublinkStatus

This field specifies the current state of TX sublink.See NVAPI_NVLINK_GET_NVLINK_STATUS_SUBLINK_TX_STATE_* for possible values.

◆ type [1/9]

NV_GPU_CLIENT_ILLUM_DEVICE_TYPE _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_V1::type

Type of the illumination device.

◆ type [2/9]

NV_GPU_CLIENT_ILLUM_DEVICE_TYPE NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_V1::type

Type of the illum device.

◆ type [3/9]

NV_GPU_CLIENT_ILLUM_ZONE_TYPE _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::type

◆ type [4/9]

NV_GPU_CLIENT_ILLUM_ZONE_TYPE _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1::type

◆ type [5/9]

NvU8 NV_INFOFRAME_DATA::type

type of infoframe

◆ type [6/9]

NV_TIMING_OVERRIDE _NV_TIMING_INPUT::type

Timing type(formula) to use for calculating the timing.

◆ type [7/9]

NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_TYPE NVAPI_D3D12_GET_CUDA_INDEPENDENT_DESCRIPTOR_OBJECT_PARAMS::type

[in] Type of the descriptor

◆ type [8/9]

NVAPI_D3D12_RAYTRACING_GEOMETRY_TYPE_EX _NVAPI_D3D12_RAYTRACING_GEOMETRY_DESC_EX::type

The type of geometry stored in the union of this structure.

◆ type [9/9]

D3D12_RAYTRACING_ACCELERATION_STRUCTURE_TYPE _NVAPI_D3D12_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_INPUTS_EX::type

Whether a top-level acceleration structure (TLAS) or bottom-level acceleration structure (BLAS) will be built using this information.

◆ typeId

NV_GPU_PERF_PSTATE20_CLOCK_TYPE_ID NV_GPU_PSTATE20_CLOCK_ENTRY_V1::typeId

Clock type ID.

◆ [] [1/2]

NvU32 { ... } ::u32CurrentValue

Accessing current DWORD value of this setting.

◆ u32CurrentValue [2/2]

NvU32 _NVDRS_SETTING_V1::u32CurrentValue

Accessing current DWORD value of this setting.

◆ [] [1/2]

NvU32 { ... } ::u32DefaultValue

Accessing default DWORD value of this setting.

◆ u32DefaultValue [2/2]

NvU32 _NVDRS_SETTING_VALUES::u32DefaultValue

Accessing default DWORD value of this setting.

◆ u32PredefinedValue [1/2]

NvU32 _NVDRS_SETTING_V1::u32PredefinedValue

Accessing default DWORD value of this setting.

◆ [] [2/2]

NvU32 { ... } ::u32PredefinedValue

Accessing default DWORD value of this setting.

◆ u32Value [1/2]

NvU32 _NVDRS_SETTING_VALUES::u32Value

< NOT mixed types.

All possible DWORD values for a setting

◆ [] [2/2]

NvU32 { ... } ::u32Value

< NOT mixed types.

All possible DWORD values for a setting

◆ uavSlot

NvU32 NVAPI_D3D12_PSO_SET_SHADER_EXTENSION_SLOT_DESC_V1::uavSlot

◆ uBlue [1/2]

NvU16 _NVVIOGAMMARAMP10::uBlue[1024]

Blue channel gamma ramp (10-bit index, 16-bit values)

◆ uBlue [2/2]

NvU16 _NVVIOGAMMARAMP8::uBlue[256]

Blue channel gamma ramp (8-bit index, 16-bit values)

◆ uEnabled

NvU32 _NVVIOCOMPOSITERANGE::uEnabled

◆ uGreen [1/2]

NvU16 _NVVIOGAMMARAMP10::uGreen[1024]

Green channel gamma ramp (10-bit index, 16-bit values)

◆ uGreen [2/2]

NvU16 _NVVIOGAMMARAMP8::uGreen[256]

Green channel gamma ramp (8-bit index, 16-bit values)

◆ uMax

NvU32 _NVVIOCOMPOSITERANGE::uMax

◆ uMin

NvU32 _NVVIOCOMPOSITERANGE::uMin

◆ [] [1/2]

NvU64 { ... } ::unused

◆ unused [2/2]

NvU64 NV_D3D11_META_COMMAND_RESOURCE::unused

◆ uPowerOn

NvU32 _NVVIOOUTPUTSTATUS::uPowerOn

TRUE: indicates there is sufficient power.

◆ UpsampleMode

NV_META_COMMAND_CONVOLUTION_UPSAMPLE_MODE NV_META_COMMAND_CONVOLUTION_FUSE_DESC::UpsampleMode

◆ uRange

NvU32 _NVVIOCOMPOSITERANGE::uRange

◆ uRed [1/2]

NvU16 _NVVIOGAMMARAMP10::uRed[1024]

Red channel gamma ramp (10-bit index, 16-bit values)

◆ uRed [2/2]

NvU16 _NVVIOGAMMARAMP8::uRed[256]

Red channel gamma ramp (8-bit index, 16-bit values)

◆ UseAttributeSkipMask [1/2]

BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::UseAttributeSkipMask

◆ UseAttributeSkipMask [2/2]

BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::UseAttributeSkipMask

◆ UseCoordinateSwizzle [1/2]

BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::UseCoordinateSwizzle

◆ UseCoordinateSwizzle [2/2]

BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::UseCoordinateSwizzle

◆ userFriendlyName [1/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V1::userFriendlyName

UserFriendly name of the Application.

◆ userFriendlyName [2/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V2::userFriendlyName

UserFriendly name of the Application.

◆ userFriendlyName [3/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V3::userFriendlyName

UserFriendly name of the Application.

◆ userFriendlyName [4/4]

NvAPI_UnicodeString _NVDRS_APPLICATION_V4::userFriendlyName

UserFriendly name of the Application.

◆ UseSpecificShaderExt [1/8]

BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::UseSpecificShaderExt

◆ UseSpecificShaderExt [2/8]

BOOL NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::UseSpecificShaderExt

◆ UseSpecificShaderExt [3/8]

BOOL NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::UseSpecificShaderExt

◆ UseSpecificShaderExt [4/8]

BOOL NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::UseSpecificShaderExt

◆ UseSpecificShaderExt [5/8]

BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::UseSpecificShaderExt

◆ UseSpecificShaderExt [6/8]

BOOL NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V3::UseSpecificShaderExt

◆ UseSpecificShaderExt [7/8]

BOOL NVAPI_D3D12_PSO_HULL_SHADER_DESC_V2::UseSpecificShaderExt

◆ UseSpecificShaderExt [8/8]

BOOL NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V3::UseSpecificShaderExt

◆ UseViewportMask [1/2]

BOOL NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::UseViewportMask

◆ UseViewportMask [2/2]

BOOL NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::UseViewportMask

◆ UseWithFastGS [1/9]

BOOL NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V2::UseWithFastGS

◆ UseWithFastGS [2/9]

BOOL NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::UseWithFastGS

◆ UseWithFastGS [3/9]

BOOL NvAPI_D3D11_CREATE_HULL_SHADER_EX_V1::UseWithFastGS

◆ UseWithFastGS [4/9]

BOOL NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::UseWithFastGS

◆ UseWithFastGS [5/9]

BOOL NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V2::UseWithFastGS

◆ UseWithFastGS [6/9]

BOOL NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::UseWithFastGS

◆ UseWithFastGS [7/9]

BOOL NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V2::UseWithFastGS

◆ UseWithFastGS [8/9]

BOOL NVAPI_D3D12_PSO_HULL_SHADER_DESC_V1::UseWithFastGS

◆ UseWithFastGS [9/9]

BOOL NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V2::UseWithFastGS

◆ uSyncSourceLocked

NvU32 _NVVIOOUTPUTSTATUS::uSyncSourceLocked

genlocked to framelocked to ref signal

◆ utilId

NV_GPU_CLIENT_UTIL_DOMAIN_ID _NV_GPU_CLIENT_UTILIZATION_DATA_V1::utilId

[out] Utilization domain identifier.

◆ [struct]

struct { ... } NV_GPU_DYNAMIC_PSTATES_INFO_EX::utilization[NVAPI_MAX_GPU_UTILIZATIONS]

◆ utilizationPercent

NvU32 _NV_GPU_CLIENT_UTILIZATION_DATA_V1::utilizationPercent

[out] Percentage of time where the domain is considered busy since the last sample. Units of percent*100; i.e. 5000 = 50%.

◆ utils

NV_GPU_CLIENT_UTILIZATION_DATA_V1 _NV_GPU_CLIENT_CALLBACK_UTILIZATION_DATA_V1::utils[NV_GPU_CLIENT_UTIL_DOMAINS_MAX_V1]

[out] Status data for each utilization domain.

◆ validityMask

NvU32 NV_MOSAIC_TOPO_DETAILS::validityMask

0 means topology is valid with the current hardware. If not 0, inspect bits against NV_MOSAIC_TOPO_VALIDITY_*.

◆ value

NvS32 NV_GPU_PERF_PSTATES20_PARAM_DELTA::value

Value of parameter delta (in respective units [kHz, uV])

◆ Value [1/2]

NvU32 _NV_GPU_GET_ILLUMINATION_PARM_V1::Value

A DWORD that will contain the current value of the specified attribute. This is specified as a percentage of the full range of the attribute (0-100; 0 = off, 100 = full brightness)

◆ Value [2/2]

NvU32 _NV_GPU_SET_ILLUMINATION_PARM_V1::Value

A DWORD containing the new value for the specified attribute. This should be specified as a percentage of the full range of the attribute (0-100; 0 = off, 100 = full brightness) If a value is specified outside this range, NVAPI_INVALID_ARGUMENT will be returned.

◆ valueData

NvU8 _NVDRS_BINARY_SETTING::valueData[NVAPI_BINARY_DATA_MAX]

◆ valueLength

NvU32 _NVDRS_BINARY_SETTING::valueLength

valueLength should always be in number of bytes.

◆ [struct]

struct { ... } NV_GPU_PERF_PSTATES20_PARAM_DELTA::valueRange

◆ vblankIntervalUs

NvU32 _NV_SET_REFLEX_SYNC_PARAMS::vblankIntervalUs

(IN) Interval between VBLANKs in microseconds. (0 means N/A)

◆ VBorder

NvU16 _NV_TIMING::VBorder

vertical border

◆ vcdb [1/2]

NV_MONITOR_CAPS_VCDB _NV_MONITOR_CAPABILITIES_V1::vcdb

◆ [] [2/2]

NV_MONITOR_CAPS_VCDB { ... } ::vcdb

◆ vendorId [1/4]

NvU32 NV_CHIPSET_INFO_v4::vendorId

Chipset vendor identification.

◆ vendorId [2/4]

NvU32 NV_CHIPSET_INFO_v3::vendorId

vendor ID

◆ vendorId [3/4]

NvU32 NV_CHIPSET_INFO_v2::vendorId

vendor ID

◆ vendorId [4/4]

NvU32 NV_CHIPSET_INFO_v1::vendorId

◆ version [1/230]

NvU32 NV_EDID_V1::version

◆ version [2/230]

NvU32 NV_EDID_V2::version

Structure version.

◆ version [3/230]

NvU32 NV_EDID_V3::version

Structure version.

◆ version [4/230]

NvU32 NV_VIEW_TARGET_INFO::version

(IN) structure version

◆ version [5/230]

NvU32 NV_DISPLAY_PATH_INFO_V3::version

(IN) Structure version

◆ version [6/230]

NvU32 NV_DISPLAY_PATH_INFO::version

(IN) Structure version

◆ version [7/230]

NvU32 _NV_DISPLAYCONFIG_PATH_ADVANCED_TARGET_INFO_V1::version

◆ version [8/230]

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V1::version

◆ version [9/230]

NvU32 _NV_DISPLAYCONFIG_PATH_INFO_V2::version

◆ version [10/230]

NvU32 NV_GPU_PERF_PSTATES20_INFO_V1::version

Version info of the structure (NV_GPU_PERF_PSTATES20_INFO_VER<n>)

◆ version [11/230]

NvU32 _NV_GPU_PERF_PSTATES20_INFO_V2::version

Version info of the structure (NV_GPU_PERF_PSTATES20_INFO_VER<n>)

◆ version [12/230]

NvU32 NV_DISPLAY_DRIVER_VERSION::version

◆ version [13/230]

NvU32 _NV_GPU_DISPLAYIDS::version

◆ version [14/230]

NvU32 _NV_BOARD_INFO::version

structure version

◆ version [15/230]

NvU32 NV_GPU_ARCH_INFO_V1::version

◆ version [16/230]

NvU32 NV_GPU_ARCH_INFO_V2::version

◆ version [17/230]

NvU32 NV_I2C_INFO_V1::version

The structure version.

◆ version [18/230]

NvU32 NV_I2C_INFO_V2::version

The structure version.

◆ version [19/230]

NvU32 NV_I2C_INFO_V3::version

The structure version.

◆ version [20/230]

NvU32 NV_GPU_GET_HDCP_SUPPORT_STATUS::version

◆ version [21/230]

NvU32 NV_COMPUTE_GPU_TOPOLOGY_V1::version

Structure version.

◆ version [22/230]

NvU32 _NV_COMPUTE_GPU_TOPOLOGY_V2::version

Structure version.

◆ version [23/230]

NvU32 NV_GPU_ECC_STATUS_INFO::version

Structure version.

◆ version [24/230]

NvU32 NV_GPU_ECC_ERROR_INFO::version

Structure version.

◆ version [25/230]

NvU32 NV_GPU_ECC_CONFIGURATION_INFO::version

◆ version [26/230]

NvU32 NV_EVENT_REGISTER_CALLBACK::version

version field to ensure minimum version compatibility

◆ version [27/230]

NvU32 NV_SCANOUT_INTENSITY_DATA_V1::version

version of this structure

◆ version [28/230]

NvU32 NV_SCANOUT_INTENSITY_DATA_V2::version

version of this structure

◆ version [29/230]

NvU32 _NV_SCANOUT_INTENSITY_STATE_DATA::version

version of this structure

◆ version [30/230]

NvU32 NV_SCANOUT_WARPING_DATA::version

version of this structure

◆ version [31/230]

NvU32 _NV_SCANOUT_WARPING_STATE_DATA::version

version of this structure

◆ version [32/230]

NvU32 _NV_SCANOUT_INFORMATION::version

Structure version, needs to be initialized with NV_SCANOUT_INFORMATION_VER.

◆ version [33/230]

NvU32 _NV_GPU_VIRTUALIZATION_INFO::version

Structure version.

◆ version [34/230]

NvU32 _NV_LOGICAL_GPU_DATA_V1::version

[in] Structure version.

◆ version [35/230]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V1::version

IN - Structure version.

◆ version [36/230]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V2::version

Unused.

◆ version [37/230]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V3::version

Unused.

◆ version [38/230]

NvU32 _NV_LICENSE_FEATURE_DETAILS_V4::version

Unused.

◆ version [39/230]

NvU32 _NV_LICENSABLE_FEATURES_V1::version

IN - Structure version.

◆ version [40/230]

NvU32 _NV_LICENSABLE_FEATURES_V2::version

IN - Structure version.

◆ version [41/230]

NvU32 _NV_LICENSABLE_FEATURES_V3::version

IN - Structure version.

◆ version [42/230]

NvU32 _NV_LICENSABLE_FEATURES_V4::version

IN - Structure version.

◆ version [43/230]

NvU32 NVLINK_GET_CAPS_V1::version

Version of this structure. Must always be first element in this structure.

◆ version [44/230]

NvU32 NVLINK_GET_STATUS_V1::version

Version of this structure. Must always be first element in this structure.

◆ version [45/230]

NvU32 NVLINK_GET_STATUS_V2::version

Version of this structure. Must always be first element in this structure.

◆ version [46/230]

NvU32 _NV_GPU_INFO_V1::version

Structure Version.

◆ version [47/230]

NvU32 _NV_GPU_INFO_V2::version

Structure Version.

◆ version [48/230]

NvU32 _NV_GPU_VR_READY_V1::version

Structure Version.

◆ version [49/230]

NvU32 _NV_GPU_GSP_INFO_V1::version

[in] Structure version

◆ version [50/230]

NvU32 NV_GPU_PERF_PSTATES_INFO_V1::version

◆ version [51/230]

NvU32 NV_GPU_PERF_PSTATES_INFO_V2::version

◆ version [52/230]

NvU32 NV_GPU_DYNAMIC_PSTATES_INFO_EX::version

Structure version.

◆ version [53/230]

NvU32 NV_GPU_THERMAL_SETTINGS_V1::version

structure version

◆ version [54/230]

NvU32 NV_GPU_THERMAL_SETTINGS_V2::version

structure version

◆ version [55/230]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V1::version

Structure version.

◆ version [56/230]

NvU32 NV_GPU_CLOCK_FREQUENCIES_V2::version

Structure version.

◆ version [57/230]

NvU32 _NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM_V1::version

Version of this structure.

◆ version [58/230]

NvU32 _NV_GPU_GET_ILLUMINATION_PARM_V1::version

Version of this structure.

◆ version [59/230]

NvU32 _NV_GPU_SET_ILLUMINATION_PARM_V1::version

Version of this structure.

◆ version [60/230]

NvU32 _NV_GPU_CLIENT_ILLUM_DEVICE_INFO_PARAMS_V1::version

Version of structure. Must always be first member.

◆ version [61/230]

NvU32 NV_GPU_CLIENT_ILLUM_DEVICE_CONTROL_PARAMS_V1::version

Version of structure. Must always be first member.

◆ version [62/230]

NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_PARAMS_V1::version

Version of structure. Must always be first member.

◆ version [63/230]

NvU32 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::version

◆ version [64/230]

NvU32 _NV_DISPLAY_PORT_INFO_V1::version

Structure version.

◆ version [65/230]

NvU32 NV_DISPLAY_PORT_CONFIG::version

Structure version - 2 is the latest.

◆ version [66/230]

NvU32 _NV_HDMI_SUPPORT_INFO_V1::version

Structure version.

◆ version [67/230]

NvU32 _NV_HDMI_SUPPORT_INFO_V2::version

Structure version.

◆ version [68/230]

NvU32 NV_INFOFRAME_PROPERTY::version

◆ version [69/230]

NvU32 NV_INFOFRAME_DATA::version

version of this structure

◆ version [70/230]

NvU32 _NV_COLOR_DATA_V1::version

Version of this structure.

◆ version [71/230]

NvU32 _NV_COLOR_DATA_V2::version

Version of this structure.

◆ version [72/230]

NvU32 _NV_COLOR_DATA_V3::version

Version of this structure.

◆ version [73/230]

NvU32 _NV_COLOR_DATA_V4::version

Version of this structure.

◆ version [74/230]

NvU32 _NV_COLOR_DATA_V5::version

Version of this structure.

◆ version [75/230]

NvU32 _NV_HDR_CAPABILITIES_V1::version

Version of this structure.

◆ version [76/230]

NvU32 _NV_HDR_CAPABILITIES_V2::version

Version of this structure.

◆ version [77/230]

NvU32 _NV_HDR_CAPABILITIES_V3::version

Version of this structure.

◆ version [78/230]

NvU32 _NV_HDR_COLOR_DATA_V1::version

Version of this structure.

◆ version [79/230]

NvU32 _NV_HDR_COLOR_DATA_V2::version

Version of this structure.

◆ version [80/230]

NvU32 _NV_HDR_METADATA_V1::version

Version of this structure.

◆ version [81/230]

NvU32 _NV_TIMING_INPUT::version

(IN) structure version

◆ version [82/230]

NvU32 _NV_MONITOR_CAPABILITIES_V1::version

◆ version [83/230]

NvU32 _NV_MONITOR_COLOR_DATA::version

◆ version [84/230]

NvU32 NV_CUSTOM_DISPLAY::version

◆ version [85/230]

NvU32 _NV_EDID_DATA_V1::version

Structure version.

◆ version [86/230]

NvU32 _NV_EDID_DATA_V2::version

Structure version.

◆ version [87/230]

NvU32 _NV_GET_ADAPTIVE_SYNC_DATA_V1::version

[in] structure version

◆ version [88/230]

NvU32 _NV_SET_ADAPTIVE_SYNC_DATA_V1::version

[in] structure version

◆ version [89/230]

NvU32 _NV_GET_VIRTUAL_REFRESH_RATE_DATA_V1::version

[in] structure version

◆ version [90/230]

NvU32 _NV_SET_VIRTUAL_REFRESH_RATE_DATA_V1::version

[in] structure version

◆ version [91/230]

NvU32 NV_SET_PREFERRED_STEREO_DISPLAY_V1::version

[in] Structure version

◆ version [92/230]

NvU32 NV_GET_PREFERRED_STEREO_DISPLAY_V1::version

[in] Structure version

◆ version [93/230]

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_INFO::version

[in] Version of this structure.

◆ version [94/230]

NvU32 _NV_MANAGED_DEDICATED_DISPLAY_METADATA::version

[in] Version of this structure.

◆ version [95/230]

NvU32 _NV_GET_VRR_INFO_V1::version

[in] Structure version

◆ version [96/230]

NvU32 NV_MOSAIC_TOPO_DETAILS::version

Version of this structure.

◆ version [97/230]

NvU32 NV_MOSAIC_TOPO_BRIEF::version

Version of this structure.

◆ version [98/230]

NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::version

Version of this structure.

◆ version [99/230]

NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::version

Version of this structure.

◆ version [100/230]

NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V1::version

Version of this structure.

◆ version [101/230]

NvU32 _NV_MOSAIC_SUPPORTED_TOPO_INFO_V2::version

Version of this structure.

◆ version [102/230]

NvU32 NV_MOSAIC_TOPO_GROUP::version

Version of this structure.

◆ version [103/230]

NvU32 _NV_MOSAIC_GRID_TOPO_DISPLAY_V2::version

Version of this structure.

◆ version [104/230]

NvU32 _NV_MOSAIC_GRID_TOPO_V1::version

Version of this structure.

◆ version [105/230]

NvU32 _NV_MOSAIC_GRID_TOPO_V2::version

Version of this structure.

◆ version [106/230]

NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::version

◆ version [107/230]

NvU32 NV_MOSAIC_TOPOLOGY::version

Version number of the mosaic topology.

◆ version [108/230]

NvU32 NV_MOSAIC_SUPPORTED_TOPOLOGIES::version

◆ version [109/230]

NvU32 _NV_GSYNC_CAPABILITIES_V1::version

Version of the structure.

◆ version [110/230]

NvU32 _NV_GSYNC_CAPABILITIES_V2::version

Version of the structure.

◆ version [111/230]

NvU32 _NV_GSYNC_CAPABILITIES_V3::version

Version of the structure.

◆ version [112/230]

NvU32 _NV_GSYNC_GPU::version

Version of the structure.

◆ version [113/230]

NvU32 _NV_GSYNC_DISPLAY::version

Version of the structure.

◆ version [114/230]

NvU32 _NV_GSYNC_DELAY::version

Version of the structure.

◆ version [115/230]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V1::version

Version of the structure.

◆ version [116/230]

NvU32 _NV_GSYNC_CONTROL_PARAMS_V2::version

Version of the structure.

◆ version [117/230]

NvU32 _NV_GSYNC_STATUS::version

Version of the structure.

◆ version [118/230]

NvU32 _NV_GSYNC_STATUS_PARAMS_V1::version

◆ version [119/230]

NvU32 _NV_GSYNC_STATUS_PARAMS_V2::version

◆ version [120/230]

NvU32 NVAPI_ANSEL_CONFIGURATION_STRUCT_V1::version

Structure version.

◆ version [121/230]

UINT _NV_CUSTOM_SEMANTIC::version

◆ version [122/230]

UINT NvAPI_D3D11_CREATE_GEOMETRY_SHADER_EX_V5::version

◆ version [123/230]

UINT NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V1::version

◆ version [124/230]

UINT NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V2::version

◆ version [125/230]

UINT NvAPI_D3D11_CREATE_VERTEX_SHADER_EX_V3::version

◆ version [126/230]

UINT NvAPI_D3D11_CREATE_HULL_SHADER_EX_V1::version

◆ version [127/230]

UINT NvAPI_D3D11_CREATE_HULL_SHADER_EX_V2::version

◆ version [128/230]

UINT NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V1::version

◆ version [129/230]

UINT NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V2::version

◆ version [130/230]

UINT NvAPI_D3D11_CREATE_DOMAIN_SHADER_EX_V3::version

◆ version [131/230]

UINT NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V1::version

◆ version [132/230]

UINT NvAPI_D3D11_CREATE_PIXEL_SHADER_EX_V2::version

◆ version [133/230]

NvU32 NvAPI_D3D11_CREATE_FASTGS_EXPLICIT_DESC_V1::version

◆ version [134/230]

NvU32 NVAPI_D3D12_PSO_RASTERIZER_STATE_DESC_V1::version

◆ version [135/230]

NvU32 NVAPI_D3D12_PSO_CREATE_FASTGS_EXPLICIT_DESC_V1::version

◆ version [136/230]

NvU32 NVAPI_D3D12_PSO_REQUEST_FAST_GEOMETRY_SHADER_DESC_V1::version

◆ version [137/230]

NvU32 NVAPI_D3D12_PSO_GEOMETRY_SHADER_DESC_V5::version

◆ version [138/230]

NvU32 NVAPI_D3D12_PSO_VERTEX_SHADER_DESC_V1::version

◆ version [139/230]

NvU32 NVAPI_D3D12_PSO_HULL_SHADER_DESC_V1::version

◆ version [140/230]

NvU32 NVAPI_D3D12_PSO_DOMAIN_SHADER_DESC_V1::version

◆ version [141/230]

NvU32 NVAPI_D3D12_PSO_ENABLE_DEPTH_BOUND_TEST_DESC_V1::version

◆ version [142/230]

NvU32 NVAPI_D3D12_PSO_SET_SHADER_EXTENSION_SLOT_DESC_V1::version

◆ version [143/230]

NvU32 _NV_HEAP_PARAMS_V1::version

Version of structure. Must always be first member.

◆ version [144/230]

NvU32 NVAPI_UAV_INFO_V1::version

Structure version.

◆ version [145/230]

NvU32 NVAPI_UAV_INFO_V2::version

Structure version.

◆ version [146/230]

NvU32 NV_GET_GPU_VIRTUAL_ADDRESS_V1::version

[IN]

◆ version [147/230]

NvU32 _NV_RESOURCE_PARAMS_V1::version

Version of structure. Must always be first member.

◆ version [148/230]

NvU32 _NV_MULTIGPU_CAPS_V2::version

The version of the structure.

◆ [] [149/230]

NvU32 { ... } ::version

The version of the structure.

◆ version [150/230]

NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V1::version

◆ version [151/230]

NvU32 _NV_QUERY_SINGLE_PASS_STEREO_SUPPORT_PARAMS_V2::version

◆ version [152/230]

NvU32 _NV_QUERY_MULTIVIEW_SUPPORT_PARAMS_V1::version

◆ version [153/230]

NvU32 _NV_MULTIVIEW_PARAMS_V1::version

◆ version [154/230]

NvU32 _NV_QUERY_MODIFIED_W_SUPPORT_PARAMS::version

◆ version [155/230]

NvU32 _NV_MODIFIED_W_PARAMS::version

◆ version [156/230]

NvU32 _NV_D3D_LATELATCH_OBJECT_DESC_V1::version

◆ version [157/230]

NvU32 _NV_QUERY_LATELATCH_SUPPORT_PARAMS::version

(IN) Parameter structure version

◆ version [158/230]

__in NvU32 _NV_D3D12_MOSAIC_GETCOMPANIONALLOCATIONS::version

Structure version.

◆ version [159/230]

__in NvU32 _NV_D3D12_MOSAIC_GETVIEWPORTANDGPUPARTITIONS::version

Structure version.

◆ version [160/230]

NvU32 _NV_D3D11_EXCLUSIVE_SCISSOR_RECTS_DESC_V1::version

(IN) Parameter struct version

◆ version [161/230]

NvU32 _NV_D3D11_VIEWPORTS_SHADING_RATE_DESC_V1::version

(IN) Struct version

◆ version [162/230]

NvU32 _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::version

(IN) Parameter struct version

◆ version [163/230]

NvU32 _NV_PIXEL_SHADING_RATE_SAMPLE_ORDER_TABLE_V1::version

◆ version [164/230]

NvU32 _NV_VRS_HELPER_LATCH_GAZE_PARAMS_V1::version

(IN) Struct version

◆ version [165/230]

NvU32 _NV_FOVEATED_RENDERING_CUSTOM_SHADING_RATE_PRESET_DESC_V1::version

◆ version [166/230]

NvU32 _NV_FOVEATED_RENDERING_CUSTOM_FOVEATION_PATTERN_PRESET_DESC_V1::version

◆ version [167/230]

NvU32 _NV_FOVEATED_RENDERING_DESC_V1::version

(IN) Struct version

◆ version [168/230]

NvU32 _NV_VRS_HELPER_ENABLE_PARAMS_V1::version

(IN) Struct version

◆ version [169/230]

NvU32 _NV_VRS_HELPER_DISABLE_PARAMS_V1::version

(IN) Struct version

◆ version [170/230]

NvU32 _NV_VRS_HELPER_GET_SHADING_RATE_RESOURCE_PARAMS_V1::version

(IN) Struct version

◆ version [171/230]

NvU32 _NV_VRS_HELPER_PURGE_INTERNAL_RESOURCES_PARAMS_V1::version

(IN) Struct version

◆ version [172/230]

NvU32 _NV_VRS_HELPER_INIT_PARAMS_V1::version

(IN) Struct version

◆ version [173/230]

NvU32 _NV_FOVEATED_RENDERING_GAZE_DATA_PER_EYE::version

(IN) Version of the structure

◆ version [174/230]

NvU32 _NV_FOVEATED_RENDERING_UPDATE_GAZE_DATA_PARAMS::version

(IN) Struct version

◆ version [175/230]

NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V2::version

(IN) Struct version

◆ version [176/230]

NvU32 _NV_GAZE_HANDLER_INIT_PARAMS_V1::version

(IN) Struct version

◆ version [177/230]

NvU32 _NV_SMP_ASSIST_ENABLE_PARAMS_V1::version

(IN) Structure version

◆ version [178/230]

NvU32 _NV_SMP_ASSIST_DISABLE_PARAMS_V1::version

(IN) Structure version

◆ version [179/230]

NvU32 _NV_SMP_ASSIST_GET_CONSTANTS_V3::version

(IN) Structure version

◆ version [180/230]

NvU32 _NV_SMP_ASSIST_SETUP_PARAMS_V1::version

(IN) Structure version

◆ version [181/230]

NvU32 _NV_SMP_ASSIST_UPDATE_INSTANCEDSTEREO_DATA_PARAMS_V1::version

(IN) Structure version

◆ version [182/230]

NvU32 _NV_SMP_ASSIST_INITIALIZE_PARAMS_V1::version

(IN) Structure version

◆ version [183/230]

NvU32 _NV_QUERY_SMP_ASSIST_SUPPORT_PARAMS_V1::version

(IN) Structure version

◆ version [184/230]

NvU32 _NV_GET_SLEEP_STATUS_PARAMS::version

(IN) Structure version

◆ version [185/230]

NvU32 _NV_SET_SLEEP_MODE_PARAMS::version

(IN) Structure version

◆ version [186/230]

NvU32 _NV_SET_REFLEX_SYNC_PARAMS::version

(IN) Structure version

◆ version [187/230]

NvU32 _NV_LATENCY_RESULT_PARAMS::version

(IN) Structure version

◆ version [188/230]

NvU32 _NV_LATENCY_MARKER_PARAMS::version

(IN) Structure version

◆ version [189/230]

NvU32 _NV_ASYNC_FRAME_MARKER_PARAMS_V1::version

(IN) Structure version

◆ version [190/230]

NvU32 _NVAPI_GET_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_GET_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_VER.

◆ version [191/230]

NvU32 _NVAPI_GET_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_GET_RAYTRACING_OPACITY_MICROMAP_ARRAY_PREBUILD_INFO_PARAMS_VER.

◆ version [192/230]

NvU32 _NVAPI_D3D12_SET_CREATE_PIPELINE_STATE_OPTIONS_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_D3D12_SET_CREATE_PIPELINE_STATE_OPTIONS_PARAMS_VER.

◆ version [193/230]

NvU32 _NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_CHECK_DRIVER_MATCHING_IDENTIFIER_EX_PARAMS_VER.

◆ version [194/230]

NvU32 _NVAPI_GET_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO_EX_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_GET_RAYTRACING_ACCELERATION_STRUCTURE_PREBUILD_INFO_EX_PARAMS_VER.

◆ version [195/230]

NvU32 _NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_BUILD_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_VER.

◆ version [196/230]

NvU32 _NVAPI_RELOCATE_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_RELOCATE_RAYTRACING_OPACITY_MICROMAP_ARRAY_PARAMS_VER.

◆ version [197/230]

NvU32 _NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_BUILD_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_VER.

◆ version [198/230]

NvU32 _NVAPI_RELOCATE_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_RELOCATE_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_PARAMS_VER.

◆ version [199/230]

NvU32 _NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_EMIT_RAYTRACING_DISPLACEMENT_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_VER.

◆ version [200/230]

NvU32 _NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_EMIT_RAYTRACING_OPACITY_MICROMAP_ARRAY_POSTBUILD_INFO_PARAMS_VER.

◆ version [201/230]

NvU32 _NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_V1::version

[in] Structure version; it should be set to NVAPI_BUILD_RAYTRACING_ACCELERATION_STRUCTURE_EX_PARAMS_VER.

◆ version [202/230]

NvU32 _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::version

(IN) Structure version

◆ version [203/230]

NvU32 _NVVIOCAPS::version

Structure version.

◆ version [204/230]

NvU32 _NVVIOSTATUS::version

Structure version.

◆ version [205/230]

NvU32 _NVVIOSYNCDELAY::version

Structure version.

◆ version [206/230]

NvU32 _NVVIOCOLORCONVERSION::version

Structure version.

◆ version [207/230]

NvU32 _NVVIOGAMMACORRECTION::version

Structure version.

◆ version [208/230]

NvU32 _NVVIOCONFIG_V1::version

Structure version.

◆ version [209/230]

NvU32 _NVVIOCONFIG_V2::version

Structure version.

◆ version [210/230]

NvU32 _NVVIOCONFIG_V3::version

Structure version.

◆ version [211/230]

NvU32 _NV_VIO_TOPOLOGY::version

◆ version [212/230]

NvU32 _NVVIOPCIINFO::version

Structure version.

◆ version [213/230]

NvU32 _NVAPI_STEREO_CAPS::version

◆ version [214/230]

NvU32 _NVDRS_SETTING_VALUES::version

Structure Version.

◆ version [215/230]

NvU32 _NVDRS_SETTING_V1::version

Structure Version.

◆ version [216/230]

NvU32 _NVDRS_APPLICATION_V1::version

Structure Version.

◆ version [217/230]

NvU32 _NVDRS_APPLICATION_V2::version

Structure Version.

◆ version [218/230]

NvU32 _NVDRS_APPLICATION_V3::version

Structure Version.

◆ version [219/230]

NvU32 _NVDRS_APPLICATION_V4::version

Structure Version.

◆ version [220/230]

NvU32 _NVDRS_PROFILE_V1::version

Structure Version.

◆ version [221/230]

NvU32 NV_CHIPSET_INFO_v4::version

structure version

◆ version [222/230]

NvU32 NV_CHIPSET_INFO_v3::version

structure version

◆ version [223/230]

NvU32 NV_CHIPSET_INFO_v2::version

structure version

◆ version [224/230]

NvU32 NV_CHIPSET_INFO_v1::version

◆ version [225/230]

NvU32 NV_LID_DOCK_PARAMS::version

◆ version [226/230]

NvU32 _NV_DISPLAY_DRIVER_INFO::version

Structure Version.

◆ version [227/230]

NvU32 _NV_DISPLAY_DRIVER_INFO_V2::version

Structure Version.

◆ version [228/230]

NvU32 _NV_PHYSICAL_GPUS::version

◆ version [229/230]

NvU32 _NV_LOGICAL_GPUS::version

◆ version [230/230]

NvU32 _NV_GPU_CLIENT_UTILIZATION_PERIODIC_CALLBACK_SETTINGS_V1::version

[in] Structure Version, must always be first.

◆ vertexBiasAndScaleBuffer

D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::vertexBiasAndScaleBuffer

Optional displacement base vertex bias and displacement vector scale buffer. If not supplied, bias defaults to 0 and scale to 1.

◆ vertexBiasAndScaleFormat

DXGI_FORMAT _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::vertexBiasAndScaleFormat

Format of displacementBiasAndScaleBuffer. Supported formats are DXGI_FORMAT_R16G16_FLOAT and DXGI_FORMAT_R32G32_FLOAT.

◆ vertexDisplacementVectorBuffer

D3D12_GPU_VIRTUAL_ADDRESS_AND_STRIDE _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::vertexDisplacementVectorBuffer

Per-vertex displacement vector buffer. This buffer is indexed using the index buffer from the base triangle geometry.

◆ vertexDisplacementVectorFormat

DXGI_FORMAT _NVAPI_D3D12_RAYTRACING_GEOMETRY_DMM_ATTACHMENT_DESC::vertexDisplacementVectorFormat

Format of displacementVectorBuffer. Supported formats are DXGI_FORMAT_R32G32B32_FLOAT, DXGI_FORMAT_R32G32B32A32_FLOAT, and DXGI_FORMAT_R16G16B16A16_FLOAT (The Alpha channel is ignored, and stride can be set accordingly).

◆ vertexFormat

NV_GPU_WARPING_VERTICE_FORMAT NV_SCANOUT_WARPING_DATA::vertexFormat

format of the input vertices

◆ verticalDelay

NvU32 _NVVIOSYNCDELAY::verticalDelay

Vertical delay in lines.

◆ verticalLines

NvU32 _NVVIOVIDEOMODE::verticalLines

Vertical resolution for frame (in lines)

◆ vertices

float* NV_SCANOUT_WARPING_DATA::vertices

width of the input texture

◆ VFrontPorch

NvU16 _NV_TIMING::VFrontPorch

vertical front porch

◆ vic

NvU32 NV_INFOFRAME_VIDEO::vic

◆ vid1Out

NVVIOINPUTOUTPUTSTATUS _NVVIOOUTPUTSTATUS::vid1Out

Video 1 output status.

◆ vid2Out

NVVIOINPUTOUTPUTSTATUS _NVVIOOUTPUTSTATUS::vid2Out

Video 2 output status.

◆ [] [1/2]

NV_INFOFRAME_VIDEO { ... } ::video

◆ video [2/2]

NV_INFOFRAME_VIDEO NV_INFOFRAME_DATA::video

◆ videoBridgePresent [1/2]

NvU32 _NV_MULTIGPU_CAPS_V1::videoBridgePresent

◆ videoBridgePresent [2/2]

NvU32 _NV_MULTIGPU_CAPS_V2::videoBridgePresent

◆ videoLatency

NvU8 _NV_MONITOR_CAPS_VSDB::videoLatency

Byte 6.

◆ videoMode

NVVIOVIDEOMODE _NVVIOSIGNALFORMATDETAIL::videoMode

Video mode for signal format.

◆ videoStandard

NVVIOVIDEOSTANDARD _NVVIOVIDEOMODE::videoStandard

SMPTE standards format.

◆ videoType

NVVIOVIDEOTYPE _NVVIOVIDEOMODE::videoType

HD or SD signal classification.

◆ vidIn

NVVIOCHANNELSTATUS _NVVIOINPUTSTATUS::vidIn[NVAPI_MAX_VIO_JACKS][NVAPI_MAX_VIO_CHANNELS_PER_JACK]

Video input status per channel within a jack.

◆ ViewDimension

NV_SRRV_DIMENSION _NV_D3D11_SHADING_RATE_RESOURCE_VIEW_DESC_V1::ViewDimension

(IN) This declares whether the Shading Rate Surface is a simple 2D Texture or Array of 2D Textures

◆ vioCaps

NvU32 _NVVIODATAFORMATDETAIL::vioCaps

Data format capabilities (NVVIOCAPS_* mask)

◆ vioClass

NvU32 vioClass

◆ [union] [1/3]

union { ... } _NVVIOCONFIG_V1::vioConfig

◆ [union] [2/3]

union { ... } _NVVIOCONFIG_V2::vioConfig

◆ [union] [3/3]

union { ... } _NVVIOCONFIG_V3::vioConfig

◆ vioDeviceCount

NvU32* vioDeviceCount

◆ vioGammaCorrectionType

NvU32 _NVVIOGAMMACORRECTION::vioGammaCorrectionType

Gamma correction type (8-bit or 10-bit)

◆ vioId

NvU32 NVVIOTOPOLOGYTARGET::vioId

device Id of SDI Input/Output device

◆ [union]

union { ... } _NVVIOSTATUS::vioStatus

◆ vioTarget

NVVIOTOPOLOGYTARGET _NV_VIO_TOPOLOGY::vioTarget[NVAPI_MAX_VIO_DEVICES]

Array of video I/O targets.

◆ vioTotalDeviceCount

NvU32 _NV_VIO_TOPOLOGY::vioTotalDeviceCount

How many video I/O targets are valid.

◆ virtualizationMode

NV_VIRTUALIZATION_MODE _NV_GPU_VIRTUALIZATION_INFO::virtualizationMode

one of NV_VIRTUALIZATION_MODE.

◆ vmode [1/2]

NVAPI_GSYNC_VIDEO_MODE _NV_GSYNC_CONTROL_PARAMS_V1::vmode

None, TTL, NTSCPALSECAM, HDTV.

◆ vmode [2/2]

NVAPI_GSYNC_VIDEO_MODE _NV_GSYNC_CONTROL_PARAMS_V2::vmode

None, TTL, NTSCPALSECAM, HDTV.

◆ volt_uV

NvU32 NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::volt_uV

Current base voltage settings in [uV].

◆ [struct] [1/4]

struct { ... } NV_GPU_PERF_PSTATES_INFO_V2::voltages[NVAPI_MAX_GPU_PERF_VOLTAGES]

◆ [struct] [2/4]

struct { ... } NV_GPU_PERF_PSTATES_INFO_V2::voltages[NVAPI_MAX_GPU_PERF_VOLTAGES]

◆ voltages [3/4]

NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1 _NV_GPU_PERF_PSTATES20_INFO_V2::voltages[NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES]

Array of voltage entries Valid index range is 0 to numVoltages-1

◆ [] [4/4]

NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1 { ... } ::voltages[NVAPI_MAX_GPU_PSTATE20_BASE_VOLTAGES]

Array of voltage entries Valid index range is 0 to numVoltages-1

◆ voltDelta_uV

NV_GPU_PERF_PSTATES20_PARAM_DELTA NV_GPU_PSTATE20_BASE_VOLTAGE_ENTRY_V1::voltDelta_uV

◆ vpOffsets

float _NV_SMP_ASSIST_SETUP_PARAMS_V1::vpOffsets[2]

(IN) Default set to 0. If non-zero, MRS/LMS viewports' TopLeftX and TopLeftY will be offset by vpOffsets[0] and vpOffsets[1] respectively.

◆ vsdb [1/2]

NV_MONITOR_CAPS_VSDB _NV_MONITOR_CAPABILITIES_V1::vsdb

◆ [] [2/2]

NV_MONITOR_CAPS_VSDB { ... } ::vsdb

◆ VSVDB_version [1/4]

NvU32 _NV_HDR_CAPABILITIES_V2::VSVDB_version

Version of Vendor Data block,Version 0: 25 bytes Version 1: 14 bytes.

◆ [] [2/4]

NvU32 { ... } ::VSVDB_version

Version of Vendor Data block,Version 0: 25 bytes Version 1: 14 bytes.

◆ VSVDB_version [3/4]

NvU32 _NV_HDR_CAPABILITIES_V3::VSVDB_version

Version of Vendor Data block,Version 0: 25 bytes Version 1: 14 bytes.

◆ [] [4/4]

NvU32 { ... } ::VSVDB_version

Version of Vendor Data block,Version 0: 25 bytes Version 1: 14 bytes.

◆ VSyncPol

NvU8 _NV_TIMING::VSyncPol

vertical sync polarity: 1-negative, 0-positive

◆ VSyncWidth

NvU16 _NV_TIMING::VSyncWidth

vertical sync width

◆ VTotal

NvU16 _NV_TIMING::VTotal

vertical total

◆ VVisible

NvU16 _NV_TIMING::VVisible

vertical visible

◆ w

float NV_VIEWPORTF::w

Width of the viewport.

◆ warningFlags [1/2]

NvU32 NV_MOSAIC_DISPLAY_TOPO_STATUS::warningFlags

(OUT) Any of the NV_MOSAIC_DISPLAYTOPO_WARNING_* flags.

◆ [] [2/2]

NvU32 { ... } ::warningFlags

(OUT) Any of the NV_MOSAIC_DISPLAYTOPO_WARNING_* flags.

◆ warpDown

float _NV_LMS_CUSTOM_CONFIG_V1::warpDown

(IN) LMS params to control warping of the 2 lower quadrants

◆ warpLeft

float _NV_LMS_CUSTOM_CONFIG_V1::warpLeft

(IN) LMS params to control warping of the 2 left quadrants

◆ warpRight

float _NV_LMS_CUSTOM_CONFIG_V1::warpRight

(IN) LMS params to control warping of the 2 right quadrants

◆ warpUp

float _NV_LMS_CUSTOM_CONFIG_V1::warpUp

(IN) LMS params to control warping of the 2 upper quadrants

◆ width [1/9]

NvU32 NV_DISPLAY_PATH::width

(IN) Width of the mode

◆ width [2/9]

NvU32 _NV_RESOLUTION::width

◆ width [3/9]

NvU32 NV_SCANOUT_INTENSITY_DATA_V1::width

width of the input texture

◆ width [4/9]

NvU32 NV_SCANOUT_INTENSITY_DATA_V2::width

width of the input texture

◆ width [5/9]

NvU32 _NV_TIMING_INPUT::width

Visible horizontal size.

◆ width [6/9]

NvU32 NV_CUSTOM_DISPLAY::width

Source surface(source mode) width.

◆ width [7/9]

NvU32 _NV_MOSAIC_DISPLAY_SETTING_V1::width

Per-display width.

◆ width [8/9]

NvU32 NV_MOSAIC_DISPLAY_SETTING_V2::width

Per-display width.

◆ width [9/9]

NvU32 _NVVIOOUTPUTREGION::width

Width of region in pixels.

◆ WindowToClipSplitsX

float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipSplitsX[2]

◆ WindowToClipSplitsY

float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipSplitsY[2]

◆ WindowToClipX

float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipX[3][2]

◆ WindowToClipY

float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipY[3][2]

◆ WindowToClipZ

float _NV_SMP_ASSIST_REMAPCBDATA_V1::WindowToClipZ[2]

◆ workstationFeatureType

NV_D3D12_WORKSTATION_FEATURE_TYPE _NV_D3D12_WORKSTATION_FEATURE_PROPERTIES::workstationFeatureType

(IN) the type of workstation feature to be queried

◆ [] [1/2]

NvAPI_UnicodeString { ... } ::wszCurrentValue

Accessing current unicode string value of this setting.

◆ wszCurrentValue [2/2]

NvAPI_UnicodeString _NVDRS_SETTING_V1::wszCurrentValue

Accessing current unicode string value of this setting.

◆ wszDefaultValue [1/2]

NvAPI_UnicodeString _NVDRS_SETTING_VALUES::wszDefaultValue

Accessing default unicode string value of this setting.

◆ [] [2/2]

NvAPI_UnicodeString { ... } ::wszDefaultValue

Accessing default unicode string value of this setting.

◆ wszPredefinedValue [1/2]

NvAPI_UnicodeString _NVDRS_SETTING_V1::wszPredefinedValue

Accessing default unicode string value of this setting.

◆ [] [2/2]

NvAPI_UnicodeString { ... } ::wszPredefinedValue

Accessing default unicode string value of this setting.

◆ wszValue [1/2]

NvAPI_UnicodeString _NVDRS_SETTING_VALUES::wszValue

Accessing current unicode string value of this setting.

◆ [] [2/2]

NvAPI_UnicodeString { ... } ::wszValue

Accessing current unicode string value of this setting.

◆ x [1/4]

float NV_VIEWPORTF::x

x-coordinate of the viewport top-left point

◆ x [2/4]

NvS32 _NV_POSITION::x

◆ X

NvU8 _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X1::X[2]

◆ x [3/4]

NvU32 _NVAPI_DIM3::x

◆ x [4/4]

NvU32 _NVVIOOUTPUTREGION::x

Horizontal origin in pixels.

◆ X1 [1/6]

struct _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X1 _NV_PIXEL_SRSO_1x2::X1

◆ X1 [2/6]

struct _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X1 _NV_PIXEL_SRSO_2x1::X1

◆ X1 [3/6]

struct _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X1 _NV_PIXEL_SRSO_2x2::X1

◆ X1 [4/6]

struct _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X1 _NV_PIXEL_SRSO_2x4::X1

◆ X1 [5/6]

struct _NV_PIXEL_SRSO_4x2::NV_PIXEL_SRSO_4x2_X1 _NV_PIXEL_SRSO_4x2::X1

◆ X1 [6/6]

struct _NV_PIXEL_SRSO_4x4::NV_PIXEL_SRSO_4x4_X1 _NV_PIXEL_SRSO_4x4::X1

◆ X2 [1/4]

struct _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X2 _NV_PIXEL_SRSO_1x2::X2

◆ X2 [2/4]

struct _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X2 _NV_PIXEL_SRSO_2x1::X2

◆ X2 [3/4]

struct _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X2 _NV_PIXEL_SRSO_2x2::X2

◆ X2 [4/4]

struct _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X2 _NV_PIXEL_SRSO_2x4::X2

◆ X4 [1/3]

struct _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X4 _NV_PIXEL_SRSO_1x2::X4

◆ X4 [2/3]

struct _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X4 _NV_PIXEL_SRSO_2x1::X4

◆ X4 [3/3]

struct _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X4 _NV_PIXEL_SRSO_2x2::X4

◆ X8

struct _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X8 _NV_PIXEL_SRSO_1x2::X8

◆ xRatio

float NV_CUSTOM_DISPLAY::xRatio

Horizontal scaling ratio.

◆ XS [1/2]

NvU8 _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X2::XS[2][2]

◆ XS [2/2]

NvU8 _NV_PIXEL_SRSO_2x1::NV_PIXEL_SRSO_2x1_X4::XS[2][4]

◆ y [1/4]

float NV_VIEWPORTF::y

y-coordinate of the viewport top-left point

◆ y [2/4]

NvS32 _NV_POSITION::y

◆ Y

NvU8 _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X1::Y[2]

◆ y [3/4]

NvU32 _NVAPI_DIM3::y

◆ y [4/4]

NvU32 _NVVIOOUTPUTREGION::y

Vertical origin in pixels.

◆ yccQuantizationRange

NvU32 NV_INFOFRAME_VIDEO::yccQuantizationRange

◆ year

NvU32 _NV_LICENSE_EXPIRY_DETAILS::year

Year value of license expiry.

◆ yRatio

float NV_CUSTOM_DISPLAY::yRatio

Vertical scaling ratio.

◆ YS [1/3]

NvU8 _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X2::YS[2][2]

◆ YS [2/3]

NvU8 _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X4::YS[2][4]

◆ YS [3/3]

NvU8 _NV_PIXEL_SRSO_1x2::NV_PIXEL_SRSO_1x2_X8::YS[2][8]

◆ YX [1/4]

NvU8 _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X1::YX[2][2]

◆ YX [2/4]

NvU8 _NV_PIXEL_SRSO_4x2::NV_PIXEL_SRSO_4x2_X1::YX[2][4]

◆ YX [3/4]

NvU8 _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X1::YX[4][2]

◆ YX [4/4]

NvU8 _NV_PIXEL_SRSO_4x4::NV_PIXEL_SRSO_4x4_X1::YX[4][4]

◆ YXS [1/3]

NvU8 _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X2::YXS[2][2][2]

◆ YXS [2/3]

NvU8 _NV_PIXEL_SRSO_2x2::NV_PIXEL_SRSO_2x2_X4::YXS[2][2][4]

◆ YXS [3/3]

NvU8 _NV_PIXEL_SRSO_2x4::NV_PIXEL_SRSO_2x4_X2::YXS[4][2][2]

◆ z

NvU32 _NVAPI_DIM3::z

◆ zoneLocation

NV_GPU_CLIENT_ILLUM_ZONE_LOCATION _NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1::zoneLocation

Location of the zone on the board.

◆ zones [1/2]

NV_GPU_CLIENT_ILLUM_ZONE_INFO_V1 _NV_GPU_CLIENT_ILLUM_ZONE_INFO_PARAMS_V1::zones[NV_GPU_CLIENT_ILLUM_ZONE_NUM_ZONES_MAX]

◆ zones [2/2]

NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_V1 _NV_GPU_CLIENT_ILLUM_ZONE_CONTROL_PARAMS_V1::zones[NV_GPU_CLIENT_ILLUM_ZONE_NUM_ZONES_MAX]