Jetson Orin Series

NVIDIA® Jetson™ Linux supports these software features, which provide users a complete package to bring up Linux on targeted NVIDIA® Jetson Orin series devices - Jetson AGX Orin™ and Jetson Orin™ NX.

Bootloader

Bootloader Binary Feature Notes
BPMP processor boot binaries Storage location Cold boot: QSPI
RCM boot: Downloaded over USB recovery port
Next stage storage location Cold boot: QSPI
RCM boot: Downloaded over USB recovery port
Next stage UEFI
Storage device support QSPI
Partition table support GPT (with protective MBR)
File system support None
I/O bus support I2C
Console UART

Toolchain

Feature

Tool chains

Notes

Aarch64

gcc-9.3-glibc-2.31

For 64-bit kernel and user space

Kernel

Interface Feature
Linux kernel Version 5.10.87

Camera Interface

Feature Notes
TBD TBD

LSIO

Module Feature Notes
UART PIO mode FIFO access using CPU
DMA mode FIFO access using DMA
Hardware/software based flow control Flow control line toggling from hardware/software
Buffer throttling Flow control based on data in receive buffer
Rx and Tx DMA mode selection DMA mode transfer on Rx and Tx or on only one path
Interrupt mode Data transfer complete handling through interrupt
Polling mode Data transfer complete handling through polling
MCR control Modem control access
Baud rate/port configuration Changing port configuration
Baud rate adjustment Adjusting baud rate to fall within tolerance range
I2C Master Speed mode (Standard, FM, FM+) Speed mode (Standard, FM, FM+)
Repeat start Repeat start on transfer of data
No Start No address cycle after repeat start
Packet mode Packet mode
Normal/Byte mode Normal/Byte mode
7-bit/10-bit addressing mode 7-bit/10-bit addressing mode
DMA mode APB/GPC DMA for FIFO access
Clock gating and clock always ON Clock control after each transfer for power saving
Runtime PM Runtime power management
Dynamic clock speed change Change speed of the bus
Interrupt based Transfer complete handling using interrupt
Polling Transfer complete handling using polling
Bit banging for data transfer Use GPIO APIs for data transfer
Multiple transfer request Multiple transfer request
Bus clear support Bus clear handling when bus is held by device
>4k on software based split >4K on software based split
>64k on software based split >64K on software based split
SPI Master Packed/unpacked Data can be put on FIFO in packed or unpacked format. Packed format reduces the number of I/O accesses on FIFO.
Full Duplex Mode Device can read and write data simultaneously
Least Significant Bit Option to send least significant bit first from packets
Dual SPI SPI MISO/MOSI can act as Rx and Tx
Least Significant Byte First Option to send least significant byte first from packets
Hardware based CS control and CS setup/hold time Hardware control the CS and maintain CS setup and hold time
Software or hardware Chip Select Polarity Section Chip select can be active high or active low based on the external device property
Supported Modes 0/1/2/3 SPI communication support Mode 0, 1, 2, or 3
DMA mode Data written/read to/from FIFO using DMA mode
PIO (non-DMA) mode

CPU has direct access to FIFO for read/write

GPIO based Chip select CS line is controlled by the GPIO APIs
SPI different clock rates Set the interface clock speed based on what device can support
Prod configuration Platform/chip specific configuration of controller/interface
Clock delay between packets Provision for delay between packets
Clock gating and clock always ON Dynamic clock enable/disable for power save
Runtime PM Runtime power management
Interrupt based Transfer done handling through interrupt
Polling Transfer done through polling
Different packet bit length Different packet bit length
Multiple transfer request Multiple SPI transfer request from single call
GPIO GPIO request/free GPIO access permission
Pinmux integration with GPIOS GPIO APIs call pinmux for required pin configuration
Direction set/get GPIO direction configuration
Value set/get GPIO value set/get to/from pin
Interrupt support from all pins Interrupt support from all pins
Wakeup support for SC7 Wakeup support for SC7
GPIO register dump GPIO register dump
GPIO framework sysfs support GPIO framework sysfs support
Suspend/resume Suspend/resume
Pinmux Function configuration Pinmux function configuration
Pinmux config configuration Pinmux different properties like pull up/down, input, tristate etc. configuration
Suspend/resume Save and restore of pinmux context
Drive strength Drive strength configuration of pins
Prod setting Prod setting
Static pinmux configuration Static pinmux configuration
Dynamic pinmux configuration Dynamic pinmux configuration
Pinmux register dump Pinmux register dump
Pinmux configuration dumping Pinmux configuration dumping
Pinmux-GPIO integration Pinmux-GPIO integration
APBDMA/GPCDMA Memory to memory Memory to memory transfer
Memory to I/O Memory to I/O
I/O to memory IO to memory
Cyclic-once mode Cyclic mode
Transfer done through interrupt mode Transfer done on interrupt
Multiple transfer request Queue mechanism of the transfer request
WATCHDOG Watchdog framework support Registration with WDT framework
System reset on CPU hang System reset on WDT expiry
Suspend/resume support Suspend/resume handling
Watchdog interrupt support WDT reset on ISR
Watchdog polling/ping support WDT start/stop/pin from user space
PWM PWM ops PWM registration to framework
Prod setting Tegra specific controller configruation
Clock accuracy calculation Clock calculation
PMC Controlling I/O PAD voltage (PWR_DETECT) Pad voltage configuration by software
I/O DPD configuration Deep power down configuration
IO_NOPOWER through regulator IO_NOPOWER configuration
Read/write PMC registers PMC register access interface
PMC config for bootrom I2C PMC configuration for bootrom I2C/MMIO command
PMC Led blink PMC provides the control for blinking LED, including in Deep Sleep mode. The blinking control is a PWM signal
PMC Soft Led breathing PMC soft led breathing to control led ramp up/down time and ON time.
TACHOMETER Read RPM Read RPM
BPMP I2C Master Speed mode (Standard, FM, FM+) Bus speed configuration
Packet mode I2C controller configuration in packet mode
Normal/Byte mode I2C controller configuration on normal mode
7-bit/10-bit addressing mode 7 and 10 bit addressing
DMA mode I2C fifo access through APB DMA
Bus clear support Bus clear handling when bus is held by device
SPE-UART PIO mode FIFO access using CPU
DMA mode FIfo access using DMA
Hardware flow control Flow control line toggling from hardware/software
FIFO mode FIFO mode of UART controller
SPE DMA Memory to memory Memory to memory transfer
Memory to I/O Memory to I/O
I/O to Memory I/O to memory
Continuous mode support Cyclic mode
I2C SLAVE Normal/Byte mode I2C controller configuration on byte mode
FIFO mode I2C controller configuration on FIFO mode
7-bit addressing 7-bit addressing
10-bit addressing 10-bit addressing
Repeat start Repeat start on transfer of data
Clock stretching Clock line stretching
CAN 2.0 A CAN FD CAN FD increases the maximum data throughput to ~3.7 Mbps. 10 Mbps over 10 meters. Maximum signal frequency: 15 Mbps.
Tx Std. CAN Message Basic or Standard CAN with 11-bit message identifiers which was originally specified to operate at a maximum frequency of 250 Kbps.
Maximum signal frequency: 1 Mbps.
Tx Std. CAN Message with bitrate 125K/250K/500K/1M bps.
Rx Std. CAN Message Rx Std. CAN Message with bitrate 125K/250K/500K/1M bps.
Tx+Rx Std. CAN Message Tx+Rx Std. CAN Message with bitrate 125K/250K/500K/1M bps.
Tx Extd. CAN Message Extended frame CAN with 29 bit message identifier which can be used at up to 1Mbit/sec.
Max Signal frequency: 1 Mbit/sec.
Tx Extd. CAN Message with bitrate 125K/250K/500K/1M bps
Rx Extd. CAN Message Rx Extd. CAN Message with bitrate 125K/250K/500K/1M bps
Tx+Rx Extd. CAN Message Tx+Rx Extd. CAN Message with bitrate 125K/250K/500K/1M bpss
CAN loopback Internal controller loopback
Std FD (BRS/Non-BRS) Standard FD frame with Bit rate switching/Non Bit rate switching
Extd FD (BRS/Non-BRS) Extended FD frame with Bit rate switching/Non Bit rate switching
Timestamping Timestamp generation of Tx/Rx frames
Listen-only mode Listen-only mode to monitor CAN bus
Restart bus-off Restart bus after CAN bus-off state
QSPI Interface width Single, Dual & Quad x1, x2 & x4 modes support
SDR and DDR modes Data rates on single or both clock edges
Bit length supported 8,16,32 Different Packet bit length
Transfer Modes 0 and 3 Transfer Mode 0,3 for SDR and mode 0 for ddr
DMA/PIO mode selection Option to select data written/read to/from fifo using DMA or CPU
Packed/unpacked Data can be put on packed/non-packed format on fifo. Packed format reduce the data number of IO access on fifo
Endianness LSByte & LSBit Option to send Least significant bit/byte first from packet
HW based CS control and CS setup/hold time HW control the CS and maintain CS setup and hold time
S/W or H/W Chip Select Polarity Section Chip select can be active high or active low based on the external device property
Combined sequence mode CDM, ADDR & DATA transferred in single GO resulting in single interrupt
Different clock rates Set the interface clock speed based on what device can support
Golden Register settings Platform/Chip specific configuration of controller/interface
Clock active delay between packets Provision to have delay between packets
Runtime PM Runtime power management

HSIO

Module Feature Notes
EthernetControllerFeaturesEqos Speed mode change through ethtool
10/100 Mbps support
1000 Mbps support
10000 Mbps support
Half-duplex support
ARP offload
IEEE 1588-2008 (PTP)
Energy-Efficient Ethernet
Transmit checksum offload
Receive checksum offload
TCP segmentation offload
Jumbo frame support (up to 9 KB (9018 bytes untagged, or 9022 bytes tagged)
Flow control/PAUSE frame support
EAVB support
Up to 4 TX/RX queue/channels with 4 KB size
VLAN (insertion/stripping of VLAN tag in hardware. VLAN tag-based filtering supported for only one VLAN tag)
Ethernet Ping
Remote wakeup
NFS boot
Suspend/resume support over NFS
PCIe Controllers with x8 link width Max x8 link width (Few Controllers)
Controllers with x4 link width Max x4 link width (Few Controllers)
Controllers with x2 link width Max x4 link width (Few Controllers)
Controllers with x1 link width Max x1 link width (Few Controllers)
Legacy interrupts Applicable to all controllers
MSI & MSI-X interrupts Applicable to all controllers
128 byte maximum payload size Applicable to all controllers
256 byte maximum payload size Applicable to all controllers
Gen-1 speed Applicable to all controllers
Gen-2 speed Applicable to all controllers
Gen-3 speed Applicable to all controllers
Gen-4 speed Applicable to all controllers
ASPM - L0s Applicable to all controllers (enabled by default only on C1 controller)
ASPM - L1
ASPM - L1.1
ASPM - L1.2
Wake support Applicable to all controllers
Advanced Error Reporting (AER) Applicable to all controllers
DMA support in Root Port Applicable to all controllers
End Point mode support C6,C7,C10 Controllers
SDMMC DR50 eMMC interface running in DDR mode at 50 MHz
HS200 eMMC interface running in SDR mode at 200 MHz
HS400 eMMC interface running in DDR mode at 200 MHz
HS533 eMMC interface running in DDR mode at 267 MHz
HW tuning Supports tuning in SDMMC controller
Packed Commands Read & write commands can be packed in groups (either all read or all write) that transfer data for all commands in the group in one transfer on the bus, to reduce overhead
Cache Similar to CPU cache, but implemented in eMMC; helps improve performance
Discard Erases data if necessary during background erase events
Sanitize Physically removes data from unmapped user address space
RPMB Secure access
BKOPS Allows execution of back ground operations when host is not being serviced
HPI High priority interrupt to stop ongoing bkops/reliable writes
Power Off Notification Allows device to prepare itself to power off properly and improve user experience during power-on
Sleep Minimizes power consumption of the eMMC device
RTPM Software feature to save power by switching off clocks when there is no transactions on the bus
Field Firmware Upgrade Update eMMC firmware
Device Life Estimation Type A
Device Life Estimation Type B
Device Health is a mechanism to get vital NAND flash program/erase cycles information as a percentage of useful flash lifespan.
Type A: SLC device health information
Type B: MLC device health information
PRE EOL Information Provides indication about device lifetime reflected by average reserved blocks
Hardware Command Queue Performed by SD/MMC controller
Enhanced Strobe Mode (ESM) in HS400 mode Optional for devices; indicated by STROBE_SUPPORT[184] register of EXT_CSD
eMMC CQ CQIC feature Generates coalesced interrupts when the interrupt coalescing mechanism is enabled
Suspend/resume and shutdown
UFS PWM-G1
PWM-G2
PWM-G3
PWM-G4
PWM-G5
PWM-G6
UFS (m-phy) interface runs in low performance (PWM-Gx) modes
HS-G1
HS-G2
HS-G3
HS-G4
UFS (m-phy) interface runs in high performance (HS-Gx) modes
Native Command Queue support
Hibernation Low power state
Runtime time power management Driver issues software hibernation entry in runtime suspend, and hibernation exit in runtime resume
Auto hibernation Hibernation triggered by controller
PWM SLOW modes
PWM SLOW_AUTO modes
HS FAST modes
HS FAST_AUTO modes
HS RATE_A series
HS RATE_B series
USB 3.0 Super Speed Plus Host USB host in 3.1 Gen2 mode (10 Gbps)
Super Speed Host USB host in 3.0 mode (5 Gbps)
High Speed Host USB host in 2.0 mode (480 Mbps)
Full Speed Host USB host in 2.0 or 1.2 mode (12 Mbps)
Low Speed Host USB host in 2.0 or 1.2 mode (1.5 Mbps)
Auto Suspend USB host suspends the port/connected device if there is no activity
Remote Wakeup USB host resumes the port/connected device if there is wakeup triggered by the device.
Auto Resume USB host resumes the port/connected device if there is wakeup triggered by the host.
ELPG for xUSB HS partition Engine level power gating support for xUSB HS partition
ELPG for xUSB SS partition Engine level power gating support for xUSB SS partition
Lower power state (U3 state)
LPM states (U1, U2 states)
Hot Plug Support USB drives may be removed and connected while system is active.
Port multiplier support Hub for USB
Host Mass storage Protocol for storage devices
Host USB video class Protocol for camera devices
Host USB ECM Protocol for ethernet over USB
Host USB audio class Protocol for audio over USB
Host USB Modem—NCM NCM protocol support for modem functionality
USB HID protocol Human interface devices
Super Speed Device (xUSB) USB device in 3.0 mode
High Speed Device (xUSB) USB device in 2.0 mode
BC1.2 Charging support Support for battery charging per BC1.2 spec
Apple charger Support for detecting Apple charger
MTP device mode MTP protocol support for data transfer
ADB device mode ADB protocol support for data transfer
RNDIS device mode RNDIS protocol support for data transfer
OTG USB host and device (cable based detection)

HDMI

Feature Details
EDID support Read and parse EDID.
Hot-plug detection Hot-plug detection with HDMI® monitors and TVs.
HDMI 1.4 (480p/720p/1080p, 4K @30 Hz) Support for HDMI1.4 with 480p/720p/1080p/ 4k @30 Hz nodes.
HDMI 2.0(4K @30 HZ, 4K @ 60HZ) Support for HDMI 2.0 with 4K @30 Hz and 4K @60 Hz resolution.
Driver suspend/resume Driver suspend/resume for low power.
HDMI as primary display Support HDMI as the primary display.
Sideband information Sends the sideband information, such as infoframes and audio data, to the panel during video refresh.

DisplayPort

Feature Details
EDID Read and parse EDID.
DP Hot Plug support Hot-Plug detection with DP monitors or TV.
DP 4K @60 Hz 4K mode in DP.
DP 4K @120 Hz or 8K @30 Hz HBR3 with 4K @120Hz or 8K @30Hz mode.
Enhanced framing Error recovery methods.
Full Link Training Handshake signaling between host and device.
HPD_IRQ event Feedback from the panels in case of link synchronization loss.
Driver Suspend/Resume Driver suspend/resume for low power.
Primary display Support DP as primary display.
DP MST Support two different multiple Streams on different Monitors.
Link rates 1.62, 2.7, and 5.4 Gbps Link rates supported by the driver up to HBR2.
Link rate 8.1 Gbps HBR3 support at at link rate 8.1 Gbps.
Aux link Support DP aux link.
Sideband information Sends the sideband information, such as infoframes and audio data, to the panel during video refresh.

Security Engine

Feature Notes
TBD TBD

Power Modes (Profiles)

Feature
10W / 15W / 30W profiles provided
NVPModel interface for mode selection and custom mode creation

RTC

Feature
Alarm
Wakeup from SC7

System

Feature
Reboot support
Shutdown support
SC7
Cpuidle
Wake from Idle
Wake from Sleep
CPU hotplug
DVFS
CPU/GPU frequency governor
EMC Bandwidth Manager
Power Monitor
Clock & thermal management
initrd support
System boot with ATF as secure monitor
Experimental Generic Timestamping Engine (GTE) support for LIC IRQ lines and AON GPIOs

Porting to custom platforms

To adapt the software to custom platforms, follow Orin AGX Platform Adaptation and Bring-Up Guide for NVIDIA® Jetson AGX Orin™ and Orin NX Platform Adaptation and Bring-Up Guide for NVIDIA® Jetson Orin™ NX.

Not Supported Features

  1. SDIO feature is not supported in software. For WiFi/Bluetooth use cases, recommendation is to use PCIe.

  2. EMMC boot device is not supported for Orin NX series.