NVIDIA MLNX_EN Documentation Rev 4.9-5.1.0.0 LTS

Interrupt Request (IRQ) Naming

Once IRQs are allocated by the driver, they are named mlx5_comp<x>@pci:<pci_addr>. The IRQs corresponding to the channels in use are renamed to <interface>-<x>, while the rest maintain their default name.
The mlx5_core driver allocates all IRQs during loading time to support the maximum possible number of channels. Once the driver is up, no further IRQs are freed or allocated. Changing the number of working channels does not re-allocate or free the IRQs.

The following example demonstrates how reducing the number of channels affects the IRQs names.

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$ ethtool -l ens1 Channel parameters for ens1: Pre-set maximums: RX: 0 TX: 0 Other: 0 Combined: 12   Current hardware settings: RX: 0 TX: 0 Other: 0 Combined: 12   $ cat /proc/interrupts   98: 0 0 0 0 0 0 7935 0 0 0 0 0 IR-PCI-MSI-edge mlx5_async@pci:0000:81:00.0 99: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-0 100: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-1 101: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-2  102: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-3 103: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-4 104: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-5 105: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-6 106: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-7 107: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-8 108: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-9 109: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-10 110: 0 0 0 0 0 0 1 0 0 0 0 0 IR-PCI-MSI-edge ens1-11       $ ethtool -L ens1 combined 4  $ ethtool -l ens1 Channel parameters for ens1: … Current hardware settings: RX: 0 TX: 0 Other: 0 Combined: 4   $ cat /proc/interrupts 98: 0 0 0 0 0 0 8455 0 0 0 0 0 IR-PCI-MSI-edge mlx5_async@pci:0000:81:00.0 99: 0 0 0 0 0 0 1 2 0 0 0 0 IR-PCI-MSI-edge ens1-0 100: 0 0 0 0 0 0 1 0 2 0 0 0 IR-PCI-MSI-edge ens1-1 101: 0 0 0 0 0 0 1 0 0 2 0 0 IR-PCI-MSI-edge ens1-2 102: 0 0 0 0 0 0 1 0 0 0 2 0 IR-PCI-MSI-edge ens1-3 103: 0 0 0 0 0 0 1 0 0 0 0 1 IR-PCI-MSI-edge mlx5_comp4@pci:0000:81:00.0 104: 0 0 0 0 0 0 2 0 0 0 0 0 IR-PCI-MSI-edge mlx5_comp5@pci:0000:81:00.0 105: 0 0 0 0 0 0 1 1 0 0 0 0 IR-PCI-MSI-edge mlx5_comp6@pci:0000:81:00.0 106: 0 0 0 0 0 0 1 0 1 0 0 0 IR-PCI-MSI-edge mlx5_comp7@pci:0000:81:00.0 107: 0 0 0 0 0 0 1 0 0 1 0 0 IR-PCI-MSI-edge mlx5_comp8@pci:0000:81:00.0 108: 0 0 0 0 0 0 1 0 0 0 1 0 IR-PCI-MSI-edge mlx5_comp9@pci:0000:81:00.0 109: 0 0 0 0 0 0 1 0 0 0 0 1 IR-PCI-MSI-edge mlx5_comp10@pci:0000:81:00.0 110: 0 0 0 0 0 0 2 0 0 0 0 0 IR-PCI-MSI-edge mlx5_comp11@pci:0000:81:00.0

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