IPoolingLayer.h

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/*
* SPDX-FileCopyrightText: Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
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#ifndef NVNERAL_IPOOLINGLAYER_H
#define NVNERAL_IPOOLINGLAYER_H
 
#include <nvneural/CoreTypes.h>
 
namespace nvneural {
    enum class PoolType : std::uint32_t
    {
        Invalid = 0, 
        Max = 1,     
        Avg = 2,     
    };
 
    class IPoolingLayer : public IRefObject
    {
    public:
        static const IRefObject::TypeId typeID = 0x2e8a0e0dbd99fe82ul;
 
        virtual NeuralResult setPoolingType(PoolType poolType) noexcept = 0;
 
        virtual PoolType poolingType() const noexcept = 0;
 
        virtual NeuralResult setStartPadding(std::size_t startW, std::size_t startH) noexcept = 0;
 
        virtual NeuralResult setEndPadding(std::size_t endW, std::size_t endH) noexcept = 0;
 
        virtual NeuralResult getPadding(std::size_t* pStartW, std::size_t* pStartH, std::size_t* pEndW, std::size_t* pEndH) const noexcept = 0;
 
        virtual NeuralResult setStride(std::size_t strideW, std::size_t strideH) noexcept = 0;
 
        virtual NeuralResult getStride(std::size_t* pStrideW, std::size_t* pStrideH) const noexcept = 0;
 
        virtual NeuralResult setKernelSize(std::size_t kernelW, std::size_t kernelH) noexcept = 0;
 
        virtual NeuralResult getKernelSize(std::size_t* pKernelW, std::size_t* pKernelH) const noexcept = 0;
    };
} // namespace nvneural
 
#endif // NVNEURAL_IPOOLINGLAYER_H