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FPGA IP

Port Description

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The port descriptions for the Holoscan Sensor Bridge IP are described in the following sections. For more information on macros defined in “HOLOLINK_def.svh”, refer to Macro Definitions

Global Reset

Table 1 Global Reset Port

Signal NameDirectionDescription
i_sys_rstInputGlobal, Asynchronous, Active High Reset

User Register Ports

Table 2 User Register Clock and Reset Ports

Signal NameDirectionDescription
i_apb_clkInputAPB Clock. Must be greater than 20MHz.
o_apb_rstOutputAPB Synchronous, Active High Reset

Table 3 User Register APB Ports

Signal NameDirectionDescription
i_apb_pready [N-1:0]1InputAPB Ready
[31:0] i_apb_prdata[N-1:0]1InputAPB Read Data
i_apb_pserr[N-1:0]1InputAPB Completer Error
o_apb_psel[N-1:0]1OutputAPB Select
o_apb_penableOutputAPB Enable
o_apb_paddr[31:0]OutputAPB Address
o_apb_pwdata[31:0]OutputAPB Write Data
o_apb_pwriteOutputAPB Write
  1. N=REG_INST

Table 4 External Enumeration Ports

These ports are only available if ENUM_EEPROM is NOT defined in “HOLOLINK_def.svh”

Signal NameDirectionDescription
[47:0] i_mac_addr[N-1:0]1InputMAC Address for each Ethernet interface.
i_board_sn[55:0]InputBoard Serial Number.
i_enum_vldInputEnumeration Valid. Once “i_mac_addr” and “i_board_sn” is set, set and keep it to 1.
  1. N=HOST_IF_INST

Table 5 User Register System Initialization Ports

Signal NameDirectionDescription
o_init_doneOutputSystem Initialization done. Refer to System Initialization section.

Sensor Interface Ports

Table 6 Sensor RX Interface Ports

These ports are only available if SENSOR_RX_IF_INST is defined in “HOLOLINK_def.svh”

Signal NameDirectionDescription
i_sif_rx_clk[N-1:0]1InputSensor RX Interface Clock.
o_sif_rx_rst[N-1:0]1OutputSensor RX Interface Synchronous, Active-High Reset
i_sif_axis_tvalid[N-1:0]1InputSensor RX AXI-Stream Valid
i_sif_axis_tlast[N-1:0]1InputSensor RX AXI-Stream Last.
[W-1:0] i_sif_axis_tdata[N-1:0]1InputSensor RX AXI-Stream Data.
[X-1:0] i_sif_axis_tkeep[N-1:0]1InputSensor RX AXI-Stream Keep. Currently not supported. See Sensor RX section for more info.
[Y-1:0] i_sif_axis_tuser[N-1:0]1InputSensor RX AXI-Stream User.
o_sif_axis_tready[N-1:0]1OutputSensor RX AXI-Stream Ready
  1. N=SENSOR_RX_IF_INST, W=DATAPATH_WIDTH, X=DATAKEEP_WIDTH, Y=DATAUSER_WIDTH

Table 7 Sensor TX Interface

These ports are only available if SENSOR_TX_IF_INST is defined in “HOLOLINK_def.svh”

Signal NameDirectionDescription
i_sif_tx_clk[N-1:0]1InputSensor TX Interface Clock.
o_sif_tx_rst[N-1:0]1OutputSensor TX Interface Synchronous, Active-High Reset
o_sif_axis_tvalid[N-1:0]1OutputTBD
o_sif_axis_tlast[N-1:0]1OutputTBD
[W-1:0] o_sif_axis_tdata[N-1:0]1OutputTBD
[X-1:0] o_sif_axis_tkeep[N-1:0]1OutputTBD
[Y-1:0] o_sif_axis_tuser[N-1:0]1OutputTBD
i_sif_axis_tready[N-1:0]1InputTBD
  1. N=SENSOR_TX_IF_INST, W=DATAPATH_WIDTH, X=DATAKEEP_WIDTH, Y=DATAUSER_WIDTH

Table 8 Sensor Event Ports

Signal NameDirectionDescription
i_sif_event [15:0]InputSensor Interface Event. Asynchronous. Refer to Sensor RX section for more details.

Host Interface Ports

Table 9 Host Interface Clock and Reset Ports

Signal NameDirectionDescription
i_hif_clkInput156.25MHz Host Interface Clock. See clocking section for details.
o_hif_rstOutputHost Interface Synchronous, Active-High Reset.

Table 10 Host RX Interface Ports

Connect the Host RX AXI-Streaming ports directly to Ethernet MAC RX AXI-Streaming ports.

Signal NameDirectionDescription
i_hif_axis_tvalid[N-1:0]1InputAXI-Stream Valid
i_hif_axis_tlast[N-1:0]1InputAXI-Stream Last
[W-1:0]i_hif_axis_tdata[N-1:0]1InputAXI-Stream Data
[X-1:0]i_hif_axis_tkeep[N-1:0]1InputAXI-Stream Keep
[Y-1:0]i_hif_axis_tuser[N-1:0]1InputAXI-Stream User
o_hif_axis_tready[N-1:0]1OutputAXI-Stream Ready
  1. N=HOST_IF_INST, W=DATAPATH_WIDTH, X=DATAKEEP_WIDTH, Y=DATAUSER_WIDTH

Table 11 Host TX Interface Ports

Connect the Host TX AXI-Streaming ports directly to Ethernet MAC TX AXI-Streaming ports.

Signal NameDirectionDescription
o_hif_axis_tvalid[N-1:0]1OutputAXI-Stream Valid
o_hif_axis_tlast[N-1:0]1OutputAXI-Stream Last
[W-1:0]o_hif_axis_tdata[N-1:0]1OutputAXI-Stream Data
[X-1:0]o_hif_axis_tkeep[N-1:0]1OutputAXI-Stream Keep
[Y-1:0]o_hif_axis_tuser[N-1:0]1OutputAXI-Stream User
i_hif_axis_tready[N-1:0]1InputAXI-Stream Read
  1. N=HOST_IF_INST, W=DATAPATH_WIDTH, X=DATAKEEP_WIDTH, Y=DATAUSER_WIDTH

Peripheral Interface Ports

Table 12 SPI Ports

These ports are only available if SPI_INST is defined in “HOLOLINK_def.svh”

Signal NameDirectionDescription
o_spi_csn[N-1:0]1OutputChip Select (Active Low)
o_spi_sck[N-1:0]1OutputSPI Clock
o_spi_oen[N-1:0]1OutputOutput Enable
[3:0]o_spi_sdio[N-1:0]1OutputSDIO Output
[3:0]i_spi_sdio[N-1:0]1InputSDIO Input
  1. N=SPI_INST

Table 13 I2C Ports

These ports are only available if I2C_INST is defined in “HOLOLINK_def.svh”

Signal NameDirectionDescription
i_i2c_scl[N-1:0]1InputI2C Clock
i_i2c_sda[N-1:0]1InputI2C Data
o_i2c_scl_en[N-1:0]1OutputI2C Clock Output Enable
o_i2c_sda_en[N-1:0]1OutputI2C Data Output Enable
  1. N=I2C_INST

Table 14 UART ports

These ports are only available if UART_INST is defined in “HOLOLINK_def.svh”

Signal NameDirectionDescription
i_uart_rxInputUART Receive
i_uart_ctsInputUART Clear To Send
o_uart_txOutputUART Transmit
o_uart_rtsOutputUART Request to Send
o_uart_busyOutputUART Busy

Table 15 GPIO Ports

Signal NameDirectionDescription
i_gpio[N-1:0]1InputGPIO In. Synchronous to “i_apb_clk”
o_gpio[N-1:0]1OutputGPIO Out. Synchronous to “i_apb_clk”
o_gpio_dir[N-1:0]1OutputGPIO Direction. 0=GPIO Output, 1=GPIO Input. User can tri-state the GPIO pin using this port. Synchronous to “i_apb_clk”
  1. N=GPIO_INST

Table 16 Sensor Reset Port

Signal NameDirectionDescription
o_sw_sen_rst [31:0]OutputRegister Controlled Reset. Connect to on-board sensor reset pin
o_sw_sys_rstOutputRegister controlled self-clearing reset. Can be used to reset blocks, such as PCS block.

Table 17 PTP Clock and Reset

Signal NameDirectionDescription
i_ptp_clkInputPTP Clock
o_ptp_rstOutputPTP Reset

Table 18 Internal PTP Port

These ports are only available if EXT_PTP is NOT defined in “HOLOLINK_def.svh”. PTP module is instantiated within the HSB IP and is used to synchronize and timestamp.

Signal NameDirectionDescription
o_ptp_sec [47:0]OutputPTP Seconds Field per PTP1588-2019 v2 spec. Synchronous to i_ptp_clk
o_ptp_nanosec [31:0]OutputPTP Nanoseconds Field per PTP1588-2019 v2 spec. Synchronous to i_ptp_clk
o_ppsOutputPulse Per Second. Synchronous to i_ptp_clk

Table 19 External PTP Port

These ports are only available if EXT_PTP is defined in “HOLOLINK_def.svh”. If the Ethernet MAC IP has built-in PTP feature, that can be used to pass the timestamp to the HSB IP.

Signal NameDirectionDescription
i_ptp_sec [47:0]InputPTP Seconds Field per PTP1588-2019 v2 spec. Synchronous to i_ptp_clk
i_ptp_nanosec [31:0]InputPTP Nanoseconds Field per PTP1588-2019 v2 spec. Synchronous to i_ptp_clk