Changes and New Features

Warning

Security Hardening Enhancements: This release contains important reliability improvements and security hardening enhancements. NVIDIA recommends upgrading your devices firmware to this release to improve the devices’ firmware security and reliability.

Warning

SR-IOV - Virtual Functions (VF) per Port - The maximum Virtual Functions (VF) per port is 127. For further information, see RoCE Limitations.

Feature/Change

Description

14.32.1010

Congestion Control Key

Added a Congestion Control Key to all Congestion Control MADs to authenticate that they are originated from a trusted source.

SMP Firewall

Added an SMP firewall to block the option of sending SMPs (MADS sent on QP0 from the Subnet Manager) from unauthorized hosts to prevent fake SMPs from being recognized as the SM.

Vendor Specific MADs: Class 0x9

Vendor Specific MADs Class 0x9 is no longer supported by the firmware. If case the firmware detects such MAD, the firmware will return a "NOT SUPPORTED" error to the user.

Asserts' Severity Level

Added 3 new assert filters (Health buffer, NVlog, FW trace). The assert will be exposed now if its severity level is equal to or above the new filter.

The filters are configurable by the ini file. The "Health buffer" filter is also configurable by new access register.

Rate Limit per VM instead of VM-TC

Enabled Rate Limit per VM instead of VM-TC. This capability is implemented by adding support to a new Scheduling element type: rate limit elements that will connect to the rate_limit and will share its rate limit.

Asymmetrical VFs per PF

Added support for asymmetrical VFs per PF.

To enable it:
PF_NUM_OF_VF_VALID must be true, and PF_NUM_OF_VF to a non-zero value.

mlxlink Support to read/write Access Registers by LID

Added 2 new MAD access registers to enable mlxlink to read/write access registers by LID (to the whole subnet).

Bug Fixes

See Bug Fixes in this Firmware Version section.

© Copyright 2023, NVIDIA. Last updated on May 23, 2023.