NVIDIA ConnectX-7 Adapter Cards Firmware Release Notes v28.41.1000
v28.41.1000

Changes and New Feature History

Note

This section includes history of changes and new feature of 3 major releases back. For older releases history, please refer to the relevant firmware versions.

Feature/Change

Description

28.40.1000

Socket Direct Single netdev Mapped to Two PCIe Devices

Enabled Single Netdev mapping to two PCIe devices (Socket Direct).

Now multiple devices (PFs) of the same port can be combined under a single netdev instance. Traffic is passed through different devices belonging to different NUMA sockets, thus saving cross-NUMA traffic and allowing apps running on the same netdev from different NUMAs to still feel a sense of proximity to the device and achieve improved performance.

The netdev is destroyed once any of the PFs is removed. A proper configuration would utilize the correct close NUMA when working on a certain app/CPU.

Currently, this capability is limited to PFs only, and up to two devices (sockets). To enable the feature, one must configure the same Socket Direct group (non zero) for both PFs through mlxconfig SD_GROUP.

Port Rate Limiting

Added a new access register (PBWS) to set the port maximum bandwidth to a value between 95% to 100%.

ACL

Added support for egress ACL to the uplink by adding a new bit to the Set Flow Table Entry: allow_fdb_uplink_hairpin.

Live Migration

Added support for live migration with MPV and IPSEC. This capability enables creating cross-vhca objects, however, they can only be created between affiliated GVMIs.

If HCA_CAP.migratable bit is set, HCA_CAP.cross_vhca_object_to_object_supported and HCA_CAP.allowed_object_for_other_vhca_access refer to affiliated VHCAs only.

Alternative Bill of Materials (BOM)

NVIDIA is adding an alternative Bill of Materials (BOM) for the specified affected items (MCX713104AS-ADAT & MCX713104AC-ADAT) to enhance production yields. The new alternate BOM requires updating to a minimum firmware version of 28.39.2048.

Bug Fixes

See Bug Fixes in this Firmware Version section.

Feature/Change

Description

28.39.2048

FEC Configuration

Changed the default FEC configuration for the "Protocol Aware" and "Active DME Modules" (ETH cables).

For the list of cable identifiers, see tables below.

Bug Fixes

See Bug Fixes in this Firmware Version section.

Byte 192 of Page 0 for sff cables

Name

Auto Detect FEC

Current Default FEC

Previous Default FEC

P/N - Example of one module

0x1A

100GBase DWDM2

No

NO FEC

RS FEC

0x21

100G BIDI PAM4

No

NO FEC

RS FEC

SFBR-89BDDZ-CS4

0x25

100GBASE-DR

No

NO FEC

RS FEC

MMS1V70-CM

0x26

100GBASE-FR

No

NO FEC

RS FEC

QSFP28-FR-C

0x27

100GBASE-LR

No

NO FEC

RS FEC

SPTSBP4LLCDF

Protocol Aware ETH Cables

Byte 192 of Page 0 for sff cables

Name

Auto Detect FEC

Current Default FEC

Previous Default FEC

P/N - Example of one module

0x1

100G AOC / 25GAUI C2M AOC

Yes

RS FEC

RS FEC

0x2

100GBASE-SR4 / 25GBASE-SR

Yes

RS FEC

RS FEC

MMA2P00-AS

0x3

100GBASE-LR4

Yes

NO FEC

RS FEC

MMA1L10-CR

0x3

25GBASE-LR

Yes

RS FEC

FC FEC

MMA2L20-AR

0x4

100GBASE-ER4

Yes

NO FEC

RS FEC

SPQCEERCDFLM Source Photonics

0x5

100GBASE-SR10

Yes

NO FEC

RS FEC

0x6

100G CWDM4 MSA with FEC

Yes

RS FEC

RS FEC

MMA1L30-CM

0x7

100G PSM4 Parallel SMF

Yes

RS FEC

RS FEC

MMS1C10-CM

0x8

100G ACC / 25GAUI C2M ACC

Yes

RS FEC

RS FEC

0x9

100G CWDM4 MSA without FEC

Yes

NO FEC

RS FEC

LQ210CR-CPA2

0x17

100G CLR4

Yes

RS FEC

RS FEC

0x18

100G AOC

Yes

NO FEC

RS FEC

MFA1A00-C010

0x19

100G ACC

Yes

NO FEC

RS FEC

0x20

100G SWDM4

Yes

RS FEC

RS FEC

FTLC9152RGPL

0x22 / 0x23 / 0x24

4WDM-10 MSA / 4WDM-20 MSA / 4WDM-40 MSA

Yes

RS FEC

RS FEC

Active DME Modules ETH Cables

Warning

To configure FEC or Speed that is different than the default, you must configure both sides.

The following are examples of when FEC detection capability is available:

  • when a 25G SFP module is connected to card, it will support FEC detection in 25G

  • when a 100G QSFP module is connected to a card, it will support FEC detection in 100G, but not in 50G or 25G

Note

Firmware version 28.38.1900 (together with MLNX_OFED v23.07-0.5.1.2) should be used by InfiniBand customers.

Feature/Change

Description

28.38.1900

QKEY Mitigation in the Kernel

QKEY creation with the MSB set is available now for non-privileged users as well.

To allow non-privileged users to create QKEY with MSB set, the below new module parameter was added to ib_uverbs module:

  • Module Parameter: enforce_qkey_check

  • Description: Force QKEY MSB check for non-privileged user on UD QP creation

  • Default: 0 (disabled)

Note: In this release, this module parameter is disabled by default to ensure backward compatibility and give customers the opportunity to update their applications accordingly. In the upcoming release, it will be enabled by default, and later on deprecated.

Feature/Change

Description

28.38.1002

Header Modification

Added support to the metadata reg_c 8-11 (packet fields) for matching and modifying the header, and Advanced Steering Operation (ASO) actions.

INT Packets

Added support for forwarding INT packets to the user application for monitoring purposes by matching the BTH acknowledge request bit (bth_a).

Get Electrical Sensor, NC-SI

Implemented NVIDIA NC-SI OEM Commands:

  • Get Electrical Sensor Count (command 0x13, parameter 0x6)

  • Gel Electrical Sensor (command 0x13, parameter 0x7)

  • Get Electrical Sensors (command 0x13, parameter 0x8)

IPsec CPS Bulk Allocation

Improved the IPsec CPS by using bulk allocation.

For cases in which log_obj_range == 0, single IPSEC object will be allocated and initialized as before keeping backward compatibility.

For better performance, it is recommended to work with IPsec bulk allocation and to initialize IPsec ASO context not via the firmware but via the hardware using ASO WQE.

DPA PROCESS ERROR

Added support for a new value for coredump_type field in DPA_PROCESS_COREDUMP, [FIRST_ERROR_THREAD_DUMP (1).].

Device Attestation

Attestation is a mechanism in which a host/platform automatically verifies the authenticity and integrity of the hardware and software state of a device. The mechanism is based on a HW RoT and utilizes SPDM messages that handle the attestation, measurement collection, and trust between device and platform BMC or platform RoT (usually host BMC). This provides the added value of increased security and assurance that the host/platform of device is not being tampered with and has the proper software running on it.

A CoRIM is comprised of one or more CoMIDs , with each CoMID providing the reference claims about hardware and firmware for a device. The CoRIM and CoMIDs are encoded in CBOR format. Signed CoRIMs use COSE signatures.

For further information, see "NVIDIA Device Attestation and CoRIM-based Reference Measurement Sharing".

QKEY Mitigation in the Kernel

Non-privileged users are now blocked by default from setting controlled/privileged QKEYs (QKEY with MSB set).

Bug Fixes

See Bug Fixes in this Firmware Version section.

© Copyright 2024, NVIDIA. Last updated on May 6, 2024.