Changes and New Feature History

Memory Slow Release

Added a new command interface "Memory slow release" to enable/disable holding memory pages for a defined period of time. Once the timer expires, the firmware will return the pages to the driver.

PXE Filters

Added support for configuring PXE boot filters' setting from the HII menu to filter only PXE packets (DHCP, TFTP.ARP,ICMP) during boot on UEFI environment.

Precision Timing (PTM)

Added support for Precision Timing (PTM). This new capability ensures seamless operations, synchronized data access, faster response times, and optimal AI performance, enhancing cloud offerings' reliability and scalability.

PTP

Improved the PTP accuracy for ports with link speed of 25G or above.

Kernel Lockdown

Added support for MVTS register via a miscellaneous driver using the access_register PRM command.

AN/LT Visibility

Added an LT logger that provides visibility of the LT status, process and parameters sent and received during the flow.

Steering SF Traffic to a Specific PF MSI-X

MSI-X on SF can be received now through the PF's MSI-X vector.

Bug Fixes

See Bug Fixes in this Firmware Version section.

ODP Event

Added support for the following prefetch fields on ODP event: pre_demand_fault_pages, post_demand_fault_pages.

TRNG FIPS Compliance

Implemented Deterministic Random Bit Generator (DRBG) algorithm on top of firmware TRNG (the source for raw data input) in accordance with NIST SP800-90A.

400GbE, Single-Port, OSFP to OSPF-RHS cable

Added support for 400GbE speed (8X50G) in Single-Port OSFP adapter cards including link training and auto-negotiation when connecting OSFP to OSPF-RHS cables.

PSP

Added support for PSP in Hardware Steering.

NVConfig

Added a new NVConfig option to copy AR bit from the BTH header to the DHCP header.

Steering

Added the option provide field's offset and length in Steering add_action option.

Steering Match

Added support for steering match on packet l4_type through FTG/FTE.

Packet's Flow Label Fields

Added support for setting, adding or copying the flow_label fields from the packet.

BAR Pages

Added support for 64KB pages.

Note: Configuring BAR_PAGE_ALIGNMENT to ALIGN_64KB(2) while one of the following is configured will cause the device to ignore the BAR_PAGE_ALIGNMENT configuration:

• PF_NUM_PF_MSIX>256 on any of the Physical Functions

• VIRTIO_EMULATION_HOTPLUG_TRANS/VIRTIO_NET_EMULATION_PF_PCI_LAYOUT/ VIRTIO_NET_EMULATION_VF_PCI_LAYOUT/ VIRTIO_BLK_EMULATION_PF_PCI_LAYOUT/ VIRTIO_BLK_EMULATION_PF_PCI_LAYOUT=VIRTIO_TRANSITIONAL(1)

Flex Parser Merge Mechanism

Extended Flex Parser merge mechanism to support hardware capabilities.

Flex Parser

Enabled the option to disable the native parser when the parse graph node is configured with the same conditions.

Flex Parser

Added support for father/son headers parsing.

LRO

Added support for tunnel_offload in LRO.

Bug Fixes

See Bug Fixes in this Firmware Version section.

Socket Direct Single netdev Mapped to Two PCIe Devices

Enabled Single Netdev mapping to two PCIe devices (Socket Direct).

Now multiple devices (PFs) of the same port can be combined under a single netdev instance. Traffic is passed through different devices belonging to different NUMA sockets, thus saving cross-NUMA traffic and allowing apps running on the same netdev from different NUMAs to still feel a sense of proximity to the device and achieve improved performance.

The netdev is destroyed once any of the PFs is removed. A proper configuration would utilize the correct close NUMA when working on a certain app/CPU.

Currently, this capability is limited to PFs only, and up to two devices (sockets). To enable the feature, one must configure the same Socket Direct group (non zero) for both PFs through mlxconfig SD_GROUP.

Port Rate Limiting

Added a new access register (PBWS) to set the port maximum bandwidth to a value between 95% to 100%.

ACL

Added support for egress ACL to the uplink by adding a new bit to the Set Flow Table Entry: allow_fdb_uplink_hairpin.

Live Migration

Added support for live migration with MPV and IPSEC. This capability enables creating cross-vhca objects, however, they can only be created between affiliated GVMIs.

If HCA_CAP.migratable bit is set, HCA_CAP.cross_vhca_object_to_object_supported and HCA_CAP.allowed_object_for_other_vhca_access refer to affiliated VHCAs only.

Alternative Bill of Materials (BOM)

NVIDIA is adding an alternative Bill of Materials (BOM) for the specified affected items (MCX713104AS-ADAT & MCX713104AC-ADAT) to enhance production yields. The new alternate BOM requires updating to a minimum firmware version of 28.39.2048.

Bug Fixes

See Bug Fixes in this Firmware Version section.