NVIDIA ConnectX-8 SuperNIC Firmware Release Notes v40.44.0208

Known Issues

VF Network Function Limitations in SR-IOV Legacy Mode & in Switchdev Mode

Dual Port Device

Single Port Device

127 VF per PF (254 functions)

127

VF+SF Network Function Limitations in Switchdev Mode

Dual Port Device

Single Port Device

  • 127 VF per PF (254 functions)

  • 512 PF+VF+SF per PF (1024 functions)

  • 127 VF (127 functions)

  • 512 PF+VF+SF per PF (512 functions)

ConnectX-8 has the same feature set and limitations as ConnectX-7 adapter card. For the list of ConnectX-7 Known Issues, please go to https://docs.nvidia.com/networking/software/adapter-firmware/index.html#connectx-7.

The below are limitations related to ConnectX-8 only.

Internal Ref.Issue

-

Description: Although ConnectX-8 SuperNIC is defined to work at Gen6 x16 (default) or Gen5 x32, in firmware v40.44.0204, the default configuration is Gen5 x32. Changing between the modes is done by an NVConfig command.

Workaround: N/A

Keywords: Gen6, Gen5, PCIe

Detected in version: 40.44.0208


4038325

4031430

4038341

4046105


Description: Connecting to systems with NRZ speeds of 1,10, 25, 40, 50, or 100Gb/s is not supported in the current release.

Workaround: N/A

Keywords: NRZ, Connectivity

Detected in version: 40.44.0208

4158184

Description: The Lane Error Status may occasionally appear in Configuration space. It can be safely ignored as it does not have any impact on device performance. Users are encouraged to monitor their systems, but this condition does not warrant any immediate action unless other issues arise.

Workaround: N/A

Keywords: Lane Error Status

Detected in version: 40.44.0208

4220173

Description: In firmware version 40.44.0208, the 'max_parse_graph_header_length_base_value' field allows setting higher values than the recommended. This will be reduced in the next release.

Workaround: N/A

Keywords: PARSE_GRAPH_NODE Capabilities Layout

Detected in version: 40.44.0208

4208960

Description: A packet may be parsed incorrectly, if a driver uses the header_length_field_mask when creating a PARSE_GRAPH_NODE object, and the mask value is not composed of continuous bits or does not commence at the least significant bit.

Workaround: Insert the header_length_field_mask with continuous bits and commence at the least significant bit.

Keywords: PARSE GRAPH NODE, Flex Parser

Detected in version: 40.44.0208

4176679

Description: When sending RoCE traffic using 1 or 2 QPs using a 400GbE link speed with Congestion Control enabled, bandwidth might not reach its line rate.

Workaround: N/A

Keywords: RoCE, Congestion Control, 400GbE, performance

Detected in version: 40.44.0208

4176679

Description: When sending RoCE traffic using 1 or 2 QPs using a 400GbE link speed with Congestion Control enabled, bandwidth might not reach its line rate.

Workaround: N/A

Keywords: RoCE, Congestion Control, 400GbE, performance

Detected in version: 40.44.0208

4202233

Description: Address Translation Service (ATS) is at Beta level. Enabling ATS from mlxconfig and stopping the driver can result at a call trace in dmesg.

Workaround: N/A

Keywords: ATS

Detected in version: 40.44.0208

4201405

Description: Upgrading to firmware 40.44.0xxx from any previous Engineering Sample version requires power cycling the driver and not just resetting it (using mlxfwreset).

Workaround: N/A

Keywords: Upgrade, power cycle, reset

Detected in version: 40.44.0208

4161303

Description: PCI ARCH counters are not supported. Other ARCH counters are supported, but not fully tested.

Workaround: N/A

Keywords: Counters

Detected in version: 40.44.0208

4119723

Description: RDMA bandwidth might not reach line rate when using 100G link speed and the Congestion Control (CC) is enabled.

Workaround: N/A

Keywords: 100G, line rate, CC

Detected in version: 40.44.0208

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