|
|
NVIDIA DRIVE OS Linux API Reference5.1.0.2 Release |
NVIDIA Quickboot Interface: QSPI Access
Description: This file declares APIs for accessing QSPI.
Definition in file qspi.h.
Go to the source code of this file.
Data Structures | |
| struct | QspiTransfer |
| Holds QSPI Transfer data. More... | |
| struct | QspiControllerData |
| Holds QSPI hardware controller context data. More... | |
Macros | |
| #define | DEBUG_QSPI 0 |
| #define | PRINT_QSPI_DBG_MESSAGES(...) |
| #define | PRINT_QSPI_REG_ACCESS(...) |
| #define | QSPI_CONTROLLERS_MAX 1 |
| #define | QSPI_MAX_BIT_LENGTH 31 |
| #define | QSPI_8Bit_BIT_LENGTH 7 |
| #define | QSPI_FIFO_DEPTH 64 |
| #define | BYTES_PER_WORD 4 |
| #define | QSPI_HW_TIMEOUT 100000 |
| Defines the read time-out, in milliseconds. More... | |
Typedefs | |
| typedef struct QspiTransfer | QspiTransfer |
| Holds QSPI Transfer data. More... | |
Enumerations | |
| enum | QspiBusWidth { QSPI_BUS_WIDTH_X1, QSPI_BUS_WIDTH_X2, QSPI_BUS_WIDTH_X4 } |
| Defines the QSPI bus widths. More... | |
| enum | NvQspiChipSelect { ACTIVE_LOW = 0, ACTIVE_HIGH } |
| Defines the QSPI chip selection. More... | |
| enum | QspiXferType_t { SYNC, ASYNC } |
| Defines the transfer types. More... | |
| enum | QspiOpMode_t { SDR_MODE = 0, DDR_MODE } |
| Defines the QSPI controller and Flash chip operating mode. More... | |
Functions | |
| NvError | NvQspiInit (void *pdata) |
| Initializes the specified QSPI controller. More... | |
| NvError | QspiHwProcReadAsyncWaitDMAComplete (NvU32 Instance) |
| Waits until the IO from the DMA is complete. More... | |
| NvError | NvQspiTransaction (QspiTransfer *Transfers, NvU8 Numoftransfers, NvU32 Instance) |
| Performs QSPI transactions for write and read. More... | |
| void | NvQspiShutdown (NvU32 Instance) |
| Shuts down the QSPI controller. More... | |
| void | QspiDumpRegisters (NvU32 Instance) |
| Dumps the registers of the QSPI controller. More... | |