Detailed Description

Holds QSPI Transfer data.

The message consists of multiple transfers.

Definition at line 90 of file qspi.h.

Data Fields
NvU8 *	Txbuf
	TX buffer address. More...

NvU8 *	Rxbuf
	RX buffer address. More...

NvU32	Mode
	QSPI X1 or X2 or X4 xfer mode. More...

NvU32	Writelen
	TX length. More...

NvU32	Readlen
	RX length. More...

NvU32	Speed_hz
	QSPI clock frequency. More...

NvU32	BusWidth
	QSPI controller FIFO width. More...

NvU32	DummyCycles
	Clock cycles between two transaction. More...

QspiXferType_t	type
	ASYNC or SYNC xfer. More...

QspiOpMode_t	OpMode
	DDR or SDR mode of xfer. More...

Field Documentation

NvU32 QspiTransfer::BusWidth

QSPI controller FIFO width.

Definition at line 98 of file qspi.h.

NvU32 QspiTransfer::DummyCycles

Clock cycles between two transaction.

Definition at line 99 of file qspi.h.

NvU32 QspiTransfer::Mode

QSPI X1 or X2 or X4 xfer mode.

Definition at line 94 of file qspi.h.

QspiOpMode_t QspiTransfer::OpMode

DDR or SDR mode of xfer.

Definition at line 101 of file qspi.h.

NvU32 QspiTransfer::Readlen

RX length.

Definition at line 96 of file qspi.h.

NvU8* QspiTransfer::Rxbuf

RX buffer address.

Definition at line 93 of file qspi.h.

NvU32 QspiTransfer::Speed_hz

QSPI clock frequency.

Definition at line 97 of file qspi.h.

NvU8* QspiTransfer::Txbuf

TX buffer address.

Definition at line 92 of file qspi.h.

QspiXferType_t QspiTransfer::type

ASYNC or SYNC xfer.

Definition at line 100 of file qspi.h.

NvU32 QspiTransfer::Writelen

TX length.

Definition at line 95 of file qspi.h.

The documentation for this struct was generated from the following file: