27 #ifndef INCLUDED_SDMMC_H
28 #define INCLUDED_SDMMC_H
30 #include <clock_reg.h>
31 #include <nvboot_sdmmc_param.h>
33 #define MAX_SDMMC_INSTANCE 4
36 #define SDMMC_COMMAND_TIMEOUT_IN_US 100000
37 #define SDMMC_OP_COND_TIMEOUT_IN_US 1000000
39 #define SDMMC_READ_TIMEOUT_IN_US 200000
41 #define SDMMC_TIME_OUT_IN_US 100000
45 #define NVBOOT_SDMMC_RESPONSE_BUFFER_SIZE_IN_BYTES 16
46 #define NVBOOT_SDMMC_ECSD_BUFFER_SIZE_IN_BYTES 512
48 #define NVBOOT_SDMMC_BOOT_MODE_BUFFER_SIZE_IN_BYTES 512
SdmmcAccessRegion CurrentAccessRegion
Holds the current access region.
SdmmcResponseType
Defines command responses for eMMC/ESD.
NvU8 BootConfig
Holds the boot config from ExtCSD.
NvU8 PowerClass200MHzDdr180V
Power class for 200 Mhz DDR @ 3.6V.
QbDriver
Defines Quickboot device driver types.
NvU32 XferStartTime
Holds the Movi Nand Read/Write start time.
NvU8 SdmmcBootModeBuffer[NVBOOT_SDMMC_BOOT_MODE_BUFFER_SIZE_IN_BYTES]
Holds data read in boot mode.
NvU8 PageSizeLog2ForCapacity
Holds the page size to use for card capacity calculation.
NvU32 CardRca
Holds the card's Relative Card Address.
SdmmcState
Defines eMMC/ESD card states.
void QbSddmmcPrintInterruptStatus(NvU32 InterruptStatus)
NvU8 PowerClass52MHzDdr360V
Power class for 52 Mhz DDR @ 3.6V.
SdmmcInitLevel SdmmcInitType
NvU8 SdmmcInternalBuffer[NVBOOT_SDMMC_ECSD_BUFFER_SIZE_IN_BYTES]
Defines a buffer for selecting high speed, reading extended CSD and SCR.
NvU8 taac
Defines read access time1.
NvU8 TranSpeedInMHz
Defines the transfer speed in MHz.
NvU8 ClockDivisor
Defines the clock divisor for the SDMMC Controller Clock Source.
QbDeviceStatus
Defines the current status of a transfer request.
NvBool IsHighCapacityCard
Defines whether the card is a high capacity card.
NvU32 SdmmcResponse[NVBOOT_SDMMC_RESPONSE_BUFFER_SIZE_IN_BYTES/sizeof(NvU32)]
Holds a response buffer.
NvU32 NumOfBlocks
Holds the number of blocks present in card.
SdmmcInitLevel
Defines various initialization optimization options.
NvU8 PagesPerBlockLog2
Holds the number of pages per block.
NvBool IsHighVoltageRange
Defines whether high voltage range is used for card identification.
NvBootSdmmcDataWidth DataWidth
Defines the data bus width.
NvBool EnhancedStrobeMode
Defines whether to access the card in HS400 ESM.
NvU8 PowerClass26MHz195V
Holds the power class for 26MHz at 1.95V.
#define NVBOOT_SDMMC_ECSD_BUFFER_SIZE_IN_BYTES
Defines the buffer size for reading extended CSD.
NvU8 PageSizeLog2
Holds the page size.
NvU8 TranSpeed
Defines the clock frequency when not in high speed mode.
NvBool CardSupportsHighSpeedMode
Defines whether the card supports high speed mode.
SdmmcAccessRegion
Defines eMMC card partitions.
NvBool IsPLLP
Indicates whether Parent clock source is PLLP or PLLC4.
NvU8 PowerClass52MHzDdr195V
Power class for 52 Mhz DDR @ 1.95V.
NvU8 nsac
Defines read access time2.
NvU8 IsDdrMode
Indicates whether Ddr mode is used for data transfer.
#define NVBOOT_SDMMC_BOOT_MODE_BUFFER_SIZE_IN_BYTES
Defines the buffer size for reading data in boot mode.
NvU16 CardClockDivisor
Defines a value for subdividing the clock that goes to the card from the controller.
NvBootSdmmcCardClock CurrentClockRate
Holds the current clock rate.
NvU8 MaxPowerClassSupported
Holds the Max Power class supported by target board.
NvU8 SpecVersion
Holds the spec version.
NvBool BootModeReadInProgress
Defines whether you are reading in boot mode.
NvError QbSdmmcRead(QbDriver DriverType, NvU32 Instance, void *Buffer, NvU64 Size, NvU64 Offset)
QbDeviceStatus DeviceStatus
Holds the device status.
NvU8 PowerClass52MHz360V
Holds the power class for 52MHz at 3.6V.
NvU32 XferTimeOutInUs
Holds read/write time out at current card clock frequency.
NvU8 ExtCsdSpecVersion
Holds the ExtCsdSpecVersion.
NvU8 CardSupportSpeed
Flag to indicate the card speed and operating voltage level.
NvBool Support64BitDmaAddr
NvU32 Instance
Defines the SDMMC controller instance ID.
Defines platform data for the SDMMC registration.
NvBootSdmmcCardClock
Defines various clock rates to use for accessing the eMMC/ESD card.
SdmmcCommand
Defines eMMC/ESD commands as per eMMC/ESD specifications.
NVIDIA Quickboot Interface: Device Drivers
NvU8 BlockSizeLog2
Holds the block size.
NvBool HighSpeedMode
Defines whether to access the card in high speed mode.
NvU8 PowerClass26MHz360V
Holds the power class for 26MHz at 3.6V.
Holds the context structure for the SDMMC driver.
#define NVBOOT_SDMMC_RESPONSE_BUFFER_SIZE_IN_BYTES
Defines the SDMMC response buffer size.
NvBootSdmmcCardType
Defines the supported card types.
SdmmcInitLevel SdmmcInitType
NvBool Support64BitDmaAddr
NvBool HostSupportsHighSpeedMode
Defines whether the host supports high speed mode.
void QbSdmmcDumpTegraRegs(NvU32 RegBase)
NvU8 PowerClass52MHz195V
Holds the power class for 52MHz at 1.95V.
NvBool Mantissa
Indicates whether to add 0.5 to ClockDivisor.
NvBool IsEsd
Defines whether the driver is for an ESD card (vs eMMC).
NvU32 EmmcBootPartitionSize
Holds Emmc Boot Partition size.