NVIDIA DRIVE OS Linux API Reference

5.1.0.2 Release
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Data Fields
QbSdmmcInfo Struct Reference
SDMMC Context (Parker)

Detailed Description

Defines platform data for the SDMMC registration.

The struct is passed when registering the driver from the board file.

Definition at line 170 of file sdmmc.h.

Data Fields

NvU32 Instance
 Defines the SDMMC controller instance ID. More...
 
NvU8 ClockDivisor
 Defines the clock divisor for the SDMMC Controller Clock Source. More...
 
NvU16 CardClockDivisor
 Defines a value for subdividing the clock that goes to the card from the controller. More...
 
NvBool Mantissa
 Indicates whether to add 0.5 to ClockDivisor. More...
 
NvBootSdmmcDataWidth DataWidth
 Defines the data bus width. More...
 
QbClocksInfo SdmmcClock
 
NvU32 TapVal
 
NvU32 TrimVal
 
NvU32 AutoCalPdOffset
 
NvU32 AutoCalPuOffset
 
NvBool DisableHS400
 
SdmmcInitLevel SdmmcInitType
 
NvBool Support64BitDmaAddr
 

Field Documentation

NvU32 QbSdmmcInfo::AutoCalPdOffset

Definition at line 204 of file sdmmc.h.

NvU32 QbSdmmcInfo::AutoCalPuOffset

Definition at line 205 of file sdmmc.h.

NvU16 QbSdmmcInfo::CardClockDivisor

Defines a value for subdividing the clock that goes to the card from the controller.

If the controller clock is 24 Mhz and if this field is set to 2, then the clock that goes to the card is 12 MHz.

Definition at line 188 of file sdmmc.h.

NvU8 QbSdmmcInfo::ClockDivisor

Defines the clock divisor for the SDMMC Controller Clock Source.

SDMMC Controller gets PLL_P clock, which is 216 MHz, as a clock source. If it is set to 9, then the clock frequency at which EMMC controller runs is 216/9 = 24 MHz.

Definition at line 180 of file sdmmc.h.

NvBootSdmmcDataWidth QbSdmmcInfo::DataWidth

Defines the data bus width.

Definition at line 194 of file sdmmc.h.

NvBool QbSdmmcInfo::DisableHS400

Definition at line 207 of file sdmmc.h.

NvU32 QbSdmmcInfo::Instance

Defines the SDMMC controller instance ID.

Definition at line 173 of file sdmmc.h.

NvBool QbSdmmcInfo::Mantissa

Indicates whether to add 0.5 to ClockDivisor.

Definition at line 191 of file sdmmc.h.

QbClocksInfo QbSdmmcInfo::SdmmcClock

Definition at line 197 of file sdmmc.h.

SdmmcInitLevel QbSdmmcInfo::SdmmcInitType

Definition at line 209 of file sdmmc.h.

NvBool QbSdmmcInfo::Support64BitDmaAddr

Definition at line 210 of file sdmmc.h.

NvU32 QbSdmmcInfo::TapVal

Definition at line 200 of file sdmmc.h.

NvU32 QbSdmmcInfo::TrimVal

Definition at line 201 of file sdmmc.h.

The documentation for this struct was generated from the following file: