Debugging on Jetson Platforms¶
NVIDIA® Jetson™ devices support debugging tools that allow Jetson application developers to put the processor into known states and trace its behavior while running. Use these tools to debug software you have developed using NVIDIA Jetson Board Support Package (BSP).
The Jetson architecture’s debugging support provides:
Reduced power leakage
Enhanced security
Availability of standard interfaces
This topic describes the debuggable blocks, their debugging strategies, and the software implementation of the hardware and software features in the Technical Reference Manuals (TRMs) for Jetson processors. Use the appropriate TRM as your primary source for information and debugging.
For NVIDIA® Jetson Xavier™ NX series and NVIDIA® Jetson AGX Xavier™ series processors: Xavier Series (SoC) Technical Reference Manual
Debugging Improvements¶
The following table describes improvements in debugging features for Jetson devices.
Hardware Feature Benefit |
Jetson AGX Orin | Jetson Xavier NX series & Jetson AGX Xavier series |
---|---|---|
Hardware interface to debugger. JTAG (4-pin connector). SWD (2-pin connector). |
X X |
|
Debug interface connected to CPU via Debug Communication Channel with Memory Access Mode in v8.
|
X | |
Debug connection to AXI-AP via JTAG or SWD).
System access when CPUs are unavailable (powered down, dead, in reset, etc.). |
X | |
AXI-AP 34-bit address can access MMIO & DRAM with requiring SMMU. | X | |
Connection to SNIC allows access to entire system. |
X | |
Debugger accesses to memory are coherent. |
X | |
CoreSight support via JTAG or SWD Connection to APE. Connection to BPMP, SPE, & SCE. Connection to RCE, PVA0, & PVA1. |
X X X |
|
Trace Storage circular buffer.
Larger buffer yields a longer duration trace. Buffer is preserved through WDT resets. |
32 KiB |
CoreSight Trace Sinks ETF and ETR¶
The following table describes ARM® CoreSight™ trace sink characteristics for Jetson processors. These characteristics include the corresponding Embedded Trace FIFO (ETF), ETR, and USB limits.
Characteristic | ETF (32 Kib) | DDR via ETR DMA | TPIU (Jetson Xavier NX series & Jetson AGX Xavier series only) | USB |
---|---|---|---|---|
Throughput | 41.58 Gbps @ 408 MHz, 128‑bit * | 41.58 Gbps | 800 Mbps | Real time processor tracing requires reduction of CPU frequency. |
Intrusive | No | Yes | No | Yes |
Available on commercial devices | Yes | Yes | Yes | Yes |
Use Cases | Collect trace for watchdog reset; code optimization for the CCPLEX. | Collect trace for watchdog reset; code optimization for the CCPLEX. † | Collects trace for watchdog reset; code optimization for the CCPLEX. Tracing is limited to bandwidth speed. | Single-CPU trace at low frequency, or APE-only trace to avoid DRAM bandwidth saturation. Tracing is limited to USB speeds. |
* Contact NVIDIA for higher frequency requirements.
† Note the high bandwidth requirement at DDR = 25%. |
AMBA Trace ID (ATID) Mapping¶
The following tables describe mapping for ARM AMBA Trace ID (ATID). When collecting trace from multiple sources, the trace sinks (ETF and ETR) use ATIDs to segregate trace data.
Jetson Xavier NX series and Jetson AGX Xavier series | |||
---|---|---|---|
Processor type | ATID | Processor | Protocol |
CCPLEX using NVIDIA processors | n/a | CPU0 to CPU7 | n/a |
ARM® Cortex™-A5 | Configurable | BPMP | ETMv3 |
Configurable | SPE | ETMv3 | |
Configurable | SCE | ETMv3 | |
Configurable | RCE | ETMv3 | |
Configurable | PVA0 and PVA1 | ETMv3 | |
APE ARM Cortex-A9 | 0x20 | CPU0 | PTF1.0 |
STM | 0x10 | n/a | MIPI STP |
Uncore: Performance Monitor Unit¶
Applies to: Jetson AGX Xavier series and Jetson NX series only
Several functional units on the T194 CCPLEX (e.g., the SCF and the L2) are outside the cores. These units are collectively referred to as the uncore. Some of them report uncore performance events and event counters, which are not counted by the core performance counters of the core’s Performance Monitor Unit (PMU).
The NVIDIA Uncore Perfmon Extension to the ARM® Performance Monitor Extension (also called “Uncore Perfmon”) allows ARM software to access its performance counters. The Uncore Perfmon Extension is designed to resemble the standard ARM Performance Monitor Extension as much as possible.
You can download ARM PMU documentation from the Linux Kernel Archives.
Device-Specific Features and Limitations¶
This section describes features and limitations of Uncore Perfmon on specific NVIDIA Jetson systems on chip (SoCs).
For T194 modules (Jetson Xavier NX series and Jetson AGX Xavier series):
Uncore Perfmon events are supported for all cores and clusters.
For more information about using the counters, see the kernel documentation within source code at:
<kernel-source-path>/Documentation/devicetree/bindings/platform/tegra/nvidia,carmel-pmu.txt