Enable 25 Gigabit Ethernet on QSFP Port#

In the Jetson AGX Thor Developer Kit, the QSFP port can support both 10 Gigabit Ethernet (10GbE) and 25 Gigabit Ethernet (25GbE). The default is 10GbE.

The QSFP port can support only one configuration at a time. To enable 25GbE, apply the following patches, rebuild the BSP, and flash the device.

  1. Update the kernel device tree by patching Linux_for_Tegra/kernel/dtb/tegra264-p4071-0000+p3834-0008-nv.dtb as follows:

    iff --git a/nv-platform/tegra264-p4071-0000.dtsi b/nv-platform/tegra264-p4071-0000.dtsi
    index 936b556..317d59d 100644
    --- a/nv-platform/tegra264-p4071-0000.dtsi
    +++ b/nv-platform/tegra264-p4071-0000.dtsi
    @@ -219,8 +219,7 @@
            mgbe0: ethernet@a808a10000 {
                status = "okay";
                nvidia,mac-addr-idx = <1>;
    -           nvidia,uphy-gbe-mode = <1>;
    -           nvidia,phy-iface-mode = <0x0>;
    +           nvidia,uphy-gbe-mode = <2>;
                nvidia,max-platform-mtu = <9000>;
                nvidia,pcs-rx-eq-sw-ovrd = <1>;
                nvidia,pps_op_ctrl = <8>;
    @@ -228,7 +227,7 @@
    
                fixed-link {
                    full-duplex;
    -               speed = <10000>;
    +               speed = <25000>;
                };
            };
    
    @@ -236,8 +235,7 @@
                mgbe1: ethernet@a808b10000 {
                status = "okay";
                nvidia,mac-addr-idx = <2>;
    -           nvidia,uphy-gbe-mode = <1>;
    -           nvidia,phy-iface-mode = <0x0>;
    +           nvidia,uphy-gbe-mode = <2>;
                nvidia,max-platform-mtu = <9000>;
                nvidia,pcs-rx-eq-sw-ovrd = <1>;
                nvidia,pps_op_ctrl = <8>;
    @@ -245,7 +243,7 @@
    
                fixed-link {
                    full-duplex;
    -               speed = <10000>;
    +               speed = <25000>;
                };
            };
    
    @@ -253,8 +251,7 @@
                mgbe2: ethernet@a808d10000 {
                status = "okay";
                nvidia,mac-addr-idx = <3>;
    -           nvidia,uphy-gbe-mode = <1>;
    -           nvidia,phy-iface-mode = <0x0>;
    +           nvidia,uphy-gbe-mode = <2>;
                nvidia,max-platform-mtu = <9000>;
                nvidia,pcs-rx-eq-sw-ovrd = <1>;
                nvidia,pps_op_ctrl = <8>;
    @@ -262,7 +259,7 @@
    
                fixed-link {
                    full-duplex;
    -               speed = <10000>;
    +               speed = <25000>;
                };
            };
    
    @@ -270,8 +267,7 @@
                mgbe3: ethernet@a808e10000 {
                status = "okay";
                nvidia,mac-addr-idx = <4>;
    -           nvidia,uphy-gbe-mode = <1>;
    -           nvidia,phy-iface-mode = <0x0>;
    +           nvidia,uphy-gbe-mode = <2>;
                nvidia,max-platform-mtu = <9000>;
                nvidia,pcs-rx-eq-sw-ovrd = <1>;
                nvidia,pps_op_ctrl = <8>;
    @@ -279,7 +275,7 @@
    
                fixed-link {
                    full-duplex;
    -               speed = <10000>;
    +               speed = <25000>;
                };
            };
    
  2. Build the DTB and copy it to the following locations:

    • Linux_for_Tegra/kernel/dtb/tegra264-p4071-0000+p3834-0008-nv.dtb

    • Linux_for_Tegra/rootfs/boot/tegra264-p4071-0000+p3834-0008-nv.dtb

    • Linux_for_Tegra/bootloader/tegra264-p4071-0000+p3834-0008-nv.dtb

  3. Update the BPMP device tree by patching Linux_for_Tegra/bootloader/generic/tegra264-bpmp-3834-0008-4071-xxxx.dtb as follows:

    --- a/tegra264-bpmp-3834-0008-4071-xxxx.dts
    +++ b/tegra264-bpmp-3834-0008-4071-xxxx.dts
    @@ -68,15 +68,15 @@
      *
      *   UPHY1
      *   Option | Lane 0 | Lane 1 | Lane 2 | Lane 3 |        Lane 4   |      Lane 5      |        Lane 6    |      Lane    7     |
    - *      7   |          PCIE C5 x4 (DM)          |     MGBE0 10G   |     MGBE1 10G    |      MGBE2 10G   |     MGBE3    10G   |
    + *      8   |          PCIE C5 x4 (DM)          |     MGBE0 25G   |     MGBE1 25G    |      MGBE2 25G   |     MGBE3    25G   |
      */
            status = "okay";
            uphy0-config = <7>;      // Configure UPHY0-Lane6-7 for UFS
    -       uphy1-config = <7>;      // Configure UPHY1-Lane0-3 for C5 to enable mgbe
    -       mgbe0-speed = <2>;       /* 0 for 2.5G, 1 for 5G, 2 for 10G, 3 for 25G */
    -       mgbe1-speed = <2>;       /* 0 for 2.5G, 1 for 5G, 2 for 10G, 3 for 25G */
    -       mgbe2-speed = <2>;       /* 0 for 2.5G, 1 for 5G, 2 for 10G, 3 for 25G */
    -       mgbe3-speed = <2>;       /* 0 for 2.5G, 1 for 5G, 2 for 10G, 3 for 25G */
    +       uphy1-config = <8>;      // Configure UPHY1-Lane0-3 for C5 to enable mgbe
    +       mgbe0-speed = <3>;       /* 0 for 2.5G, 1 for 5G, 2 for 10G, 3 for 25G */
    +       mgbe1-speed = <3>;       /* 0 for 2.5G, 1 for 5G, 2 for 10G, 3 for 25G */
    +       mgbe2-speed = <3>;       /* 0 for 2.5G, 1 for 5G, 2 for 10G, 3 for 25G */
    +       mgbe3-speed = <3>;       /* 0 for 2.5G, 1 for 5G, 2 for 10G, 3 for 25G */
        };
    
        nvtherm {
    
  4. Build the BPMP DTB and copy it to the following locations:

    • Linux_for_Tegra/bootloader/generic/tegra264-bpmp-3834-0008-4071-xxxx.dtb

    • Linux_for_Tegra/bootloader/tegra264-bpmp-3834-0008-4071-xxxx.dtb

  5. Re-flash the board.