NVIDIA Accelerated IO (XLIO) Documentation Rev 3.31.2
NVIDIA Accelerated IO (XLIO) Documentation Rev 3.31.2

Changes and New Features in this Version

Feature/Category

Description

Allocation Logic Parameters

Changed the default value of the allocation logic parameters XLIO_RING_ALLOCATION_LOGIC_TX and XLIO_RING_ALLOCATION_LOGIC_RX to 20 (Per-Thread).

Socket API

Added XLIO Socket API as an extra API - see XLIO Socket API section.

Bug Fixes

See Bug Fixes section.

Important Notes

Note

As of XLIO v3.10, DEBUG-level logs will not be available in the release builds. Alternatively, you can use libxlio-debug.so to obtain those logs. For details on how to use libxlio-debug.so, please refer to Libxlio-debug.so section.

Note

libnl1 is no longer supported. Please use libnl3 instead.

Note

Bonding Active-Backup is not supported.

RoCE LAG is a feature meant for mimicking Ethernet bonding for IB devices and is available for dual-port cards only. XLIO cannot offload traffic in cases where RoCE LAG is enabled too. In RoCE LAG mode, instead of having an IB device per physical port (for example, mlx5_0 and mlx5_1), only one IB device is present for both ports.

Note

Direct Packet Control Plane (DPCP) provides a unified, flexible interface for programming NVIDIA NICs and comes as part of OFED. The DPCP version must be v1.1.44 and above. For further details, please see Direct Packet Control Plane (DPCP).

Note

TLS Rx offload related notes:

  • TLS Rx offload supports up to 64K concurrent connections

  • TLS Rx offload for IPv6 is not supported as it may cause unexpected behavior

  • TLS Rx offload requires OpenSSL 3.0.2 or higher and kTLS support from the kernel

© Copyright 2024, NVIDIA. Last updated on Aug 14, 2024.