Using the Mellanox Innova-2 Flex Open Bundle

Mellanox provides the Mellanox Innova-2 Flex Open Bundle, which includes the Mellanox Innova-2 Flex Open FPGA Image and Mellanox Innova-2 Flex Open application. For detailed content of the bundle see Bundle Content and Considerations.

The bundle allows the user to:

Important Notes:

  • If the Mellanox Innova-2 Flex image is not burned onto the card upon shipment, the user must burn the Mellanox Innova-2 Flex Image provided by Mellanox via JTAG. See Burning the FPGA Image through the JTAG.

  • The user can use the Mellanox Innova-2 Flex Open application to burn the user image and for FPGA interface diagnostics only if the FPGA Mellanox Innova-2 Flex Image is loaded. Otherwise, the application will display a reduced menu which only allows the user to load the Mellanox Innova-2 Flex Image.

  • When using the Mellanox Innova-2 Flex image, the user must work with the Mellanox Innova-2 Flex Open application only.

  • The user cannot overwrite the Mellanox Innova-2 Flex Image.

  1. Copy the provided Mellanox Innova-2 Flex Open application package to a local temporary directory (i.e. /tmp).

  2. Enter the temporary directory:

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    cd /tmp

  3. Extract the Mellanox Innova-2 Flex Open application installation package:

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    tar zxvf Innova_2_Flex_Open_xx_xx.tar.gz

  4. Navigate to the application folder (/app):

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    cd Innova_2_Flex_Open_xx_xx/app

  5. Navigate to the driver folder (/driver):

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    cd Innova_2_Flex_Open_xx_xx/driver

  6. Compile:

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    make clean; make

  1. Run the application:

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    sudo ./innova2_flex_app -v

  2. Detect the system’s state as instructed in Identifying the System State. If the system state is as shown in Example A, proceed to Step 3, if the system state is as shown in Example B or Example C, proceed to Step 4.

  3. Perform the following:

    1. Exit the application using the Exit option.

    2. Navigate to the driver folder

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      cd ../driver/

    3. Install the driver.

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      make clean make sudo insmod mlx_fpga_bope.ko

    4. Return to Installing the Mellanox Innova-2 Flex Open Application.

  4. You will now see the “Jump to Innova-2 Flex Image” menu with one single item: “Set Innova-2 Flex Image active”.

    1. See Using the Mellanox Innova-2 Flex Open Bundle in order to change to the Mellanox Innova-2 Flex image.

Identifying the System State

Examples:

  1. In the figure below, the Mellanox Innova-2 Factory Image is running, and there is no Mellanox Innova-2 FPGA PCI driver loaded.

    image2019-2-10_11-25-38.png

  2. In the figure below, the Mellanox Innova-2 Factory Image is running, and the Mellanox Innova-2 FPGA PCI driver is loaded. In the BOPE device info, the FPGA image version is displayed.

    image2019-2-10_11-26-16.png

  3. In the figure below, the Mellanox Innova-2 Flex Image is running, and the Mellanox Innova-2 FPGA driver is not loaded.

    image2019-2-10_11-28-19.png

  4. In the figure below, the Mellanox Innova-2 Flex Image is running, and the Mellanox Innova-2 FPGA PCI driver is loaded.

    image2019-2-10_11-29-58.png

  5. In the figure below, the User Image is running (the Mellanox Innova-2 FPGA PCI driver is not required).

    image2019-2-10_11-30-37.png

  • Query FPGA version - reads the Mellanox Innova-2 Flex Image FPGA version and presents it to the user.

  • DDR Stress BIST (Built-in Self Test):

    • Cyclic test LFSR (Linear Feedback Shift Register) address - data, which can be either 1s, 0s or pseudo-random, is written to pseudo-random address until every DDR address is written to. The test then reads back the sequence and compares to the expected sequence. A new seed is used for the pseudo-random address sequence in every new cycle. The test continues until terminated by the user.

    • Cyclic test incremental address - data, which can be either 1s, 0s or pseudo-random, is written to incremental address until every DDR address is written to. The test then reads back the sequence and compares to the expected sequence. The test continues until terminated by the user.

  • Single test - writes data all over the DDR space and validates that data is written properly.

  • PCI test - tests the PCIe interface between the host and the FPGA.

  • FPGA Thermal status - reads the FPGA temperature and presents it to the user (in Celsius).

  • Fan speed - reads the Fan speed and presents it to the user (in RPM).

  • Increase FPGA power consumption - reads the FPGA power level, and presents it to the user. The user can set one of the FPGA power levels: 1, 2...10.

Running the Diagnostics

Warning

The Mellanox Innova-2 Flex Open bundle must be installed prior to the diagnostics.

  1. To view the Mellanox Innova-2 Flex Open application options, run:

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    ./innova2_flex_app -help

  2. Run the application:

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    ./innova2_flex_app -v

  3. Check which image is active by reading the Running Image field. If the running image is Mellanox Innova-2 Flex, continue to Step 4. Otherwise, switch to Mellanox Innova-2 Flex Image, as instructed in Switching between Images.

    image2019-2-10_11-54-36.png

  4. Run the required tests or query, by choosing one of the menu options.
    For DDR Stress Test - After selecting DDR Stress Test, the following screen should be shown:

    image2019-2-10_13-5-55.png

    • In case the cyclic test was selected:

      • Press Enter to stop the test.

      • Wait for the test to finalize

      • Once finished, the test will print its result (success/fail)

  5. Set FPGA power diagnostic.

  • In the Burn-Diagnostics menu, select Option 9 - “Increase FPGA power consumption”.

    image2019-2-10_13-24-45.png

  • Upon selecting Option 9, the following menu should appear:

    image2019-2-10_13-25-17.png

  • Choose the one of FPGA power levels. For example, Option 4, “Set FPGA Power level 4”. The following screen should appear:

    image2019-2-10_13-27-39.png

    image2019-2-10_13-29-45.png

JTAG Access to the FPGA

The Mellanox Innova-2 Flex Open Application access to FPGA may interfere with the on-board JTAG access to FPGA. If external JTAG cable access is required (for example, see Burning the FPGA Image through the JTAG) the application must first enable this.

  1. Select the "Enable JTAG Access - no thermal status" in the "Jump-to Innova2-Use" menu, or in the "Burn-Diagnostics" menu.

    image2019-2-10_13-36-50.png

    The FPGA is now disconnected, and you can burn the FPGA image through the JTAG.

  2. After burning, you can connect the FPGA by selecting "Disable JTAG Access - enable Thermal status”, and continue working with the Mellanox Innova-2 Flex Open application.

    image2019-2-10_13-37-38.png

  3. Disconnect the FPGA, and check the status.

    image2019-2-10_13-38-20.png

    The “Disconnect” state is saved when the Mellanox Innova-2 Flex Open application is closed. After running the Mellanox Innova-2 Flex Open application, the system is in “Disconnected” state.

    image2019-2-10_13-39-11.png

  4. Close the application and start burning Flex through the JTAG.

  5. After burning and following the power cycle, open the application and select the “Connect FPGA” option in the "Disconnected" menu.

Warning

Note: The Mellanox Innova-2 Flex Open bundle must be installed prior to the image burning.

The Mellanox Innova-2 Flex Open application and image allow the user to burn an FPGA User Image to the flash through the PCI, and to switch back and forth between the images that run on the FPGA - the Mellanox Innova-2 Flex Image and the User Image. After burning and activating the User Image, the user can return to the Mellanox Innova-2 Flex Image (for diagnostics or PCI-burn).

Running the Burning Flows

  1. To view the Mellanox Innova-2 Flex Open application options:

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    innova2_flex_app -help

  2. To run the application, see the below example:

    • To program two files at flash 0 and flash_1:

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      /innova2_flex_app -b first_file_name.bin,0 second_file_name.bin,1 -v

  3. When the application opens, choose “Burn of customer User image” to burn the image.

  4. During the burning process the application will show progress and a message will indicate once burn is done.

  5. For activating the burned image, see Switching between Images.

image2019-2-10_13-50-5.png

The user can determine which image from the Flash will run on the FPGA.

Warning

In case the FPGA User Image is corrupted and/or does not exist but the user chose to set it as active, the booting action will fail and the FPGA will appear un-programmed after reboot.

  1. Open the application:

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    ./innova2_flex_app -v

  2. In case the Mellanox Innova-2 Flex Image is running, select the “Switch to Innova-2 Flex Image” option in order to move to the Mellanox Innova-2 Flex Image.
    In case User Image or no image is running, choose the “Switch into Innova-2 Flex Image” option in order to move to the Mellanox Innova-2 Flex Image.

Flash Format

The below figure shows the flash format when both the Mellanox Innova-2 Flex Image and User Image are burned on the flash (i.e. when the Mellanox Innova-2 Flex Image is not overwritten).

image2019-2-10_14-1-36.png

Warning

Burning an FPGA image via JTAG should be done from an external server connection. Dropping a PCI link during FPGA burning can cause the server to stall and self-reboot, thereby causing the burning process to fail. When JTAG is connected to an external server, even if the target server stalls, the burning process will complete successfully.

To burn the Flash via Vivado Lab Edition 2017.3:

Warning

If the Mellanox Innova-2 Flex Open Application is running, it may interfere with the JTAG connectivity. See JTAG Access to the FPGA before you connect a JTAG cable.

  1. Go to the following link, and install Vivado Lab Edition 2017.3 - https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/2017-3.html.

  2. Connect the JTAG cable. For information on JTAG connection, see Xilinx Programming Cable.

Warning

Xilinx programming cable is not provided by Mellanox, please contact your Xilinx representative for details.

To add a configuration memory device:

  1. Open Vivado Lab Edition 2017.3.

  2. Click “Open Target” and then “Auto Connect”.

  3. Click on the “Open Hardware Manager.”

  4. On the left corner (Hardware) - make sure you can see 'xcku15p' device.

  5. Right click on the 'xcku15p' and 'Add Configuration Memory Device'.

    image2019-2-10_14-18-26.png

  6. Select the appropriate device (x1_x2_x4 or x1_x2_x4_x8).

    image2019-2-10_14-19-22.png

  7. Choose the BIN file. See Bundle Content and Considerations.

    image2019-2-10_14-21-50.png

  8. Burn the flash.

  9. Run server full power cycle.

Important

Reloading is the customer’s responsibility. Errors can lead to a failure of the Mellanox Innova-2 adapter card, and even to a failure of the server. The link between the FPGA and the PCI switch should be disabled before reloading the FPGA User Image, and enabled after reloading. Two consoles are used: the console where the Innova2_Flex_app is running, and the console for PCI commands.

Procedure Scenario

In order to reload the Mellanox Innova-2 User Image, start the first console, and launch the Innova2_flex_app, as instructed in Running the Mellanox Innova-2 Flex Open Application. The second terminal should be open, as it is used for disabling/enabling the PCI link between the FPGA and the PCI switch.

In the second console:

Step 1. Find the PCI switch in the list of PCI devices.

Step 2. Save the FPGA device PCI configuration registers.

Step 3. Disable the PCI link between the FPGA and the PCI switch.

In the first console:

Step 4. Reload the FPGA User Image.

Move back to the second console:

Step 5. Enable PCI link between FPGA and PCI switch (second console).

Step 6. Copy back the PCI configuration registers (second console).

Finding the PCI Switch

Get the device location on the PCI bus by running the below lspci command, and locating lines with the "Mellanox" string, as instructed in Identify the Card in Your System.

Warning

lspci -v | grep Mellanox

Example:

  • ConnectX5 Device has 3e:00.0 PCI bdf ( [bus:][device.][func] ) address

  • Mellanox Innova-2 FPGA PCI driver (BOPE-driver) has 3d:00.0 PCI bdf address

  • The PCI switch has 3c:08.0 bdf address

    image2019-2-10_17-56-25.png

Disabling/Enabling the PCI Link between the FPGA and the PCI Switch

Disabling example:

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sudo setpci -s 3c:08.0 0x70.w=0x50

Enabling example:

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sudo setpci -s 3c:08.0 0x70.w=0x40

Examples legend:

  • 3c:08.0 is the bdf address of the PCI switch

  • 0x70 is the capability register base address + link control register (0x60+0x10)

  • 0x40 is the last value in this register

  • 0x50 is the last value in this register + disable link bit (0x40 + 0x10)

Reloading the User Image

In the Burn-Diagnostic Menu, select Option 5 - "Reload User image”. The following message will appear:

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"Reload feature may hang up your station if PCI is not disabled!!! Do you want to run this feature? [y/]"

Make sure that the PCI link is disabled, as instructed in Disabling/Enabling the PCI Link between the FPGA and the PCI Switch.

image2019-2-10_18-14-50.png

Enable the PCI link on the second console, as instructed in Disabling/Enabling the PCI Link between the FPGA and the PCI Switch.

© Copyright 2023, NVIDIA. Last updated on May 22, 2023.