18 #ifndef INCLUDED_QSPI_FLASH_H
19 #define INCLUDED_QSPI_FLASH_H
36 #define QSPI_FLASH_MAX_INSTANCES 2
38 #define QSPI_FLASH_MAX_INSTANCES 1
42 #define QSPI_READ_ASYNC_PAGE_SIZE (256 * KB)
47 #define QSPI_READ_ASYNC_PAGE_SIZE_LZF (256 * KB)
50 #define QSPI_FLASH_CMD_REMS 0x90U
51 #define QSPI_FLASH_CMD_RDID 0x9FU
52 #define QSPI_FLASH_CMD_RES 0xABU
53 #define QSPI_FLASH_CMD_RSFDP 0x5AU
55 #define QSPIFLASH_DDR_QUAD_READ_COMMAND 0xeeU
56 #define QSPIFLASH_SDR_QUAD_READ_COMMAND 0xecU
57 #define QSPI_FLASH_WRITE_COMMAND 0x12U
58 #define QSPI_FLASH_SECTOR_ERASE_COMMAND 0xDCU
59 #define QSPI_FLASH_SUB_SECTOR_ERASE_COMMAND 0x21U
61 #define QSPI_FLASH_QUAD_ENABLE 0x02
62 #define QSPI_FLASH_QUAD_DISABLE 0x0
63 #define QSPI_FLASH_WEL_ENABLE 0x02
64 #define QSPI_FLASH_WEL_DISABLE 0x00
65 #define QSPI_FLASH_PROGRAM_ERR (1 << 6)
66 #define QSPI_FLASH_ERASE_ERR (1 << 5)
67 #define QSPI_FLASH_WIP_ENABLE 0x01
68 #define QSPI_FLASH_WIP_ENABLE 0x01
69 #define QSPI_FLASH_WIP_WAIT_TIME 1000
71 #define QSPI_FLASH_CMD_RDSR1 0x5
72 #define QSPI_FLASH_CMD_RDCR 0x35
73 #define QSPI_FLASH_CMD_MODE_RESET 0xFF
74 #define QSPI_FLASH_CMD_WRR 0x1
75 #define QSPI_FLASH_CMD_WRAR 0x71
76 #define QSPI_FLASH_CMD_CLEAR_STATUS 0x82
77 #define QSPI_FLASH_CMD_WRITE_ENABLE 0x06
78 #define QSPI_FLASH_CMD_WRITE_DISABLE 0x04
79 #define QSPI_FLASH_CMD_WRAR_CR1V 0x800002
81 #define QSPI_DEFAULT_DUMMY_CYCLES 0
83 #define QSPI_FLASH_NUM_OF_TRANSFERS 3
84 #define QSPI_FLASH_COMMAND_WIDTH 1
85 #define QSPI_FLASH_ADDRESS_WIDTH 4
86 #define QSPI_FLASH_QSPI_FLASH_DATA_TRANSFER 2
88 #define QSPI_FLASH_MAX_TRANSFER_SIZE(_a) (65536 * 4)
90 #define QSPI_FLASH_MAX_TRANSFER_SIZE(_a) QSPI_FLASH_SIZE(_a)
92 #define QSPI_FLASH_CMD_MODE_VAL 0x0
93 #define QSPI_FLASH_ADDR_DATA_MODE_VAL 0x0
94 #define QSPI_FLASH_CLEAR_STATUS_WAIT_TIME 100
95 #define QSPI_FLASH_WRITE_ENABLE_WAIT_TIME 100
96 #define QSPI_FLASH_WE_RETRY_COUNT 100
98 #define PAGE_WRITE_SIZE 256
101 #define MANUFACTURE_ID_SPANSION 0x01U
102 #define MANUFACTURE_ID_WINBOND 0xEFU
103 #define MANUFACTURE_ID_MICRON 0x20U
104 #define MANUFACTURE_ID_MACRONIX 0xC2U
105 #define DEVICE_ID_LEN 3U
108 #define FLAG_PAGE512 0x01U
109 #define FLAG_QPI 0x02U
110 #define FLAG_QUAD 0x04U
111 #define FLAG_BULK 0x08U
112 #define FLAG_PAGE_SIZE_512 0x10U
113 #define FLAG_DDR 0x20U
114 #define FLAG_UNIFORM 0x40U
115 #define FLAG_PAGE512_FIXED 0x80U
118 #define QSPI_FLASH_SIZE(_a) \
119 ((1 << (_a)->pFlashInfo->SectorSize) * (1 << (_a)->pFlashInfo->SectorCnt))
120 #define QSPI_FLASH_SECTOR_SIZE(_a) (1 << (_a)->pFlashInfo->SectorSize)
121 #define QSPI_FLASH_SECTORS(_a) (1 << (_a)->pFlashInfo->SectorCnt)
122 #define QSPI_FLASH_SUB_SECTOR_SIZE(_a) (1 << (_a)->pFlashInfo->SubSectorSize)
123 #define QSPI_FLASH_SUB_SECTORS(_a) ((_a)->pFlashInfo->SubSectorCnt)
124 #define QSPI_FLASH_SUB_SECTOR_LOC 0
NvU8 MemType
MemType: Memory Type of the flash.
NvU8 Flag
Flag: support feature of the flash (DDR, QPI, BULK)
NvU8 ManufactureID
ManufactureID: Manufacture ID of the flash.
QspiXferStatus_t
Defines the QSPI Transfer status, where completed = 0.
NvU8 SectorCnt
SectorCnt: Number of sectors of the flash (power of 2)
NvU8 SubSectorSize
SubSectorSize: SubSector Size of the flash (power of 2)
Holds QSPI Transfer data.
NvU8 SectorSize
SectorSize: Sector Size of the flash (power of 2)
struct QspiAsyncIOStatus QspiAsyncIOStatus_t
Holds the QSPI Asynchronous transfer descriptor.
QspiFlashInfo_t * pFlashInfo
QSPI flash information.
Holds the QSPI Flash device context.
struct QspiFlashInfo QspiFlashInfo_t
QSPI flash info.
struct QspiFlashDevice QspiFlashDevice
Holds the QSPI Flash device context.
QspiTransfer Transfers[3]
Transfer data structure for
, , .
Holds QSPI hardware controller context data.
QspiControllerData * pControllerData
Describes the QSPI hardware controller-specific data.
QspiXferStatus_t Status
Ongoing or complete.
NvU32 BytesRemaining
Remaining bytes after async transfer is complete.
NvU32 Offset
Offset in QSPI flash that specifies where the async transfer completed.
NvU8 SubSectorCnt
SubSectorCnt: SubSector count of the flash.
Holds the QSPI Asynchronous transfer descriptor.
NVIDIA Quickboot Interface: Error Handling (Parker)
void * Buffer
Buffer address from which transfer can resume.
NVIDIA Quickboot Interface: QSPI Access
QspiAsyncIOStatus_t AsyncStatus
QSPI Asynchronous transfer data.
NvU8 Density
Density: Density of the flash.
NvS8 FlashName[32]
FlashName: Name of the Flash.
NVIDIA Quickboot Interface: Device Drivers
NvU32 Instance
ID of Flash chip connected to QSPI controller.
NvError QbQspiInit(void)
Performs QSPI flash driver initialization.
NvU8 ReadCommand
Command for reading from flash, which depends on the DDR/SDR mode.