nemo_automodel.components.models.qwen3_8_flash_next.cudnn_qsa
nemo_automodel.components.models.qwen3_8_flash_next.cudnn_qsa
cuDNN Frontend indexed QSA training with the model’s existing routes.
Module Contents
Classes
Functions
API
Bases: Function
Own saved FP32 output and LSE for one independent GQA head group.
Return BF16 dQ [T,H,256], dK/dV [T,1,256], and two None entries.
Parameters:
Context holding immutable forward inputs and saved state.
BF16 CUDA upstream gradient [T,H,256]; may be strided.
Returns: torch.Tensor | None
Gradients for the five forward arguments. Discrete indices and
Run forward on contiguous packed Q [T,H,256], K/V [T,1,256].
Parameters:
PyTorch autograd context.
BF16 CUDA query [T,12,256].
BF16 CUDA keys [T,1,256].
BF16 CUDA values [T,1,256].
CUDA int32 selection [T,W], in packed token coordinates.
Finite positive score multiplier.
Returns: torch.Tensor
Independent BF16 CUDA output [T,H,256]. Saves native FP32 output
Load optional public entry points lazily; retain no tensor state.
Translate batch-local QSA IDs to packed coordinates without changing selection.
Parameters:
Signed integer tensor [batch, sequence, width], produced by the model’s compression-ratio-four indexer. Four-slot groups contain distinct complete blocks or a consecutive causal tail and -1 padding.
Physical sequence extent shared by query and K/V.
Returns: torch.Tensor
Independent contiguous int32 tensor [batch * sequence, ceil(width/4)*4].
Evaluate model-produced four-token QSA routes with cuDNN on Blackwell.
Selection is unchanged: this adapter does not run the cuDNN indexer. Each four-slot group must be a distinct complete block or a consecutive causal tail padded with -1, as emitted by the model’s ratio-four indexer. Blocks restart at each packed document origin. Arbitrary/duplicate token sets are not supported by this backend. These device-value invariants are the indexer’s contract, not host-synchronized checks in the attention hot path.
CP with local Q and gathered global K/V is unsupported. First-order backward uses cuDNN FP32 atomic accumulation and is not bitwise deterministic.
Parameters:
BF16 CUDA tensor [batch, sequence, query_heads, 256].
BF16 CUDA tensor [batch, sequence, kv_heads, 256]. Supported (query_heads, kv_heads) are (24,2) and (12,1), matching the published cuDNN Frontend 1.32.1 indexed API.
BF16 CUDA tensor with key’s shape and device. Strided Q/K/V are accepted and copied to contiguous per-KV-head packed buffers.
Int32/int64 CUDA tensor [batch, sequence, width], with 1 <= width <= 2052. IDs address the physical sequence within each batch row; invalid IDs are padding. Packed documents are supported through their existing absolute-within-row route IDs.
Finite positive host scalar; defaults to 1/sqrt(256).
Returns: torch.Tensor
Independent BF16 CUDA output [batch, sequence, query_heads, 256].
Raises:
ValueError: For unsupported shapes, devices, heads, scale or CP layout.TypeError: For non-BF16 compute tensors or unsigned/noninteger routes.RuntimeError: For unsupported GPU or deterministic backward requests.ImportError: When the optional cuDNN Frontend QSA runtime is absent.