1

GND

Ground

Ground

2

PACK_ID1, connected to BlueField-2 NIC_GPIO[47]

Input

See the description above table regarding PACK_ID

Should be connected to the Primary controller NC-SI PACK_ID pins to set the appropriate package ID.

PACK_ID0 should be connected to the endpoint device GPIO associated with Package ID[0]. PACK_ID1 should be associated with Package ID0.

The baseboard should connect to GND or leave floating.

DPU should have a 4.7k PU.

3

RBT_RXD0

Output

Receive data Out 0. Data signals from the network controller to the BMC.

For baseboards, this pin should be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ pull-down resistor to GND on the baseboard between the BMC and the RBT isolator to prevent the signal from floating when no card is installed.

For DPUs, this pin should be connected between the connector and the RBT PHY. External termination is determined by the DPU RBT PHY requirements.

4

RBT_REF_CLK

Input

RBT Reference clock. Synchronous clock reference for receive, transmit, and control interface. The clock should have a typical frequency of 50MHz ±50 ppm.

For baseboards, this pin should be connected between the baseboard NC-SI over RBT PHY and the DPU cable connector. The RBT_REF_CLK should not be driven until 3.3V AUX is present on the DPU. The RBT_REF_CLK should be continuous once it has started. For DPUs, this pin should be connected between the connector and the RBT PHY.  No external termination is required.

50MHz REF CLK for NC-SI BUS

5

RBT_RXD1

Output

Receive Data Out 1. Data signals from the network controller to the BMC.

For baseboards, this pin should be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ pull-down resistor to GND on the baseboard between the BMC and the RBT isolator to prevent the signal from floating when no card is installed.

For DPUs, this pin should be connected between the connector and the RBT PHY. External termination is determined by the DPU RBT PHY requirements.

6

GND

Ground

Ground

7

RBT_CRS_DV

Output

Carrier sense/receive data valid. This signal indicates to the baseboard that the carrier sense/receive data is valid.

For baseboards, this pin should be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ pull-down resistor on the baseboard between the BMC and the RBT isolator to prevent the signal from floating when no DPU is installed.

For DPUs, this pin should be connected between the connector and the RBT PHY.  External termination is determined by the DPU RBT PHY requirements.

8

RBT_ISOLATE_N

Output

Signal used to indicate the SmartNIC has powered and is ready for NC-SI physical layer connection to be present.  When low the baseboard circuitry will isolate the NC-SI connection to the SmartNIC.  When high normal NC-SI RBT connectivity is available.

Baseboards should terminate this with a 47K-100K PD resistor.

SmartNICs should terminate with a 10k PU resistor.

9

GND

Ground

Ground

10

PACK_ID0, connected to BlueField-2 NIC_GPIO[49]

Input

See note above table regarding NC-SI PACK_ID

should be connected to the Primary controller NC-SI PACK_ID pins to set the appropriate package ID.

PACK_ID0 should be connected to the endpoint device GPIO associated with Package ID[0]. PACK_ID1 should be associated with PACK_ID[1].

The baseboard should connect to GND or leave floating.

DPU should have a 4.7k PU.

11

NCSI_TX_EN

Input

Transmit enable.

For baseboards, this pin should be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ pull-down resistor to ground on the baseboard between the RBT isolator and the DPU cable connector to prevent the card-side signals from floating when the RBT signals are isolated. 

For DPUs, this pin should be connected between the connector and the RBT PHY.  External termination is determined by the DPU RBT PHY requirements.

12

GND

Ground

Ground

13

NCSI_TX_D0

Input

Transmit Data In 0.

Data signals from the BMC to the network controller.

For baseboards, this pin should be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ pull down resistor to GND on the baseboard between the RBT isolator and the DPUcable connector to prevent the card-side signals from floating when the RBT signals are isolated.

For DPUs, this pin should be connected between the connector and the RBT PHY.  External termination is determined by the DPU RBT PHY requirements.

14

BMC_RX5

Input

UART transmit serial data input. 3.3V UART TX signal from the baseboard Ground

15

NCSI_TX_D1

Input

Transmit Data In 0. Data signals from the BMC to the network controller.

For baseboards, this pin should be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ pull-down resistor to GND on the baseboard between the RBT isolator and the DPUcable connector to prevent the card-side signals from floating when the RBT signals are isolated.

For DPUs, this pin should be connected between the connector and the RBT PHY.  External termination is determined by the DPU RBT PHY requirements.

16

BMC_TX5

Output

UART transmit serial data output. 3.3V UART TX signal to the baseboard.

17

PRESENCE_N

Presence of SmartNIC

The baseboard should implement a 200 Ω series resistor and 4.7kohm pull-up resistor to 3.3V AUX.

SmartNIC should tie this to GND.

18

GND

Ground

Ground

19

NCSI_ARB_IN

Input

NC-SI hardware arbitration input

If the baseboard supports multiple DPU cards connected to the same RBT interface, it should implement logic that connects the RBT_ARB_IN pin of the first populated DPU card to its RBT_ARB_OUT pin if it is the only card present or to the RBT_ARB_OUT pin of the next populated card and so on sequentially for all cards on the specified RBT bus to ensure the arbitration ring is complete. This logic should bypass slots that are not populated or powered off.

20

NCSI_ARB_OUT

Output

NC-SI hardware arbitration output.

 If the baseboard supports multiple DPU cards connected to the same RBT interface, it should implement logic that connects the RBT_ARB_OUT pin of the first populated DPU card to its RBT_ARB_IN pin if it is the only card present or to the RBT_ARB_IN pin of the next populated card and so on sequentially for all cards on the specified RBT bus to ensure the arbitration ring is complete. This logic should bypass slots that are not populated or powered off.