IRQ Labeling

IRQ IDs are now labeled according to their device functionality.

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To obtain the current devices IRQ mapping:

  1. Enable the debug status:

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    sysctl dev.mce.<N>.conf.debug_stats=1

  2. Dump the IRQ vectors by reading the hw_ctx_debug sysctl:

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    sysctl dev.mce.<N>.hw_ctx_debug

Output Example

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sysctl -n dev.mce.0.hw_ctx_debug pages irq 99 command irq 100 async irq 101 channel 0 rq 131 cq 17 irq 102 channel 0 tc 0 sq 130 cq 16 irq 102 channel 1 rq 134 cq 19 irq 103 channel 1 tc 0 sq 133 cq 18 irq 103 channel 2 rq 137 cq 21 irq 104 channel 2 tc 0 sq 136 cq 20 irq 104 channel 3 rq 140 cq 23 irq 105 channel 3 tc 0 sq 139 cq 22 irq 105 channel 4 rq 143 cq 25 irq 106 channel 4 tc 0 sq 142 cq 24 irq 106 channel 5 rq 146 cq 27 irq 107 channel 5 tc 0 sq 145 cq 26 irq 107 channel 6 rq 149 cq 29 irq 108 channel 6 tc 0 sq 148 cq 28 irq 108 channel 7 rq 152 cq 31 irq 109 channel 7 tc 0 sq 151 cq 30 irq 109 channel 8 rq 155 cq 49 irq 110 channel 8 tc 0 sq 154 cq 48 irq 110 channel 9 rq 158 cq 51 irq 111 channel 9 tc 0 sq 157 cq 50 irq 111 channel 10 rq 161 cq 53 irq 112 channel 10 tc 0 sq 160 cq 52 irq 112 channel 11 rq 164 cq 55 irq 113 channel 11 tc 0 sq 163 cq 54 irq 113

The value after the “irq” keyword indicates which system IRQ vector is used for the given resource. This IRQ value is accepted by utilities such as cpuset(1). At the moment, there are five different resources that use IRQ vector:

  1. Page allocation or free interrupts

  2. Command interrupts

  3. Asynchronous event interrupts

  4. Transmit ring completion interrupts

  5. Receive ring completion interrupt

© Copyright 2023, NVIDIA. Last updated on May 24, 2023.