2.20. dcgmDeviceTopology_v1 Struct Reference

[Structure definitions]

Device topology information

Public Variables

unsignedlong  cpuAffinityMask[DCGM_AFFINITY_BITMASK_ARRAY_SIZE]
unsigned int  gpuId
gpuId to which the path represents
unsigned int  localNvLinkIds
unsigned int  numGpus
number of valid entries in gpuPaths
dcgmGpuTopologyLevel_t path
unsigned int  version
version number (dcgmDeviceTopology_version)


unsignedlong dcgmDeviceTopology_v1::cpuAffinityMask[DCGM_AFFINITY_BITMASK_ARRAY_SIZE] [inherited]

affinity mask for the specified GPU a 1 represents affinity to the CPU in that bit position supports up to 256 cores

unsigned int dcgmDeviceTopology_v1::gpuId [inherited]

gpuId to which the path represents

unsigned int dcgmDeviceTopology_v1::localNvLinkIds [inherited]

bits representing the local links connected to gpuId e.g. if this field == 3, links 0 and 1 are connected, field is only valid if NVLINKS actually exist between GPUs

unsigned int dcgmDeviceTopology_v1::numGpus [inherited]

number of valid entries in gpuPaths

dcgmGpuTopologyLevel_tdcgmDeviceTopology_v1::path [inherited]

path to the gpuId from this GPU. Note that this is a bit-mask of DCGM_TOPOLOGY_* values and can contain both PCIe topology and NvLink topology where applicable. For instance: 0x210 = DCGM_TOPOLOGY_CPU | DCGM_TOPOLOGY_NVLINK2 Use the macros DCGM_TOPOLOGY_PATH_NVLINK and DCGM_TOPOLOGY_PATH_PCI to mask the NvLink and PCI paths, respectively.

unsigned int dcgmDeviceTopology_v1::version [inherited]

version number (dcgmDeviceTopology_version)