NVML API Reference Guide (PDF) - vR590 (older) - Last updated December 04, 2025 - Send Feedback

5.2. Device Enums

Classes

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Defines

#define MAX_CLK_DOMAINS 32
Maximum number of clock domains.
#define NVML_ADAPTIVE_CLOCKING_INFO_STATUS_DISABLED 0x00000000
Adaptive clocking is disabled.
#define NVML_ADAPTIVE_CLOCKING_INFO_STATUS_ENABLED 0x00000001
Adaptive clocking is enabled.
#define NVML_BUS_TYPE_AGP 4
AGP bus.
#define NVML_BUS_TYPE_FPCI 3
FPCI bus.
#define NVML_BUS_TYPE_PCI 1
PCI bus.
#define NVML_BUS_TYPE_PCIE 2
PCI-Express bus.
#define NVML_BUS_TYPE_UNKNOWN 0
Unknown bus type.
#define NVML_DEVICE_ARCH_ADA 8
Devices based on the NVIDIA Ada architecture.
#define NVML_DEVICE_ARCH_AMPERE 7
Devices based on the NVIDIA Ampere architecture.
#define NVML_DEVICE_ARCH_BLACKWELL 10
Devices based on the NVIDIA Blackwell architecture.
#define NVML_DEVICE_ARCH_HOPPER 9
Devices based on the NVIDIA Hopper architecture.
#define NVML_DEVICE_ARCH_KEPLER 2
Devices based on the NVIDIA Kepler architecture.
#define NVML_DEVICE_ARCH_MAXWELL 3
Devices based on the NVIDIA Maxwell architecture.
#define NVML_DEVICE_ARCH_PASCAL 4
Devices based on the NVIDIA Pascal architecture.
#define NVML_DEVICE_ARCH_TURING 6
Devices based on the NVIDIA Turing architecture.
#define NVML_DEVICE_ARCH_UNKNOWN 0xffffffff
Anything else, presumably something newer.
#define NVML_DEVICE_ARCH_VOLTA 5
Devices based on the NVIDIA Volta architecture.
#define NVML_DEVICE_HOSTNAME_BUFFER_SIZE 64
Buffer size for hostname string.
#define NVML_DOUBLE_BIT_ECC
Deprecated double bit ECC error. See NVML_MEMORY_ERROR_TYPE_UNCORRECTED.
#define NVML_FAN_POLICY_MANUAL 1
Manual fan control policy.
#define NVML_FAN_POLICY_TEMPERATURE_CONTINOUS_SW 0
Temperature-controlled fan policy.
#define NVML_GSP_FIRMWARE_VERSION_BUF_SIZE 0x40
Buffer size for GSP firmware version string.
#define NVML_MAX_GPU_PERF_PSTATES 16
Maximum number of GPU performance states.
#define NVML_MAX_GPU_UTILIZATIONS 8
Maximum number of GPU utilization domains.
#define NVML_PCIE_ATOMICS_CAP_CAS128 0x40
128-bit compare and swap.
#define NVML_PCIE_ATOMICS_CAP_CAS32 0x10
32-bit compare and swap.
#define NVML_PCIE_ATOMICS_CAP_CAS64 0x20
64-bit compare and swap.
#define NVML_PCIE_ATOMICS_CAP_FETCHADD32 0x01
32-bit fetch and add.
#define NVML_PCIE_ATOMICS_CAP_FETCHADD64 0x02
64-bit fetch and add.
#define NVML_PCIE_ATOMICS_CAP_SWAP32 0x04
32-bit swap.
#define NVML_PCIE_ATOMICS_CAP_SWAP64 0x08
64-bit swap.
#define NVML_PCIE_ATOMICS_OPS_MAX 7
Maximum number of PCIe atomics operations.
#define NVML_PCIE_LINK_MAX_SPEED_16000MBPS 0x00000004
16000 MB/s PCIe link speed.
#define NVML_PCIE_LINK_MAX_SPEED_2500MBPS 0x00000001
2500 MB/s PCIe link speed.
#define NVML_PCIE_LINK_MAX_SPEED_32000MBPS 0x00000005
32000 MB/s PCIe link speed.
#define NVML_PCIE_LINK_MAX_SPEED_5000MBPS 0x00000002
5000 MB/s PCIe link speed.
#define NVML_PCIE_LINK_MAX_SPEED_64000MBPS 0x00000006
64000 MB/s PCIe link speed.
#define NVML_PCIE_LINK_MAX_SPEED_8000MBPS 0x00000003
8000 MB/s PCIe link speed.
#define NVML_PCIE_LINK_MAX_SPEED_INVALID 0x00000000
Invalid PCIe link speed.
#define NVML_PERF_MODES_BUFFER_SIZE 2048
Buffer size for performance modes strings.
#define NVML_POWER_MIZER_MODE_ADAPTIVE 0
adjust GPU clocks based on GPU utilization
#define NVML_POWER_MIZER_MODE_AUTO 2
PowerMizer mode is driver controlled.
#define NVML_POWER_MIZER_MODE_PREFER_CONSISTENT_PERFORMANCE 3
lock to GPU base clocks
#define NVML_POWER_MIZER_MODE_PREFER_MAXIMUM_PERFORMANCE 1
to the extent that thermal and other constraints allow
#define NVML_POWER_SCOPE_GPU 0U
Targets only GPU.
#define NVML_POWER_SCOPE_MEMORY 2U
Targets the GPU Memory.
#define NVML_POWER_SCOPE_MODULE 1U
Targets the whole module.
#define NVML_POWER_SOURCE_AC 0x00000000
AC power source.
#define NVML_POWER_SOURCE_BATTERY 0x00000001
Battery power source.
#define NVML_POWER_SOURCE_UNDERSIZED 0x00000002
Undersized power source.
#define NVML_RUSD_POLL_ALL 0xFFFFFFFFFFFFFFFF
Enable RUSD polling on all groups.
#define NVML_RUSD_POLL_CLOCK 0x1
Enable RUSD polling on clock group.
#define NVML_RUSD_POLL_FAN 0x40
Enable RUSD polling on fan group.
#define NVML_RUSD_POLL_MEMORY 0x4
Enable RUSD polling on memory group.
#define NVML_RUSD_POLL_NONE 0x0
Disable RUSD polling on all metric groups.
#define NVML_RUSD_POLL_PCI 0x20
Enable RUSD polling on pci group.
#define NVML_RUSD_POLL_PERF 0x2
Enable RUSD polling on performance group.
#define NVML_RUSD_POLL_POWER 0x8
Enable RUSD polling on power group.
#define NVML_RUSD_POLL_PROC_UTIL 0x80
Enable RUSD polling on process utilization group.
#define NVML_RUSD_POLL_THERMAL 0x10
Enable RUSD polling on thermal group.
#define NVML_SINGLE_BIT_ECC
Deprecated single bit ECC error. See NVML_MEMORY_ERROR_TYPE_CORRECTED.
#define nvmlClockOffset_v1
Version macro for nvmlClockOffset_v1_t.
#define nvmlDeviceCurrentClockFreqs_v1
Version macro for nvmlDeviceCurrentClockFreqs_v1_t.
#define nvmlDevicePerfModes_v1
Version macro for nvmlDevicePerfModes_v1_t.
#define nvmlDramEncryptionInfo_v1
Version macro for nvmlDramEncryptionInfo_v1_t.
#define nvmlEccBitType_t nvmlMemoryErrorType_t
Deprecated ECC bit type. See nvmlMemoryErrorType_t.
#define nvmlEccSramErrorStatus_v1
Version macro for nvmlEccSramErrorStatus_v1_t.
#define nvmlEccSramUniqueUncorrectedErrorCounts_v1
Version macro for nvmlEccSramUniqueUncorrectedErrorCounts_v1_t.
#define nvmlFanSpeedInfo_v1
Version macro for nvmlFanSpeedInfo_v1_t.
#define nvmlFlagDefault 0x00
Generic flag used to specify the default behavior of some functions. See description of particular functions for details.
#define nvmlFlagForce 0x01
Generic flag used to force some behavior. See description of particular functions for details.
#define nvmlMarginTemperature_v1
Version macro for nvmlMarginTemperature_v1_t.
#define nvmlPlatformInfo_v1
Version macro for nvmlPlatformInfo_v1_t.
#define nvmlPlatformInfo_v2
Version macro for nvmlPlatformInfo_v2_t.
#define nvmlPowerValue_v2
Version macro for nvmlPowerValue_v2_t.
#define nvmlRusdSettings_v1
Version macro for nvmlRusdSettings_v1_t.

Enumerations

enum nvmlBrandType_t
enum nvmlClockId_t
enum nvmlClockType_t
enum nvmlComputeMode_t
enum nvmlDriverModel_t
enum nvmlEccCounterType_t
enum nvmlEnableState_t
enum nvmlGpuOperationMode_t
enum nvmlGpuUtilizationDomainId_t
enum nvmlInforomObject_t
enum nvmlMemoryErrorType_t
enum nvmlMemoryLocation_t
enum nvmlNvlinkVersion_t
enum nvmlPageRetirementCause_t
enum nvmlPstates_t
enum nvmlRestrictedAPI_t
enum nvmlReturn_t
enum nvmlTemperatureSensors_t
enum nvmlTemperatureThresholds_t

Defines

#define MAX_CLK_DOMAINS 32

Max Clock Monitors available

#define NVML_ADAPTIVE_CLOCKING_INFO_STATUS_DISABLED 0x00000000

Adaptive clocking status

#define NVML_ADAPTIVE_CLOCKING_INFO_STATUS_ENABLED 0x00000001

#define NVML_BUS_TYPE_AGP 4

#define NVML_BUS_TYPE_FPCI 3

#define NVML_BUS_TYPE_PCI 1

#define NVML_BUS_TYPE_PCIE 2

#define NVML_BUS_TYPE_UNKNOWN 0

PCI bus types

#define NVML_DEVICE_ARCH_ADA 8

#define NVML_DEVICE_ARCH_AMPERE 7

#define NVML_DEVICE_ARCH_BLACKWELL 10

#define NVML_DEVICE_ARCH_HOPPER 9

#define NVML_DEVICE_ARCH_KEPLER 2

Simplified chip architecture

#define NVML_DEVICE_ARCH_MAXWELL 3

#define NVML_DEVICE_ARCH_PASCAL 4

#define NVML_DEVICE_ARCH_TURING 6

#define NVML_DEVICE_ARCH_UNKNOWN 0xffffffff

#define NVML_DEVICE_ARCH_VOLTA 5

#define NVML_DEVICE_HOSTNAME_BUFFER_SIZE 64

Structure to store hostname information

#define NVML_DOUBLE_BIT_ECC
Deprecated

Mapped to NVML_MEMORY_ERROR_TYPE_UNCORRECTED

Double bit ECC errors

Value

NVML_MEMORY_ERROR_TYPE_UNCORRECTED

#define NVML_FAN_POLICY_MANUAL 1

#define NVML_FAN_POLICY_TEMPERATURE_CONTINOUS_SW 0

Device Power Modes Device Fan control policy

#define NVML_GSP_FIRMWARE_VERSION_BUF_SIZE 0x40

GSP firmware

#define NVML_MAX_GPU_PERF_PSTATES 16

#define NVML_MAX_GPU_UTILIZATIONS 8

#define NVML_PCIE_ATOMICS_CAP_CAS128 0x40

#define NVML_PCIE_ATOMICS_CAP_CAS32 0x10

#define NVML_PCIE_ATOMICS_CAP_CAS64 0x20

#define NVML_PCIE_ATOMICS_CAP_FETCHADD32 0x01

#define NVML_PCIE_ATOMICS_CAP_FETCHADD64 0x02

#define NVML_PCIE_ATOMICS_CAP_SWAP32 0x04

#define NVML_PCIE_ATOMICS_CAP_SWAP64 0x08

#define NVML_PCIE_ATOMICS_OPS_MAX 7

#define NVML_PCIE_LINK_MAX_SPEED_16000MBPS 0x00000004

#define NVML_PCIE_LINK_MAX_SPEED_2500MBPS 0x00000001

#define NVML_PCIE_LINK_MAX_SPEED_32000MBPS 0x00000005

#define NVML_PCIE_LINK_MAX_SPEED_5000MBPS 0x00000002

#define NVML_PCIE_LINK_MAX_SPEED_64000MBPS 0x00000006

#define NVML_PCIE_LINK_MAX_SPEED_8000MBPS 0x00000003

#define NVML_PCIE_LINK_MAX_SPEED_INVALID 0x00000000

Device PCIE link Max Speed

#define NVML_PERF_MODES_BUFFER_SIZE 2048

#define NVML_POWER_MIZER_MODE_ADAPTIVE 0

Device powerMizer modes

#define NVML_POWER_MIZER_MODE_AUTO 2

#define NVML_POWER_MIZER_MODE_PREFER_CONSISTENT_PERFORMANCE 3

#define NVML_POWER_MIZER_MODE_PREFER_MAXIMUM_PERFORMANCE 1

raise GPU clocks to favor maximum performance,

#define NVML_POWER_SCOPE_GPU 0U

Device Scope - This is useful to retrieve the telemetry at GPU and module (e.g. GPU + CPU) level

#define NVML_POWER_SCOPE_MEMORY 2U

#define NVML_POWER_SCOPE_MODULE 1U

#define NVML_POWER_SOURCE_AC 0x00000000

Device Power Source

#define NVML_POWER_SOURCE_BATTERY 0x00000001

#define NVML_POWER_SOURCE_UNDERSIZED 0x00000002

#define NVML_RUSD_POLL_ALL 0xFFFFFFFFFFFFFFFF

#define NVML_RUSD_POLL_CLOCK 0x1

#define NVML_RUSD_POLL_FAN 0x40

#define NVML_RUSD_POLL_MEMORY 0x4

#define NVML_RUSD_POLL_NONE 0x0

#define NVML_RUSD_POLL_PCI 0x20

#define NVML_RUSD_POLL_PERF 0x2

#define NVML_RUSD_POLL_POWER 0x8

#define NVML_RUSD_POLL_PROC_UTIL 0x80

#define NVML_RUSD_POLL_THERMAL 0x10

#define NVML_SINGLE_BIT_ECC
Deprecated

Mapped to NVML_MEMORY_ERROR_TYPE_CORRECTED

Single bit ECC errors

Value

NVML_MEMORY_ERROR_TYPE_CORRECTED

#define nvmlClockOffset_v1

Value

NVML_STRUCT_VERSION(ClockOffset, 1)

#define nvmlDeviceCurrentClockFreqs_v1

Value

NVML_STRUCT_VERSION(DeviceCurrentClockFreqs, 1)

#define nvmlDevicePerfModes_v1

Value

NVML_STRUCT_VERSION(DevicePerfModes, 1)

#define nvmlDramEncryptionInfo_v1

Value

NVML_STRUCT_VERSION(DramEncryptionInfo, 1)

#define nvmlEccBitType_t nvmlMemoryErrorType_t
Deprecated

See nvmlMemoryErrorType_t for a more flexible type

ECC bit types.

#define nvmlEccSramErrorStatus_v1

Value

NVML_STRUCT_VERSION(EccSramErrorStatus, 1)

#define nvmlEccSramUniqueUncorrectedErrorCounts_v1

Value

NVML_STRUCT_VERSION(EccSramUniqueUncorrectedErrorCounts, 1)

#define nvmlFanSpeedInfo_v1

Value

NVML_STRUCT_VERSION(FanSpeedInfo, 1)

#define nvmlFlagDefault 0x00

Default flag.

#define nvmlFlagForce 0x01

Force flag.

#define nvmlMarginTemperature_v1

Value

NVML_STRUCT_VERSION(MarginTemperature, 1)

#define nvmlPlatformInfo_v1

Value

NVML_STRUCT_VERSION(PlatformInfo, 1)

#define nvmlPlatformInfo_v2

Value

NVML_STRUCT_VERSION(PlatformInfo, 2)

#define nvmlPowerValue_v2

Value

NVML_STRUCT_VERSION(PowerValue, 2)

#define nvmlRusdSettings_v1

Value

NVML_STRUCT_VERSION(RusdSettings, 1)

Enumerations

enum nvmlBrandType_t

* The Brand of the GPU

Values
NVML_BRAND_UNKNOWN = 0
NVML_BRAND_QUADRO = 1
NVML_BRAND_TESLA = 2
NVML_BRAND_NVS = 3
NVML_BRAND_GRID = 4
NVML_BRAND_GEFORCE = 5
NVML_BRAND_TITAN = 6
NVML_BRAND_NVIDIA_VAPPS = 7
NVML_BRAND_NVIDIA_VPC = 8
NVML_BRAND_NVIDIA_VCS = 9
NVML_BRAND_NVIDIA_VWS = 10
NVML_BRAND_NVIDIA_CLOUD_GAMING = 11
NVML_BRAND_NVIDIA_VGAMING = NVML_BRAND_NVIDIA_CLOUD_GAMING
NVML_BRAND_QUADRO_RTX = 12
NVML_BRAND_NVIDIA_RTX = 13
NVML_BRAND_NVIDIA = 14
NVML_BRAND_GEFORCE_RTX = 15
NVML_BRAND_TITAN_RTX = 16
NVML_BRAND_COUNT = 18
enum nvmlClockId_t

Clock Ids. These are used in combination with nvmlClockType_t to specify a single clock value.

Values
NVML_CLOCK_ID_CURRENT = 0
Current actual clock value.
NVML_CLOCK_ID_APP_CLOCK_TARGET = 1
Target application clock. Deprecated, do not use.
NVML_CLOCK_ID_APP_CLOCK_DEFAULT = 2
Default application clock target Deprecated, do not use.
NVML_CLOCK_ID_CUSTOMER_BOOST_MAX = 3
OEM-defined maximum clock rate.
NVML_CLOCK_ID_COUNT
Count of Clock Ids.
enum nvmlClockType_t

Clock types.

All speeds are in Mhz.

Values
NVML_CLOCK_GRAPHICS = 0
Graphics clock domain.
NVML_CLOCK_SM = 1
SM clock domain.
NVML_CLOCK_MEM = 2
Memory clock domain.
NVML_CLOCK_VIDEO = 3
Video encoder/decoder clock domain.
NVML_CLOCK_COUNT
Count of clock types.
enum nvmlComputeMode_t

Compute mode.

NVML_COMPUTEMODE_EXCLUSIVE_PROCESS was added in CUDA 4.0. Earlier CUDA versions supported a single exclusive mode, which is equivalent to NVML_COMPUTEMODE_EXCLUSIVE_THREAD in CUDA 4.0 and beyond.

Values
NVML_COMPUTEMODE_DEFAULT = 0
Default compute mode -- multiple contexts per device.
NVML_COMPUTEMODE_EXCLUSIVE_THREAD = 1
Support Removed.
NVML_COMPUTEMODE_PROHIBITED = 2
Compute-prohibited mode -- no contexts per device.
NVML_COMPUTEMODE_EXCLUSIVE_PROCESS = 3
Compute-exclusive-process mode -- only one context per device, usable from multiple threads at a time.
NVML_COMPUTEMODE_COUNT
enum nvmlDriverModel_t

Driver models.

Windows only.

Values
NVML_DRIVER_WDDM = 0
WDDM driver model -- GPU treated as a display device.
NVML_DRIVER_WDM = 1
WDM (TCC) model (deprecated) -- GPU treated as a generic compute device.
NVML_DRIVER_MCDM = 2
MCDM driver model -- GPU treated as a Microsoft compute device.
enum nvmlEccCounterType_t

ECC counter types.

Note: Volatile counts are reset each time the driver loads. On Windows this is once per boot. On Linux this can be more frequent. On Linux the driver unloads when no active clients exist. If persistence mode is enabled or there is always a driver client active (e.g. X11), then Linux also sees per-boot behavior. If not, volatile counts are reset each time a compute app is run.

Values
NVML_VOLATILE_ECC = 0
Volatile counts are reset each time the driver loads.
NVML_AGGREGATE_ECC = 1
Aggregate counts persist across reboots (i.e. for the lifetime of the device).
NVML_ECC_COUNTER_TYPE_COUNT
Count of memory counter types.
enum nvmlEnableState_t

Generic enable/disable enum.

Values
NVML_FEATURE_DISABLED = 0
Feature disabled.
NVML_FEATURE_ENABLED = 1
Feature enabled.
enum nvmlGpuOperationMode_t

GPU Operation Mode

GOM allows to reduce power usage and optimize GPU throughput by disabling GPU features.

Each GOM is designed to meet specific user needs.

Values
NVML_GOM_ALL_ON = 0
Everything is enabled and running at full speed.
NVML_GOM_COMPUTE = 1
Designed for running only compute tasks. Graphics operations are not allowed
NVML_GOM_LOW_DP = 2
Designed for running graphics applications that don't require high bandwidth double precision
enum nvmlGpuUtilizationDomainId_t

Represents the GPU utilization domains

Values
NVML_GPU_UTILIZATION_DOMAIN_GPU = 0
Graphics engine domain.
NVML_GPU_UTILIZATION_DOMAIN_FB = 1
Frame buffer domain.
NVML_GPU_UTILIZATION_DOMAIN_VID = 2
Video engine domain.
NVML_GPU_UTILIZATION_DOMAIN_BUS = 3
Bus interface domain.
enum nvmlInforomObject_t

Available infoROM objects.

Values
NVML_INFOROM_OEM = 0
An object defined by OEM.
NVML_INFOROM_ECC = 1
The ECC object determining the level of ECC support.
NVML_INFOROM_POWER = 2
The power management object.
NVML_INFOROM_DEN = 3
DRAM Encryption object.
NVML_INFOROM_COUNT
This counts the number of infoROM objects the driver knows about.
enum nvmlMemoryErrorType_t

Memory error types

Values
NVML_MEMORY_ERROR_TYPE_CORRECTED = 0
A memory error that was correctedFor ECC errors, these are single bit errors For Texture memory, these are errors fixed by resend
NVML_MEMORY_ERROR_TYPE_UNCORRECTED = 1
A memory error that was not correctedFor ECC errors, these are double bit errors For Texture memory, these are errors where the resend fails
NVML_MEMORY_ERROR_TYPE_COUNT
Count of memory error types.
enum nvmlMemoryLocation_t

See nvmlDeviceGetMemoryErrorCounter

Values
NVML_MEMORY_LOCATION_L1_CACHE = 0
GPU L1 Cache.
NVML_MEMORY_LOCATION_L2_CACHE = 1
GPU L2 Cache.
NVML_MEMORY_LOCATION_DRAM = 2
Turing+ DRAM.
NVML_MEMORY_LOCATION_DEVICE_MEMORY = 2
GPU Device Memory.
NVML_MEMORY_LOCATION_REGISTER_FILE = 3
GPU Register File.
NVML_MEMORY_LOCATION_TEXTURE_MEMORY = 4
GPU Texture Memory.
NVML_MEMORY_LOCATION_TEXTURE_SHM = 5
Shared memory.
NVML_MEMORY_LOCATION_CBU = 6
CBU.
NVML_MEMORY_LOCATION_SRAM = 7
Turing+ SRAM.
NVML_MEMORY_LOCATION_COUNT
This counts the number of memory locations the driver knows about.
enum nvmlNvlinkVersion_t

Represents Nvlink Version

Values
NVML_NVLINK_VERSION_INVALID = 0
NVML_NVLINK_VERSION_1_0 = 1
NVML_NVLINK_VERSION_2_0 = 2
NVML_NVLINK_VERSION_2_2 = 3
NVML_NVLINK_VERSION_3_0 = 4
NVML_NVLINK_VERSION_3_1 = 5
NVML_NVLINK_VERSION_4_0 = 6
NVML_NVLINK_VERSION_5_0 = 7
enum nvmlPageRetirementCause_t

Causes for page retirement

Values
NVML_PAGE_RETIREMENT_CAUSE_MULTIPLE_SINGLE_BIT_ECC_ERRORS = 0
Page was retired due to multiple single bit ECC error.
NVML_PAGE_RETIREMENT_CAUSE_DOUBLE_BIT_ECC_ERROR = 1
Page was retired due to double bit ECC error.
NVML_PAGE_RETIREMENT_CAUSE_COUNT
enum nvmlPstates_t

Allowed PStates.

Values
NVML_PSTATE_0 = 0
Performance state 0 -- Maximum Performance.
NVML_PSTATE_1 = 1
Performance state 1.
NVML_PSTATE_2 = 2
Performance state 2.
NVML_PSTATE_3 = 3
Performance state 3.
NVML_PSTATE_4 = 4
Performance state 4.
NVML_PSTATE_5 = 5
Performance state 5.
NVML_PSTATE_6 = 6
Performance state 6.
NVML_PSTATE_7 = 7
Performance state 7.
NVML_PSTATE_8 = 8
Performance state 8.
NVML_PSTATE_9 = 9
Performance state 9.
NVML_PSTATE_10 = 10
Performance state 10.
NVML_PSTATE_11 = 11
Performance state 11.
NVML_PSTATE_12 = 12
Performance state 12.
NVML_PSTATE_13 = 13
Performance state 13.
NVML_PSTATE_14 = 14
Performance state 14.
NVML_PSTATE_15 = 15
Performance state 15 -- Minimum Performance.
NVML_PSTATE_UNKNOWN = 32
Unknown performance state.
enum nvmlRestrictedAPI_t

API types that allow changes to default permission restrictions

Values
NVML_RESTRICTED_API_SET_APPLICATION_CLOCKS = 0
APIs that change application clocks, see nvmlDeviceSetApplicationsClocks and see nvmlDeviceResetApplicationsClocks. Deprecated, keeping definition for backward compatibility.
NVML_RESTRICTED_API_SET_AUTO_BOOSTED_CLOCKS = 1
APIs that enable/disable Auto Boosted clocks see nvmlDeviceSetAutoBoostedClocksEnabled
NVML_RESTRICTED_API_COUNT
enum nvmlReturn_t

Return values for NVML API calls.

Values
NVML_SUCCESS = 0
The operation was successful.
NVML_ERROR_UNINITIALIZED = 1
NVML was not first initialized with nvmlInit().
NVML_ERROR_INVALID_ARGUMENT = 2
A supplied argument is invalid.
NVML_ERROR_NOT_SUPPORTED = 3
The requested operation is not available on target device.
NVML_ERROR_NO_PERMISSION = 4
The current user does not have permission for operation.
NVML_ERROR_ALREADY_INITIALIZED = 5
Deprecated: Multiple initializations are now allowed through ref counting.
NVML_ERROR_NOT_FOUND = 6
A query to find an object was unsuccessful.
NVML_ERROR_INSUFFICIENT_SIZE = 7
An input argument is not large enough.
NVML_ERROR_INSUFFICIENT_POWER = 8
A device's external power cables are not properly attached.
NVML_ERROR_DRIVER_NOT_LOADED = 9
NVIDIA driver is not loaded.
NVML_ERROR_TIMEOUT = 10
User provided timeout passed.
NVML_ERROR_IRQ_ISSUE = 11
NVIDIA Kernel detected an interrupt issue with a GPU.
NVML_ERROR_LIBRARY_NOT_FOUND = 12
NVML Shared Library couldn't be found or loaded.
NVML_ERROR_FUNCTION_NOT_FOUND = 13
Local version of NVML doesn't implement this function.
NVML_ERROR_CORRUPTED_INFOROM = 14
infoROM is corrupted
NVML_ERROR_GPU_IS_LOST = 15
The GPU has fallen off the bus or has otherwise become inaccessible.
NVML_ERROR_RESET_REQUIRED = 16
The GPU requires a reset before it can be used again.
NVML_ERROR_OPERATING_SYSTEM = 17
The GPU control device has been blocked by the operating system/cgroups.
NVML_ERROR_LIB_RM_VERSION_MISMATCH = 18
RM detects a driver/library version mismatch.
NVML_ERROR_IN_USE = 19
An operation cannot be performed because the GPU is currently in use.
NVML_ERROR_MEMORY = 20
Insufficient memory.
NVML_ERROR_NO_DATA = 21
No data.
NVML_ERROR_VGPU_ECC_NOT_SUPPORTED = 22
The requested vgpu operation is not available on target device, becasue ECC is enabled.
NVML_ERROR_INSUFFICIENT_RESOURCES = 23
Ran out of critical resources, other than memory.
NVML_ERROR_FREQ_NOT_SUPPORTED = 24
Ran out of critical resources, other than memory.
NVML_ERROR_ARGUMENT_VERSION_MISMATCH = 25
The provided version is invalid/unsupported.
NVML_ERROR_DEPRECATED = 26
The requested functionality has been deprecated.
NVML_ERROR_NOT_READY = 27
The system is not ready for the request.
NVML_ERROR_GPU_NOT_FOUND = 28
No GPUs were found.
NVML_ERROR_INVALID_STATE = 29
Resource not in correct state to perform requested operation.
NVML_ERROR_RESET_TYPE_NOT_SUPPORTED = 30
Reset not supported for given device/parameters.
NVML_ERROR_UNKNOWN = 999
An internal driver error occurred.
enum nvmlTemperatureSensors_t

Temperature sensors.

Values
NVML_TEMPERATURE_GPU = 0
Temperature sensor for the GPU die.
NVML_TEMPERATURE_COUNT
enum nvmlTemperatureThresholds_t

Temperature thresholds.

Values
NVML_TEMPERATURE_THRESHOLD_SHUTDOWN = 0
NVML_TEMPERATURE_THRESHOLD_SLOWDOWN = 1
NVML_TEMPERATURE_THRESHOLD_MEM_MAX = 2
NVML_TEMPERATURE_THRESHOLD_GPU_MAX = 3
NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_MIN = 4
NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_CURR = 5
NVML_TEMPERATURE_THRESHOLD_ACOUSTIC_MAX = 6
NVML_TEMPERATURE_THRESHOLD_GPS_CURR = 7
NVML_TEMPERATURE_THRESHOLD_COUNT
NVML API Reference Guide (PDF) - vR590 (older) - Last updated December 04, 2025 - Send Feedback