4.3. Field Value Enums
Classes
Defines
- #define NVML_FI_DEV_C2C_LINK_COUNT 170
- Number of C2C Links present on the device.
- #define NVML_FI_DEV_C2C_LINK_ERROR_INTR 231
- C2C Link CRC Error Counter.
- #define NVML_FI_DEV_C2C_LINK_ERROR_REPLAY 232
- C2C Link Replay Error Counter.
- #define NVML_FI_DEV_C2C_LINK_ERROR_REPLAY_B2B 233
- C2C Link Back to Back Replay Error Counter.
- #define NVML_FI_DEV_C2C_LINK_GET_MAX_BW 172
- C2C Link Speed in MBps for active links.
- #define NVML_FI_DEV_C2C_LINK_GET_STATUS 171
- C2C Link Status 0=INACTIVE 1=ACTIVE.
- #define NVML_FI_DEV_C2C_LINK_POWER_STATE 234
- C2C Link Power state. See NVML_C2C_POWER_STATE_*.
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_HW_POWER_BRAKE_SLOWDOWN 253
- Throttling due to external power brake assertion trigger (reducing core clocks by a factor of 2 or more) in ns.
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_HW_THERM_SLOWDOWN 252
- Throttling due to temperature being too high (reducing core clocks by a factor of 2 or more) in ns.
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_SW_POWER_CAP
- Throttling to not exceed currently set power limits in ns.
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_SW_THERM_SLOWDOWN 251
- Throttling to ensure ((GPU temp < GPU Max Operating Temp) && (Memory Temp < Memory Max Operating Temp)) in ns.
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_SYNC_BOOST
- Throttling to match minimum possible clock across Sync Boost Group in ns.
- #define NVML_FI_DEV_DRAIN_AND_RESET_STATUS 227
- Deprecated, do not use (use NVML_FI_DEV_GET_GPU_RECOVERY_ACTION instead).
- #define NVML_FI_DEV_ECC_CURRENT 1
- Current ECC mode. 1=Active. 0=Inactive.
- #define NVML_FI_DEV_ECC_DBE_AGG_CBU 28
- CBU double bit aggregate ECC errors.
- #define NVML_FI_DEV_ECC_DBE_AGG_DEV 23
- Device memory double bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_DBE_AGG_L1 19
- L1 cache double bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_DBE_AGG_L2 21
- L2 cache double bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_DBE_AGG_REG 25
- Register File double bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_DBE_AGG_TEX 27
- Texture memory double bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_DBE_AGG_TOTAL 6
- Total double bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_DBE_VOL_CBU 17
- CBU double bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_DBE_VOL_DEV 12
- Device memory double bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_DBE_VOL_L1 8
- L1 cache double bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_DBE_VOL_L2 10
- L2 cache double bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_DBE_VOL_REG 14
- Register file double bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_DBE_VOL_TEX 16
- Texture memory double bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_DBE_VOL_TOTAL 4
- Total double bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_PENDING 2
- Pending ECC mode. 1=Active. 0=Inactive.
- #define NVML_FI_DEV_ECC_SBE_AGG_DEV 22
- Device memory single bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_SBE_AGG_L1 18
- L1 cache single bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_SBE_AGG_L2 20
- L2 cache single bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_SBE_AGG_REG 24
- Register File single bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_SBE_AGG_TEX 26
- Texture memory single bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_SBE_AGG_TOTAL 5
- Total single bit aggregate (persistent) ECC errors.
- #define NVML_FI_DEV_ECC_SBE_VOL_DEV 11
- Device memory single bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_SBE_VOL_L1 7
- L1 cache single bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_SBE_VOL_L2 9
- L2 cache single bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_SBE_VOL_REG 13
- Register file single bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_SBE_VOL_TEX 15
- Texture memory single bit volatile ECC errors.
- #define NVML_FI_DEV_ECC_SBE_VOL_TOTAL 3
- Total single bit volatile ECC errors.
- #define NVML_FI_DEV_ENERGY 191
- Total energy consumption (in mJ) since the driver was last reloaded. Same as NVML_FI_DEV_TOTAL_ENERGY_CONSUMPTION for the GPU.
- #define NVML_FI_DEV_GET_GPU_RECOVERY_ACTION 230
- GPU Recovery action - None/Reset/Reboot/Drain P2P/Drain and Reset.
- #define NVML_FI_DEV_IS_MIG_MODE_INDEPENDENT_MIG_QUERY_CAPABLE 199
- MIG mode independent, MIG query capable device. 1=yes. 0=no.
- #define NVML_FI_DEV_IS_RESETLESS_MIG_SUPPORTED 184
- Device's Restless MIG Capability.
- #define NVML_FI_DEV_MEMORY_TEMP 82
- Memory temperature for the device.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L0 60
- NVLink Bandwidth Counter for Counter Set 0, Lane 0.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L1 61
- NVLink Bandwidth Counter for Counter Set 0, Lane 1.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L10 124
- NVLink Bandwidth Counter for Counter Set 0, Lane 10.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L11 125
- NVLink Bandwidth Counter for Counter Set 0, Lane 11.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L2 62
- NVLink Bandwidth Counter for Counter Set 0, Lane 2.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L3 63
- NVLink Bandwidth Counter for Counter Set 0, Lane 3.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L4 64
- NVLink Bandwidth Counter for Counter Set 0, Lane 4.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L5 65
- NVLink Bandwidth Counter for Counter Set 0, Lane 5.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L6 120
- NVLink Bandwidth Counter for Counter Set 0, Lane 6.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L7 121
- NVLink Bandwidth Counter for Counter Set 0, Lane 7.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L8 122
- NVLink Bandwidth Counter for Counter Set 0, Lane 8.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L9 123
- NVLink Bandwidth Counter for Counter Set 0, Lane 9.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_TOTAL 66
- NVLink Bandwidth Counter Total for Counter Set 0, All Lanes.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L0 67
- NVLink Bandwidth Counter for Counter Set 1, Lane 0.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L1 68
- NVLink Bandwidth Counter for Counter Set 1, Lane 1.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L10 130
- NVLink Bandwidth Counter for Counter Set 1, Lane 10.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L11 131
- NVLink Bandwidth Counter for Counter Set 1, Lane 11.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L2 69
- NVLink Bandwidth Counter for Counter Set 1, Lane 2.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L3 70
- NVLink Bandwidth Counter for Counter Set 1, Lane 3.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L4 71
- NVLink Bandwidth Counter for Counter Set 1, Lane 4.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L5 72
- NVLink Bandwidth Counter for Counter Set 1, Lane 5.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L6 126
- NVLink Bandwidth Counter for Counter Set 1, Lane 6.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L7 127
- NVLink Bandwidth Counter for Counter Set 1, Lane 7.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L8 128
- NVLink Bandwidth Counter for Counter Set 1, Lane 8.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L9 129
- NVLink Bandwidth Counter for Counter Set 1, Lane 9.
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_TOTAL 73
- NVLink Bandwidth Counter Total for Counter Set 1, All Lanes.
- #define NVML_FI_DEV_NVLINK_COUNT_BUFFER_OVERRUN_ERRORS 207
- Number of packets that were discarded on Rx due to buffer overrun.
- #define NVML_FI_DEV_NVLINK_COUNT_EFFECTIVE_BER 220
- Effective BER for effective errors.
- #define NVML_FI_DEV_NVLINK_COUNT_EFFECTIVE_ERRORS 219
- Sum of the number of errors in each Nvlink packet.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_0 235
- Count of symbol errors that are corrected - bin 0.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_1 236
- Count of symbol errors that are corrected - bin 1.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_10 245
- Count of symbol errors that are corrected - bin 10.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_11 246
- Count of symbol errors that are corrected - bin 11.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_12 247
- Count of symbol errors that are corrected - bin 12.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_13 248
- Count of symbol errors that are corrected - bin 13.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_14 249
- Count of symbol errors that are corrected - bin 14.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_15 250
- Count of symbol errors that are corrected - bin 15.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_2 237
- Count of symbol errors that are corrected - bin 2.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_3 238
- Count of symbol errors that are corrected - bin 3.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_4 239
- Count of symbol errors that are corrected - bin 4.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_5 240
- Count of symbol errors that are corrected - bin 5.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_6 241
- Count of symbol errors that are corrected - bin 6.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_7 242
- Count of symbol errors that are corrected - bin 7.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_8 243
- Count of symbol errors that are corrected - bin 8.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_9 244
- Count of symbol errors that are corrected - bin 9.
- #define NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_EVENTS 215
- Number of times link went from Up to recovery, irrespective of the result.
- #define NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_FAILED_EVENTS 214
- Number of times link went from Up to recovery, failed and link was declared down.
- #define NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_SUCCESSFUL_EVENTS 213
- Number of times link went from Up to recovery, succeeded and link came back up.
- #define NVML_FI_DEV_NVLINK_COUNT_LOCAL_LINK_INTEGRITY_ERRORS 211
- Total number of times that the count of local errors exceeded a threshold.
- #define NVML_FI_DEV_NVLINK_COUNT_MALFORMED_PACKET_ERRORS 206
- Number of packets Rx on a link where packets are malformed.
- #define NVML_FI_DEV_NVLINK_COUNT_RAW_BER 218
- Deprecated, do not use.
- #define NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE0 216
- Deprecated, do not use.
- #define NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE1 217
- Deprecated, do not use.
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_BYTES 204
- Total Rx bytes on the link in NVLink5.
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_ERRORS 208
- Total number of packets with errors Rx on a link.
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_GENERAL_ERRORS 210
- Total number of packets Rx with header mismatch.
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_PACKETS 203
- Total Rx packets on the link in NVLink5.
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_REMOTE_ERRORS 209
- Total number of packets Rx - stomp/EBP marker.
- #define NVML_FI_DEV_NVLINK_COUNT_SYMBOL_BER 222
- BER for symbol errors.
- #define NVML_FI_DEV_NVLINK_COUNT_SYMBOL_ERRORS 221
- Number of errors in rx symbols.
- #define NVML_FI_DEV_NVLINK_COUNT_VL15_DROPPED 205
- Deprecated, do not use.
- #define NVML_FI_DEV_NVLINK_COUNT_XMIT_BYTES 202
- Total Tx bytes on the link in NVLink5.
- #define NVML_FI_DEV_NVLINK_COUNT_XMIT_DISCARDS 212
- Total number of tx error packets that were discarded.
- #define NVML_FI_DEV_NVLINK_COUNT_XMIT_PACKETS 201
- Total Tx packets on the link in NVLink5.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L0 39
- NVLink data CRC Error Counter for Lane 0.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L1 40
- NVLink data CRC Error Counter for Lane 1.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L10 106
- NVLink data CRC Error Counter for Lane 10.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L11 107
- NVLink data CRC Error Counter for Lane 11.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L2 41
- NVLink data CRC Error Counter for Lane 2.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L3 42
- NVLink data CRC Error Counter for Lane 3.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L4 43
- NVLink data CRC Error Counter for Lane 4.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L5 44
- NVLink data CRC Error Counter for Lane 5.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L6 102
- NVLink data CRC Error Counter for Lane 6.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L7 103
- NVLink data CRC Error Counter for Lane 7.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L8 104
- NVLink data CRC Error Counter for Lane 8.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L9 105
- NVLink data CRC Error Counter for Lane 9.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_TOTAL 45
- NvLink data CRC Error Counter total for all Lanes.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L0 32
- NVLink flow control CRC Error Counter for Lane 0.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L1 33
- NVLink flow control CRC Error Counter for Lane 1.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L10 100
- NVLink flow control CRC Error Counter for Lane 10.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L11 101
- NVLink flow control CRC Error Counter for Lane 11.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L2 34
- NVLink flow control CRC Error Counter for Lane 2.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L3 35
- NVLink flow control CRC Error Counter for Lane 3.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L4 36
- NVLink flow control CRC Error Counter for Lane 4.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L5 37
- NVLink flow control CRC Error Counter for Lane 5.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L6 96
- NVLink flow control CRC Error Counter for Lane 6.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L7 97
- NVLink flow control CRC Error Counter for Lane 7.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L8 98
- NVLink flow control CRC Error Counter for Lane 8.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L9 99
- NVLink flow control CRC Error Counter for Lane 9.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_TOTAL 38
- NVLink flow control CRC Error Counter total for all Lanes.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L0 148
- NVLink data ECC Error Counter for Link 0.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L1 149
- NVLink data ECC Error Counter for Link 1.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L10 158
- NVLink data ECC Error Counter for Link 10.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L11 159
- NVLink data ECC Error Counter for Link 11.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L2 150
- NVLink data ECC Error Counter for Link 2.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L3 151
- NVLink data ECC Error Counter for Link 3.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L4 152
- NVLink data ECC Error Counter for Link 4.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L5 153
- NVLink data ECC Error Counter for Link 5.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L6 154
- NVLink data ECC Error Counter for Link 6.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L7 155
- NVLink data ECC Error Counter for Link 7.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L8 156
- NVLink data ECC Error Counter for Link 8.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L9 157
- NVLink data ECC Error Counter for Link 9.
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_TOTAL 160
- NVLink data ECC Error Counter total for all Links.
- #define NVML_FI_DEV_NVLINK_ERROR_DL_CRC 163
- #define NVML_FI_DEV_NVLINK_ERROR_DL_RECOVERY 162
- #define NVML_FI_DEV_NVLINK_ERROR_DL_REPLAY 161
- #define NVML_FI_DEV_NVLINK_GET_POWER_STATE 167
- NVLink Power state. 0=HIGH_SPEED 1=LOW_SPEED.
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD 168
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_MAX 200
- Max Nvlink Power Threshold. See NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD.
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_MIN 223
- Min Nvlink Power Threshold. See NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD.
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_SUPPORTED 225
- Determine if Nvlink Power Threshold feature is supported.
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS 224
- Values are in the form NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_*.
- #define NVML_FI_DEV_NVLINK_GET_SPEED 164
- NVLink Speed in MBps.
- #define NVML_FI_DEV_NVLINK_GET_STATE 165
- NVLink State - Active,Inactive.
- #define NVML_FI_DEV_NVLINK_GET_VERSION 166
- NVLink Version.
- #define NVML_FI_DEV_NVLINK_LINK_COUNT 91
- Number of NVLinks present on the device.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L0 53
- NVLink Recovery Error Counter for Lane 0.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L1 54
- NVLink Recovery Error Counter for Lane 1.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L10 118
- NVLink Recovery Error Counter for Lane 10.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L11 119
- NVLink Recovery Error Counter for Lane 11.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L2 55
- NVLink Recovery Error Counter for Lane 2.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L3 56
- NVLink Recovery Error Counter for Lane 3.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L4 57
- NVLink Recovery Error Counter for Lane 4.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L5 58
- NVLink Recovery Error Counter for Lane 5.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L6 114
- NVLink Recovery Error Counter for Lane 6.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L7 115
- NVLink Recovery Error Counter for Lane 7.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L8 116
- NVLink Recovery Error Counter for Lane 8.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L9 117
- NVLink Recovery Error Counter for Lane 9.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_TOTAL 59
- NVLink Recovery Error Counter total for all Lanes.
- #define NVML_FI_DEV_NVLINK_REMOTE_NVLINK_ID 146
- Remote device NVLink ID.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L0 46
- NVLink Replay Error Counter for Lane 0.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L1 47
- NVLink Replay Error Counter for Lane 1.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L10 112
- NVLink Replay Error Counter for Lane 10.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L11 113
- NVLink Replay Error Counter for Lane 11.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L2 48
- NVLink Replay Error Counter for Lane 2.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L3 49
- NVLink Replay Error Counter for Lane 3.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L4 50
- NVLink Replay Error Counter for Lane 4.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L5 51
- NVLink Replay Error Counter for Lane 5.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L6 108
- NVLink Replay Error Counter for Lane 6.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L7 109
- NVLink Replay Error Counter for Lane 7.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L8 110
- NVLink Replay Error Counter for Lane 8.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L9 111
- NVLink Replay Error Counter for Lane 9.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_TOTAL 52
- NVLink Replay Error Counter total for all Lanes.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_COMMON 90
- Common NVLink Speed in MBps for active links.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L0 84
- NVLink Speed in MBps for Link 0.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L1 85
- NVLink Speed in MBps for Link 1.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L10 136
- NVLink Speed in MBps for Link 10.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L11 137
- NVLink Speed in MBps for Link 11.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L2 86
- NVLink Speed in MBps for Link 2.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L3 87
- NVLink Speed in MBps for Link 3.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L4 88
- NVLink Speed in MBps for Link 4.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L5 89
- NVLink Speed in MBps for Link 5.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L6 132
- NVLink Speed in MBps for Link 6.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L7 133
- NVLink Speed in MBps for Link 7.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L8 134
- NVLink Speed in MBps for Link 8.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L9 135
- NVLink Speed in MBps for Link 9.
- #define NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_RX 139
- NVLink RX Data throughput in KiB.
- #define NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_TX 138
- NVLink TX Data throughput in KiB.
- #define NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_RX 141
- NVLink RX Data + protocol overhead in KiB.
- #define NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_TX 140
- NVLink TX Data + protocol overhead in KiB.
- #define NVML_FI_DEV_NVSWITCH_CONNECTED_LINK_COUNT 147
- Number of NVLinks connected to NVSwitch.
- #define NVML_FI_DEV_PCIE_COUNT_BAD_DLLP 178
- PCIe Bad DLLP Counter.
- #define NVML_FI_DEV_PCIE_COUNT_BAD_TLP 176
- PCIe Bad TLP Counter.
- #define NVML_FI_DEV_PCIE_COUNT_CORRECTABLE_ERRORS 173
- PCIe Correctable Errors Counter.
- #define NVML_FI_DEV_PCIE_COUNT_FATAL_ERROR 180
- PCIe Fatal Error Counter.
- #define NVML_FI_DEV_PCIE_COUNT_LANE_ERROR 183
- PCIe Per Lane Error Counter.
- #define NVML_FI_DEV_PCIE_COUNT_LCRC_ERROR 182
- PCIe LCRC Error Counter.
- #define NVML_FI_DEV_PCIE_COUNT_NAKS_RECEIVED 174
- PCIe NAK Receive Counter.
- #define NVML_FI_DEV_PCIE_COUNT_NAKS_SENT 177
- PCIe NAK Send Counter.
- #define NVML_FI_DEV_PCIE_COUNT_NON_FATAL_ERROR 179
- PCIe Non Fatal Error Counter.
- #define NVML_FI_DEV_PCIE_COUNT_RECEIVER_ERROR 175
- PCIe Receiver Error Counter.
- #define NVML_FI_DEV_PCIE_COUNT_RX_BYTES 198
- PCIe receive bytes. Value can be wrapped.
- #define NVML_FI_DEV_PCIE_COUNT_TX_BYTES 197
- PCIe transmit bytes. Value can be wrapped.
- #define NVML_FI_DEV_PCIE_COUNT_UNSUPPORTED_REQ 181
- PCIe Unsupported Request Counter.
- #define NVML_FI_DEV_PCIE_L0_TO_RECOVERY_COUNTER 169
- Device PEX error recovery counter.
- #define NVML_FI_DEV_PCIE_REPLAY_COUNTER 94
- PCIe replay counter.
- #define NVML_FI_DEV_PCIE_REPLAY_ROLLOVER_COUNTER 95
- PCIe replay rollover counter.
- #define NVML_FI_DEV_PERF_POLICY_BOARD_LIMIT 77
- Perf Policy Counter for Board Limit.
- #define NVML_FI_DEV_PERF_POLICY_LOW_UTILIZATION 78
- Perf Policy Counter for Low GPU Utilization Policy.
- #define NVML_FI_DEV_PERF_POLICY_POWER 74
- Perf Policy Counter for Power Policy.
- #define NVML_FI_DEV_PERF_POLICY_RELIABILITY 79
- Perf Policy Counter for Reliability Policy.
- #define NVML_FI_DEV_PERF_POLICY_SYNC_BOOST 76
- Perf Policy Counter for Sync boost Policy.
- #define NVML_FI_DEV_PERF_POLICY_THERMAL 75
- Perf Policy Counter for Thermal Policy.
- #define NVML_FI_DEV_PERF_POLICY_TOTAL_APP_CLOCKS 80
- Perf Policy Counter for Total App Clock Policy.
- #define NVML_FI_DEV_PERF_POLICY_TOTAL_BASE_CLOCKS 81
- Perf Policy Counter for Total Base Clocks Policy.
- #define NVML_FI_DEV_POWER_AVERAGE 185
- GPU power averaged over 1 sec interval, supported on Ampere (except GA100) or newer architectures.
- #define NVML_FI_DEV_POWER_CURRENT_LIMIT 190
- Limit currently enforced in milliwatts (This includes other limits set elsewhere. E.g. Out-of-band).
- #define NVML_FI_DEV_POWER_DEFAULT_LIMIT 189
- Default power limit in milliwatts (limit which device boots with).
- #define NVML_FI_DEV_POWER_INSTANT 186
- Current GPU power, supported on all architectures.
- #define NVML_FI_DEV_POWER_MAX_LIMIT 188
- Maximum power limit in milliwatts.
- #define NVML_FI_DEV_POWER_MIN_LIMIT 187
- Minimum power limit in milliwatts.
- #define NVML_FI_DEV_POWER_REQUESTED_LIMIT 192
- Power limit requested by NVML or any other userspace client.
- #define NVML_FI_DEV_POWER_SYNC_BALANCING_AF 255
- Accumulated activity factor of the GPU to be used for averaging.
- #define NVML_FI_DEV_POWER_SYNC_BALANCING_FREQ 254
- Accumulated frequency of the GPU to be used for averaging.
- #define NVML_FI_DEV_REMAPPED_COR 142
- Number of remapped rows due to correctable errors.
- #define NVML_FI_DEV_REMAPPED_FAILURE 145
- If any rows failed to be remapped 1=yes 0=no.
- #define NVML_FI_DEV_REMAPPED_PENDING 144
- If any rows are pending remapping. 1=yes 0=no.
- #define NVML_FI_DEV_REMAPPED_UNC 143
- Number of remapped rows due to uncorrectable errors.
- #define NVML_FI_DEV_RESET_STATUS 226
- Depracated, do not use (use NVML_FI_DEV_GET_GPU_RECOVERY_ACTION instead).
- #define NVML_FI_DEV_RETIRED_DBE 30
- Number of retired pages because of double bit errors.
- #define NVML_FI_DEV_RETIRED_PENDING 31
- If any pages are pending retirement. 1=yes. 0=no.
- #define NVML_FI_DEV_RETIRED_PENDING_DBE 93
- If any pages are pending retirement due to DBE. 1=yes. 0=no.
- #define NVML_FI_DEV_RETIRED_PENDING_SBE 92
- If any pages are pending retirement due to SBE. 1=yes. 0=no.
- #define NVML_FI_DEV_RETIRED_SBE 29
- Number of retired pages because of single bit errors.
- #define NVML_FI_DEV_TEMPERATURE_GPU_MAX_TLIMIT 196
- T.Limit temperature after which GPU may be throttled below base clock.
- #define NVML_FI_DEV_TEMPERATURE_MEM_MAX_TLIMIT 195
- T.Limit temperature after which GPU may begin SW slowdown due to memory temperature.
- #define NVML_FI_DEV_TEMPERATURE_SHUTDOWN_TLIMIT 193
- T.Limit temperature after which GPU may shut down for HW protection.
- #define NVML_FI_DEV_TEMPERATURE_SLOWDOWN_TLIMIT 194
- T.Limit temperature after which GPU may begin HW slowdown.
- #define NVML_FI_DEV_TOTAL_ENERGY_CONSUMPTION 83
- Total energy consumption for the GPU in mJ since the driver was last reloaded.
- #define NVML_FI_MAX 274
- One greater than the largest field ID defined above.
- #define NVML_FI_PWR_SMOOTHING_ACTIVE_PRESET_PROFILE 269
- Active preset profile number.
- #define NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PERCENT_TMP_FLOOR 270
- % TMP floor for a given profile
- #define NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_DOWN_HYST_VAL 273
- Ramp down hysteresis value in ms for a given profile.
- #define NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_DOWN_RATE 272
- Ramp down rate in mW/s for a given profile.
- #define NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_UP_RATE 271
- Ramp up rate in mW/s for a given profile.
- #define NVML_FI_PWR_SMOOTHING_APPLIED_TMP_CEIL 259
- Applied TMP ceiling value in Watts.
- #define NVML_FI_PWR_SMOOTHING_APPLIED_TMP_FLOOR 260
- Applied TMP floor value in Watts.
- #define NVML_FI_PWR_SMOOTHING_ENABLED 256
- Enablement (0/DISABLED or 1/ENABLED).
- #define NVML_FI_PWR_SMOOTHING_HW_CIRCUITRY_PERCENT_LIFETIME_REMAINING 263
- HW Circuitry % lifetime remaining.
- #define NVML_FI_PWR_SMOOTHING_IMM_RAMP_DOWN_ENABLED 258
- Immediate ramp down enablement (0/DISABLED or 1/ENABLED).
- #define NVML_FI_PWR_SMOOTHING_MAX_NUM_PRESET_PROFILES 264
- Max number of preset profiles.
- #define NVML_FI_PWR_SMOOTHING_MAX_PERCENT_TMP_FLOOR_SETTING 261
- Max % TMP Floor value.
- #define NVML_FI_PWR_SMOOTHING_MIN_PERCENT_TMP_FLOOR_SETTING 262
- Min % TMP Floor value.
- #define NVML_FI_PWR_SMOOTHING_PRIV_LVL 257
- Current privilege level.
- #define NVML_FI_PWR_SMOOTHING_PROFILE_PERCENT_TMP_FLOOR 265
- % TMP floor for a given profile
- #define NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_DOWN_HYST_VAL 268
- Ramp down hysteresis value in ms for a given profile.
- #define NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_DOWN_RATE 267
- Ramp down rate in mW/s for a given profile.
- #define NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_UP_RATE 266
- Ramp up rate in mW/s for a given profile.
- #define NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_100US 0x0
- #define NVML_NVLINK_POWER_STATE_HIGH_SPEED 0x0
Defines
- #define NVML_FI_DEV_C2C_LINK_COUNT 170
-
- #define NVML_FI_DEV_C2C_LINK_ERROR_INTR 231
-
- #define NVML_FI_DEV_C2C_LINK_ERROR_REPLAY 232
-
- #define NVML_FI_DEV_C2C_LINK_ERROR_REPLAY_B2B 233
-
- #define NVML_FI_DEV_C2C_LINK_GET_MAX_BW 172
-
- #define NVML_FI_DEV_C2C_LINK_GET_STATUS 171
-
- #define NVML_FI_DEV_C2C_LINK_POWER_STATE 234
-
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_HW_POWER_BRAKE_SLOWDOWN 253
-
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_HW_THERM_SLOWDOWN 252
-
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_SW_POWER_CAP
-
Field values for Clock Throttle Reason Counters All counters are in nanoseconds
Value
NVML_FI_DEV_PERF_POLICY_POWER
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_SW_THERM_SLOWDOWN 251
-
- #define NVML_FI_DEV_CLOCKS_EVENT_REASON_SYNC_BOOST
-
Value
NVML_FI_DEV_PERF_POLICY_SYNC_BOOST
- #define NVML_FI_DEV_DRAIN_AND_RESET_STATUS 227
-
- #define NVML_FI_DEV_ECC_CURRENT 1
-
Field Identifiers.
All Identifiers pertain to a device. Each ID is only used once and is guaranteed never to change.
- #define NVML_FI_DEV_ECC_DBE_AGG_CBU 28
-
- #define NVML_FI_DEV_ECC_DBE_AGG_DEV 23
-
- #define NVML_FI_DEV_ECC_DBE_AGG_L1 19
-
- #define NVML_FI_DEV_ECC_DBE_AGG_L2 21
-
- #define NVML_FI_DEV_ECC_DBE_AGG_REG 25
-
- #define NVML_FI_DEV_ECC_DBE_AGG_TEX 27
-
- #define NVML_FI_DEV_ECC_DBE_AGG_TOTAL 6
-
- #define NVML_FI_DEV_ECC_DBE_VOL_CBU 17
-
- #define NVML_FI_DEV_ECC_DBE_VOL_DEV 12
-
- #define NVML_FI_DEV_ECC_DBE_VOL_L1 8
-
- #define NVML_FI_DEV_ECC_DBE_VOL_L2 10
-
- #define NVML_FI_DEV_ECC_DBE_VOL_REG 14
-
- #define NVML_FI_DEV_ECC_DBE_VOL_TEX 16
-
- #define NVML_FI_DEV_ECC_DBE_VOL_TOTAL 4
-
- #define NVML_FI_DEV_ECC_PENDING 2
-
- #define NVML_FI_DEV_ECC_SBE_AGG_DEV 22
-
- #define NVML_FI_DEV_ECC_SBE_AGG_L1 18
-
- #define NVML_FI_DEV_ECC_SBE_AGG_L2 20
-
- #define NVML_FI_DEV_ECC_SBE_AGG_REG 24
-
- #define NVML_FI_DEV_ECC_SBE_AGG_TEX 26
-
- #define NVML_FI_DEV_ECC_SBE_AGG_TOTAL 5
-
- #define NVML_FI_DEV_ECC_SBE_VOL_DEV 11
-
- #define NVML_FI_DEV_ECC_SBE_VOL_L1 7
-
- #define NVML_FI_DEV_ECC_SBE_VOL_L2 9
-
- #define NVML_FI_DEV_ECC_SBE_VOL_REG 13
-
- #define NVML_FI_DEV_ECC_SBE_VOL_TEX 15
-
- #define NVML_FI_DEV_ECC_SBE_VOL_TOTAL 3
-
- #define NVML_FI_DEV_ENERGY 191
-
- #define NVML_FI_DEV_GET_GPU_RECOVERY_ACTION 230
-
- #define NVML_FI_DEV_IS_MIG_MODE_INDEPENDENT_MIG_QUERY_CAPABLE 199
-
- #define NVML_FI_DEV_IS_RESETLESS_MIG_SUPPORTED 184
-
- #define NVML_FI_DEV_MEMORY_TEMP 82
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L0 60
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L1 61
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L10 124
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L11 125
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L2 62
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L3 63
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L4 64
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L5 65
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L6 120
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L7 121
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L8 122
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_L9 123
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C0_TOTAL 66
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L0 67
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L1 68
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L10 130
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L11 131
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L2 69
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L3 70
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L4 71
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L5 72
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L6 126
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L7 127
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L8 128
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_L9 129
-
- #define NVML_FI_DEV_NVLINK_BANDWIDTH_C1_TOTAL 73
-
- #define NVML_FI_DEV_NVLINK_COUNT_BUFFER_OVERRUN_ERRORS 207
-
- #define NVML_FI_DEV_NVLINK_COUNT_EFFECTIVE_BER 220
-
NVLink Effective BER
Bit [0:7]: BER Exponent value Bit [8:11]: BER MANTISSA value Use macro NVML_NVLINK_ERROR_COUNTER_BER_GET to extract the two fields
- #define NVML_FI_DEV_NVLINK_COUNT_EFFECTIVE_ERRORS 219
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_0 235
-
NVLink counter field id 235-250
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_1 236
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_10 245
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_11 246
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_12 247
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_13 248
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_14 249
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_15 250
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_2 237
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_3 238
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_4 239
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_5 240
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_6 241
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_7 242
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_8 243
-
- #define NVML_FI_DEV_NVLINK_COUNT_FEC_HISTORY_9 244
-
- #define NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_EVENTS 215
-
- #define NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_FAILED_EVENTS 214
-
- #define NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_SUCCESSFUL_EVENTS 213
-
- #define NVML_FI_DEV_NVLINK_COUNT_LOCAL_LINK_INTEGRITY_ERRORS 211
-
- #define NVML_FI_DEV_NVLINK_COUNT_MALFORMED_PACKET_ERRORS 206
-
- #define NVML_FI_DEV_NVLINK_COUNT_RAW_BER 218
-
- #define NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE0 216
-
- #define NVML_FI_DEV_NVLINK_COUNT_RAW_BER_LANE1 217
-
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_BYTES 204
-
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_ERRORS 208
-
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_GENERAL_ERRORS 210
-
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_PACKETS 203
-
- #define NVML_FI_DEV_NVLINK_COUNT_RCV_REMOTE_ERRORS 209
-
- #define NVML_FI_DEV_NVLINK_COUNT_SYMBOL_BER 222
-
NVLink Symbol BER
Bit [0:7]: BER Exponent value Bit [8:11]: BER MANTISSA value Use macro NVML_NVLINK_ERROR_COUNTER_BER_GET to extract the two fields
- #define NVML_FI_DEV_NVLINK_COUNT_SYMBOL_ERRORS 221
-
- #define NVML_FI_DEV_NVLINK_COUNT_VL15_DROPPED 205
-
- #define NVML_FI_DEV_NVLINK_COUNT_XMIT_BYTES 202
-
- #define NVML_FI_DEV_NVLINK_COUNT_XMIT_DISCARDS 212
-
- #define NVML_FI_DEV_NVLINK_COUNT_XMIT_PACKETS 201
-
NVLink counter field id 201-225
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L0 39
-
NVLink CRC Data Error Counters
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L1 40
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L10 106
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L11 107
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L2 41
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L3 42
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L4 43
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L5 44
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L6 102
-
NVLink CRC Data Error Counters
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L7 103
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L8 104
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_L9 105
-
- #define NVML_FI_DEV_NVLINK_CRC_DATA_ERROR_COUNT_TOTAL 45
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L0 32
-
NVLink Flit Error Counters
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L1 33
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L10 100
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L11 101
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L2 34
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L3 35
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L4 36
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L5 37
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L6 96
-
NVLink Flit Error Counters
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L7 97
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L8 98
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_L9 99
-
- #define NVML_FI_DEV_NVLINK_CRC_FLIT_ERROR_COUNT_TOTAL 38
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L0 148
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L1 149
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L10 158
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L11 159
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L2 150
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L3 151
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L4 152
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L5 153
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L6 154
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L7 155
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L8 156
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_L9 157
-
- #define NVML_FI_DEV_NVLINK_ECC_DATA_ERROR_COUNT_TOTAL 160
-
- #define NVML_FI_DEV_NVLINK_ERROR_DL_CRC 163
-
NVLink Recovery Error CRC Counter
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink CRC Error Counter This is unsupported for Blackwell+ Please use NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_*
- #define NVML_FI_DEV_NVLINK_ERROR_DL_RECOVERY 162
-
NVLink Recovery Error Counter
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Recovery Error Counter This is unsupported for Blackwell+ Please use NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_*
- #define NVML_FI_DEV_NVLINK_ERROR_DL_REPLAY 161
-
NVLink Error Replay
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. NVLink Replay Error Counter This is unsupported for Blackwell+. Please use NVML_FI_DEV_NVLINK_COUNT_LINK_RECOVERY_*
- #define NVML_FI_DEV_NVLINK_GET_POWER_STATE 167
-
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD 168
-
NVLink length of idle period (units can be found from NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS) before transitioning links to sleep state
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_MAX 200
-
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_MIN 223
-
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_SUPPORTED 225
-
- #define NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS 224
-
- #define NVML_FI_DEV_NVLINK_GET_SPEED 164
-
NVLink Speed, State and Version field id 164, 165, and 166
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_GET_STATE 165
-
- #define NVML_FI_DEV_NVLINK_GET_VERSION 166
-
- #define NVML_FI_DEV_NVLINK_LINK_COUNT 91
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L0 53
-
NVLink Recovery Error Counters
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L1 54
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L10 118
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L11 119
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L2 55
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L3 56
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L4 57
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L5 58
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L6 114
-
NVLink Recovery Error Counters
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L7 115
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L8 116
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_L9 117
-
- #define NVML_FI_DEV_NVLINK_RECOVERY_ERROR_COUNT_TOTAL 59
-
- #define NVML_FI_DEV_NVLINK_REMOTE_NVLINK_ID 146
-
Remote device NVLink ID
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L0 46
-
NVLink Replay Error Counters
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L1 47
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L10 112
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L11 113
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L2 48
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L3 49
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L4 50
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L5 51
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L6 108
-
NVLink Replay Error Counters
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L7 109
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L8 110
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_L9 111
-
- #define NVML_FI_DEV_NVLINK_REPLAY_ERROR_COUNT_TOTAL 52
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_COMMON 90
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L0 84
-
NVLink Speed
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L1 85
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L10 136
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L11 137
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L2 86
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L3 87
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L4 88
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L5 89
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L6 132
-
NVLink Speed
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t.
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L7 133
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L8 134
-
- #define NVML_FI_DEV_NVLINK_SPEED_MBPS_L9 135
-
- #define NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_RX 139
-
- #define NVML_FI_DEV_NVLINK_THROUGHPUT_DATA_TX 138
-
NVLink throughput counters field values
Link ID needs to be specified in the scopeId field in nvmlFieldValue_t. A scopeId of UINT_MAX returns aggregate value summed up across all links for the specified counter type in fieldId.
- #define NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_RX 141
-
- #define NVML_FI_DEV_NVLINK_THROUGHPUT_RAW_TX 140
-
- #define NVML_FI_DEV_NVSWITCH_CONNECTED_LINK_COUNT 147
-
NVSwitch: connected NVLink count
- #define NVML_FI_DEV_PCIE_COUNT_BAD_DLLP 178
-
- #define NVML_FI_DEV_PCIE_COUNT_BAD_TLP 176
-
- #define NVML_FI_DEV_PCIE_COUNT_CORRECTABLE_ERRORS 173
-
- #define NVML_FI_DEV_PCIE_COUNT_FATAL_ERROR 180
-
- #define NVML_FI_DEV_PCIE_COUNT_LANE_ERROR 183
-
- #define NVML_FI_DEV_PCIE_COUNT_LCRC_ERROR 182
-
- #define NVML_FI_DEV_PCIE_COUNT_NAKS_RECEIVED 174
-
- #define NVML_FI_DEV_PCIE_COUNT_NAKS_SENT 177
-
- #define NVML_FI_DEV_PCIE_COUNT_NON_FATAL_ERROR 179
-
- #define NVML_FI_DEV_PCIE_COUNT_RECEIVER_ERROR 175
-
- #define NVML_FI_DEV_PCIE_COUNT_RX_BYTES 198
-
- #define NVML_FI_DEV_PCIE_COUNT_TX_BYTES 197
-
- #define NVML_FI_DEV_PCIE_COUNT_UNSUPPORTED_REQ 181
-
- #define NVML_FI_DEV_PCIE_L0_TO_RECOVERY_COUNTER 169
-
- #define NVML_FI_DEV_PCIE_REPLAY_COUNTER 94
-
- #define NVML_FI_DEV_PCIE_REPLAY_ROLLOVER_COUNTER 95
-
- #define NVML_FI_DEV_PERF_POLICY_BOARD_LIMIT 77
-
- #define NVML_FI_DEV_PERF_POLICY_LOW_UTILIZATION 78
-
- #define NVML_FI_DEV_PERF_POLICY_POWER 74
-
- #define NVML_FI_DEV_PERF_POLICY_RELIABILITY 79
-
- #define NVML_FI_DEV_PERF_POLICY_SYNC_BOOST 76
-
- #define NVML_FI_DEV_PERF_POLICY_THERMAL 75
-
- #define NVML_FI_DEV_PERF_POLICY_TOTAL_APP_CLOCKS 80
-
- #define NVML_FI_DEV_PERF_POLICY_TOTAL_BASE_CLOCKS 81
-
- #define NVML_FI_DEV_POWER_AVERAGE 185
-
Retrieves power usage for this GPU in milliwatts. It is only available if power management mode is supported. See nvmlDeviceGetPowerManagementMode and nvmlDeviceGetPowerUsage.
scopeId needs to be specified. It signifies: 0 - GPU Only Scope - Metrics for GPU are retrieved 1 - Module scope - Metrics for the module (e.g. CPU + GPU) are retrieved. Note: CPU here refers to NVIDIA CPU (e.g. Grace). x86 or non-NVIDIA ARM is not supported
- #define NVML_FI_DEV_POWER_CURRENT_LIMIT 190
-
- #define NVML_FI_DEV_POWER_DEFAULT_LIMIT 189
-
- #define NVML_FI_DEV_POWER_INSTANT 186
-
- #define NVML_FI_DEV_POWER_MAX_LIMIT 188
-
- #define NVML_FI_DEV_POWER_MIN_LIMIT 187
-
- #define NVML_FI_DEV_POWER_REQUESTED_LIMIT 192
-
- #define NVML_FI_DEV_POWER_SYNC_BALANCING_AF 255
-
- #define NVML_FI_DEV_POWER_SYNC_BALANCING_FREQ 254
-
- #define NVML_FI_DEV_REMAPPED_COR 142
-
- #define NVML_FI_DEV_REMAPPED_FAILURE 145
-
- #define NVML_FI_DEV_REMAPPED_PENDING 144
-
- #define NVML_FI_DEV_REMAPPED_UNC 143
-
- #define NVML_FI_DEV_RESET_STATUS 226
-
- #define NVML_FI_DEV_RETIRED_DBE 30
-
- #define NVML_FI_DEV_RETIRED_PENDING 31
-
- #define NVML_FI_DEV_RETIRED_PENDING_DBE 93
-
- #define NVML_FI_DEV_RETIRED_PENDING_SBE 92
-
- #define NVML_FI_DEV_RETIRED_SBE 29
-
- #define NVML_FI_DEV_TEMPERATURE_GPU_MAX_TLIMIT 196
-
- #define NVML_FI_DEV_TEMPERATURE_MEM_MAX_TLIMIT 195
-
- #define NVML_FI_DEV_TEMPERATURE_SHUTDOWN_TLIMIT 193
-
GPU T.Limit temperature thresholds in degree Celsius
These fields are supported on Ada and later architectures and supersedes nvmlDeviceGetTemperatureThreshold.
- #define NVML_FI_DEV_TEMPERATURE_SLOWDOWN_TLIMIT 194
-
- #define NVML_FI_DEV_TOTAL_ENERGY_CONSUMPTION 83
-
- #define NVML_FI_MAX 274
-
- #define NVML_FI_PWR_SMOOTHING_ACTIVE_PRESET_PROFILE 269
-
- #define NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_PERCENT_TMP_FLOOR 270
-
- #define NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_DOWN_HYST_VAL 273
-
- #define NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_DOWN_RATE 272
-
- #define NVML_FI_PWR_SMOOTHING_ADMIN_OVERRIDE_RAMP_UP_RATE 271
-
- #define NVML_FI_PWR_SMOOTHING_APPLIED_TMP_CEIL 259
-
- #define NVML_FI_PWR_SMOOTHING_APPLIED_TMP_FLOOR 260
-
- #define NVML_FI_PWR_SMOOTHING_ENABLED 256
-
- #define NVML_FI_PWR_SMOOTHING_HW_CIRCUITRY_PERCENT_LIFETIME_REMAINING 263
-
- #define NVML_FI_PWR_SMOOTHING_IMM_RAMP_DOWN_ENABLED 258
-
- #define NVML_FI_PWR_SMOOTHING_MAX_NUM_PRESET_PROFILES 264
-
- #define NVML_FI_PWR_SMOOTHING_MAX_PERCENT_TMP_FLOOR_SETTING 261
-
- #define NVML_FI_PWR_SMOOTHING_MIN_PERCENT_TMP_FLOOR_SETTING 262
-
- #define NVML_FI_PWR_SMOOTHING_PRIV_LVL 257
-
- #define NVML_FI_PWR_SMOOTHING_PROFILE_PERCENT_TMP_FLOOR 265
-
- #define NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_DOWN_HYST_VAL 268
-
- #define NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_DOWN_RATE 267
-
- #define NVML_FI_PWR_SMOOTHING_PROFILE_RAMP_UP_RATE 266
-
- #define NVML_NVLINK_LOW_POWER_THRESHOLD_UNIT_100US 0x0
-
NVML_FI_DEV_NVLINK_GET_POWER_THRESHOLD_UNITS
- #define NVML_NVLINK_POWER_STATE_HIGH_SPEED 0x0
-
NVML_NVLINK_POWER_STATES