NVML API Reference Guide (PDF) - v535 (older) - Last updated January 31, 2024 - Send Feedback

4.19.1. Event Types

[Event Handling Methods]

Event Types which user can be notified about. See description of particular functions for details.

See nvmlDeviceRegisterEvents and nvmlDeviceGetSupportedEventTypes to check which devices support each event.

Types can be combined with bitwise or operator '|' when passed to nvmlDeviceRegisterEvents

Defines

#define nvmlEventMigConfigChange 0x0000000000000100LL
Event about MIG configuration changes.
#define nvmlEventTypeAll
Mask of all events.
#define nvmlEventTypeClock 0x0000000000000010LL
Event about clock changes.
#define nvmlEventTypeDoubleBitEccError 0x0000000000000002LL
Event about double bit ECC errors.
#define nvmlEventTypeNone 0x0000000000000000LL
Mask with no events.
#define nvmlEventTypePState 0x0000000000000004LL
Event about PState changes.
#define nvmlEventTypePowerSourceChange 0x0000000000000080LL
Event about AC/Battery power source changes.
#define nvmlEventTypeSingleBitEccError 0x0000000000000001LL
Event about single bit ECC errors.
#define nvmlEventTypeXidCriticalError 0x0000000000000008LL
Event that Xid critical error occurred.

Defines

#define nvmlEventMigConfigChange 0x0000000000000100LL

#define nvmlEventTypeAll

Value

(nvmlEventTypeNone \ | nvmlEventTypeSingleBitEccError \ | nvmlEventTypeDoubleBitEccError \ | nvmlEventTypePState \ | nvmlEventTypeClock \ | nvmlEventTypeXidCriticalError \ | nvmlEventTypePowerSourceChange \ | nvmlEventMigConfigChange \ )

#define nvmlEventTypeClock 0x0000000000000010LL

Kepler only

#define nvmlEventTypeDoubleBitEccError 0x0000000000000002LL

Note:

An uncorrected texture memory error is not an ECC error, so it does not generate a double bit event

#define nvmlEventTypeNone 0x0000000000000000LL

#define nvmlEventTypePState 0x0000000000000004LL

Note:

On Fermi architecture PState changes are also an indicator that GPU is throttling down due to no work being executed on the GPU, power capping or thermal capping. In a typical situation, Fermi-based GPU should stay in P0 for the duration of the execution of the compute process.

#define nvmlEventTypePowerSourceChange 0x0000000000000080LL

#define nvmlEventTypeSingleBitEccError 0x0000000000000001LL

Note:

A corrected texture memory error is not an ECC error, so it does not generate a single bit event

#define nvmlEventTypeXidCriticalError 0x0000000000000008LL


NVML API Reference Guide (PDF) - v535 (older) - Last updated January 31, 2024 - Send Feedback