Standard FAPI Support#

FAPI Messages Supported#

The following table summarizes FAPI message support.

FAPI Messages

PDU Types

cuBB Support

Remarks

DL_TTI.request

PDCCH

Y

PDSCH

Y

CSI-RS

Y

Refer to note [3]

SSB

Y

UL_TTI.request

PRACH

Y

PUSCH

Y

PUCCH

Y

SRS

Y

Refer to note [4]

UL_DCI.request

PDCCH

Y

TX_Data.request

PDSCH

Y

Refer to note [1]

Rx_Data.indication

PUSCH

Y

Refer to note [1]

CRC.indication

CRC

Y

UCI.indication

PUSCH

Y

PUCCH format 0,1

Y

PUCCH format 2,3,4

Y

Refer to note [3]

SR for format 0,1

Y

SR for format 2,3,4

Y

Refer to note [3]

HARQ for format 0,1

Y

HARQ for format 2,3,4

Y

Refer to note [3]

CSI part 1

Y

CSI part 2

Y

RSSI and UL SINR metrics

Y

Refer to note [3]

SRS.indication

SRS

Y

Refer to note [4]

RACH.indication

PRACH

Y

Config.request

Y

Refer to note [2]

Config.response

Y

Start.request

Y

Stop.request

Y

Stop.indication

Y

Error.indication

Y

Param.request

N

Param.response

N

Note[1]: TX_DATA.request and RX_DATA.indication follow FAPI 222.10.02 with the following exceptions:

  • PDU Length fields in TX_DATA.request and RX_DATA.indication use 32-bit format (as defined in FAPI 222.10.03).

  • Multiple UE per TTI is supported using TLV tag 2. The TLV value specifies the byte offset from the first address to each UE’s payload. For TX_Data.request, L2 can use any byte alignment between payloads.

  • The RX_DATA.indication message contains MAC PDU (TB data) in the NVIPC message’s data_buf field.

Refer to TX_Data.request and RX_Data.indication for complete field details.

Note[2]: Some vendor-specific TLVs are supported in CONFIG.request. Refer to Vendor-Specific TLVs for details.

Note[3]: PUCCH format 4 is not supported in UL_TTI.request.

cuBB supports multi-bit SR over PUCCH formats. Since FAPI 222.10.02 does not define a field for SR bit length in the PUCCH_PDU, the SRFlag field is repurposed to indicate the SR bit length. Refer to PUCCH PDU for details.

Note[4]: SRS.indication and SRS PDU in UL_TTI.request are supported according to SCF FAPI 222.10.02 and 222.10.04. Refer to SRS PDU and SRS.indication for complete field details.

Supported Error Codes#

The following error codes may be received by L2 in ERROR.indication messages from L1 to L2. This includes both standard FAPI error codes and Aerial-specific vendor extensions.

Standard FAPI Error Codes#

Error Code

Value

Description

SCF_ERROR_CODE_MSG_OK

0x0

Message is OK.

SCF_ERROR_CODE_MSG_INVALID_STATE

0x1

The received message is not valid in the PHY’s current state.

SCF_ERROR_CODE_MSG_INVALID_CONFIG

0x2

The configuration provided in the request message was invalid

SCF_ERROR_CODE_SFN_OUT_OF_SYNC

0x3

The DL_TTI.request was received with a different SFN or slot than the PHY expected.

SCF_ERROR_CODE_MSG_SLOT_ERR

0x4

The DL_TTI.request or UL_TTI.request had an invalid format.

SCF_ERROR_CODE_MSG_BCH_MISSING

0x5

A SSB PDU was expected in the DL_TTI.request message for this subframe. However, it was not present.

SCF_ERROR_CODE_MSG_INVALID_SFN

0x6

The received UL_DCI.request or TX_Data.request message included a SFN/SL value which was not expected. The message has been ignored.

SCF_ERROR_CODE_MSG_UL_DCI_ERR

0x7

The UL_DCI.request had an invalid format

SCF_ERROR_CODE_MSG_TX_ERR

0x8

The TX_Data.request had an invalid format.

SCF_ERROR_CODE_MSG_INVALID_PHY_ID

0x9

The PHY ID is not defined (FAPI 222.10.04)

SCF_ERROR_CODE_MSG_UNINSTANTIATED_PHY

0xA

The PHY ID is not instantiated (FAPI 222.10.04)

SCF_ERROR_CODE_MSG_INVALID_DFE_Profile

0xB

No valid DFE Profile exists for the PHY ID (FAPI 222.10.04)

SCF_ERROR_CODE_MSG_PHY_PROFILE_SELECTION

0xC

There is a RUNNING PHY Id whose definition would be changed by the PHY Profile selection (FAPI 222.10.04)

Vendor-Specific Error Codes#

Error Code

Hex

Description

SCF_ERROR_CODE_L1_PROC_OBJ_UNAVAILABLE_ERR

0x33

L1 processing object is unavailable

SCF_ERROR_CODE_MSG_LATE_SLOT_ERR

0x34

L1 timer thread missed slot boundary; slot indication for the indicated SFN/slot is late and will not be sent to L2

SCF_ERROR_CODE_PARTIAL_SRS_IND_ERR

0x35

SRS indication is incomplete (partial)

SCF_ERROR_CODE_L1_DL_CPLANE_TX_ERROR

0x36

DL C-plane transmission error (timing or functional)

SCF_ERROR_CODE_L1_UL_CPLANE_TX_ERROR

0x37

UL C-plane transmission error (timing or functional)

SCF_ERROR_CODE_L1_DL_GPU_ERROR

0x38

DL GPU pipeline processing failed

SCF_ERROR_CODE_L1_DL_CPU_TASK_ERROR

0x39

DL CPU task failed to complete

SCF_ERROR_CODE_L1_UL_CPU_TASK_ERROR

0x3A

UL CPU task failed to complete

SCF_ERROR_CODE_L1_P1_EXIT_ERROR

0x3B

L1 application exit error (Part 1)

SCF_ERROR_CODE_L1_P2_EXIT_ERROR

0x3C

L1 application exit error post cudaDeviceSynchronize (Part 2, occurs when CUDA coredump env variables are set)

SCF_ERROR_CODE_L1_DL_CH_ERROR

0x3D

DL channel processing error (CPU or GPU)

SCF_ERROR_CODE_L1_UL_CH_ERROR

0x3E

UL channel processing error (CPU or GPU)

SCF_ERROR_CODE_EARLY_HARQ_TIMING_ERROR

0x3F

Early HARQ processing failed to meet the channel processing segment TLV timeline requirements

SCF_ERROR_CODE_SRS_CHEST_BUFF_BAD_STATE

0x40

SRS channel estimation buffer is in an invalid state

SCF_ERROR_CODE_BEAM_ID_OUT_OF_RANGE

0x41

Beam ID value is out of the valid range

SCF_ERROR_CODE_PTP_SVC_ERROR

0x42

PTP service error occurred

SCF_ERROR_CODE_PTP_SYNCED

0x43

PTP is synchronized

SCF_ERROR_CODE_L1_MISSING_UL_IQ

0x44

Missing UL IQ data (ORAN fronthaul timeout)

SCF_ERROR_CODE_MSG_CAPACITY_EXCEEDED

0x45

Message capacity limit exceeded

SCF_ERROR_CODE_RHOCP_PTP_EVENTS_ERROR

0x46

RHOCP PTP events are not synchronized

SCF_ERROR_CODE_RHOCP_PTP_EVENTS_SYNCED

0x47

RHOCP PTP events synchronized again after being unsynchronized

SCF_FAPI_SSB_PBCH_L1_LIMIT_EXCEEDED

0x81

SSB/PBCH L1 capacity limit exceeded

SCF_FAPI_PDCCH_L1_LIMIT_EXCEEDED

0x82

PDCCH L1 capacity limit exceeded

SCF_FAPI_PDSCH_L1_LIMIT_EXCEEDED

0x84

PDSCH L1 capacity limit exceeded

SCF_FAPI_CSIRS_L1_LIMIT_EXCEEDED

0x88

CSI-RS L1 capacity limit exceeded

SCF_FAPI_PUSCH_L1_LIMIT_EXCEEDED

0xC1

PUSCH L1 capacity limit exceeded

SCF_FAPI_PUCCH_L1_LIMIT_EXCEEDED

0xC2

PUCCH L1 capacity limit exceeded

SCF_FAPI_SRS_L1_LIMIT_EXCEEDED

0xC4

SRS L1 capacity limit exceeded

SCF_FAPI_PRACH_L1_LIMIT_EXCEEDED

0xC8

PRACH L1 capacity limit exceeded

SCF_ERROR_CODE_RELEASED_HARQ_BUFFER_INFO

0xD0

HARQ buffers have been released
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