IP Integration

The top level module of the Holoscan Sensor Bridge IP is “HOLOLINK_top”.

The Holoscan Sensor Bridge (HSB) IP is designed to be easily configurable to various use case of the IP, such as number of sensors and Ethernet ports. It’s also designed to be compatible with multiple FPGA vendors. The following describes the configurations available to user.

Macro Definitions

The Holoscan Sensor Bridge definitions file, “HOLOLINK_def.svh”, defines the following macros.

The macros can be configured to user’s application of the Holoscan Sensor Bridge IP. The default macro value is the configuration that has been tested and verified.

Table 1

Build Revision

Parameter BUILD_REV[47:0] can be passed down to the “HOLOLINK_top” module to uniquely identify the FPGA build revision.

Sensor Interface Configuration

In applications where the HSB IP connects multiple sensors with varying bandwidths, the IP can be configured on a per-sensor-interface basis to optimize resource utilization.

The DATAPATH_WIDTH parameter defines the AXI Stream vector width for all sensor interfaces to simplify integration and should be set to match the widest sensor. The SIF_RX_WIDTH and SIF_TX_WIDTH parameters can be configured individually to specify narrower data widths for each sensor interface.

For example, if the first sensor interface has a width of 64 bits and the second has 32 bits: Set DATAPATH_WIDTH to 64 and set SIF_RX_WIDTH to {32, 64}. For second sensor interface, only the [31:0] of the AXI Stream TDATA and [3:0] of the AXI Stream TKEEP are used and the remaining signals should be tied to 0. The LSB [3:0] of AXI Stream TKEEP is still required to be set to all 1’b1.

Furthermore, the Packetizer function, which is needed when streaming camera to Thor, can be enabled for each sensor interface. For example, if the first sensor needs the Packetizer function but the second sensor does not, set SIF_RX_PACKETIZER_EN parameter to {0,1}.

HSB IP supports Virtual Port mapping. For more information, refer to Sensor Interface to Virtual Port Mapping

BOOTP Packet

The HSB IP transmits a broadcast BOOTP Request packet on each Host interface approximately once per second. BOOTP packets are used to enumerate the HSB to host and to change the IP address from default in case of multiple board enumeration. Default IP address of HSB IP is “192.168.0.2” for Host interface 0 and “192.168.0.3” for Host interface 1 and so on. HSB IP BOOTP packets adhere to RFC-951. The Vendor Field of the BOOTP packet is used to communicate enumeration info and status of Holoscan Sensor Board to the host.

Holoscan Sensor Bridge IP BOOTP Vendor field is laid out in below table:

Table 2

Each of the macros used for enumeration packet is further explained below.

UUID: This macro defines the unique identifier for the board. Holoscan uses this value to identify which board it is interfacing and fetch the correct bitfile for remote flash. For newly developed boards, users can generate and assign a new UUID. This macro must be defined and is not optionally stored in the non-volatile memory.

ENUM_EEPROM: When this macro is defined, enumeration fields, the MAC address and Board Serial Number, are retrieved from an on-board, non-volatile memory upon boot-up. The enumeration fields are retrieved over I2C port 0 with EEPROM 7-bit address 0x50 and must be stored in specific address. Further details can be provided upon request.

Mass production of boards with Holoscan Sensor Bridge IP requires an external EEPROM to store unique MAC address and board serial numbers. When using evaluation platforms for test and bring-up, enumeration fields, MAC address and Board Serial Number, can be passed to HSB IP via input port.

The Holoscan Sensor Bridge IP provides system initialization function to write to registers upon power up. This function is used to initialize the Ethernet block to establish ethernet connection between the FPGA and the host, and can be used for any other user function in the top level design.

The list of registers to be initialized is defined in “HOLOLINK_def.svh” as “init_reg” array. The “init_reg” is an unpacked array, sized [N_INIT_REG] [63:0], where the N_INIT_REG macro defines the number of registers to be initialized and the 64-bit vector is used to define the 32- bit address of register at [63:32] and the 32-bit write data at [31:0].

To give an example of one of the init_reg array entry:

{32’h1000_0020, 32’h0000_00FF} //init_reg[0]

Will write to the User REG_INST_0 block address offset 0x0000_0020 the data 0x0000_00FF.

Once system initialization is complete, the “o_init_done” port will be asserted high in “i_apb_clk” domain. User can use this signal to gate their logic if it’s dependent on ethernet block initialization.