Aerial CUDA-Accelerated RAN
Aerial CUDA-Accelerated RAN 24-3

cuPHY Features Overview

This section provides an overview of supported features in cuPHY.

Aerial CUDA-Accelerated RAN Layer 1

Aerial CUDA-Accelerated RAN adheres to 3GPP Release 15 standard specifications to deliver the necessary Layer 1 capabilities for a gNB.

3GPP Release 15

Aerail cuPHY adheres to 3GPP Release 15 standard specifications to deliver the following capabilities for gNB Layer 1.

Overall PHY capabilities include:

  • Error detection on the transport channel and indication to higher layers

  • FEC encoding/decoding of the transport channel

  • Hybrid ARQ soft-combining

  • Rate matching of the coded transport channel to physical channels

  • Mapping of the coded transport channel onto physical channels

  • Power weighting of physical channels

  • Modulation and demodulation of physical channels including:

    • Frequency and time synchronization

    • Radio characteristics measurements and indication to higher layers

    • Multiple Input Multiple Output (MIMO) antenna processing

    • Transmit Diversity (TX diversity)

    • Digital and Analog Beamforming

    • RF processing

PHY FH Interface

Aerial CUDA-Accelerated RAN PHY Overall Capabilities

Features

Configuration

Supported

Standard support 3GPP 5G NR Rel 15 P
Duplexing Mode TDD Y
Nawrrow Bandwidth (MHz) 30MHz, 40 MHz, 50MHz, 80 MHz P
Channel Bandwidth (MHz) 100 MHz Y
Subcarrier Spacing (kHz) 30khz Y
Maximum Number of Subcarriers (Max number of RBs x Num of Subcarriers per RB) = 273 x 12 3276 Y
Downlink Waveform CP-OFDM Y
Uplink Waveform CP-OFDM Y
DFT-s-OFDM (for data and control) Y
Configurable to DFT-s-OFDM (for data & Control) Y
Number of Downlink SU-MIMO layers Up to 4 Y
Number of Uplink SU-MIMO layers 1, 2 Y
Number of Tx physical antennas 1 N
2 Y
4 Y
8 N
64 Y
Number of Rx physical antennas 1 N
2 Y
4 Y
8 N
64 Y
Slot format DDDSUUDDDD S = 6:4:4 (DL: G: UL) Y
Carrier Aggregation Configurable component carriers Y
Configurable BW Parts Up to 4 Y
BBU-RRU split option 7.1 Y
7.2 Y
8 N
Maximum Downlink throughput per user (Mbps) 4T4R configuration 1870 Y
Maximum Uplink throughput per user (Mbps) 4T4R configuration 467 Y

TS 38.211 Numerologies, Physical Resources, Modulation, Sequence, Signal Generation

Aerial CUDA-Accelerated RAN PHY Numerologies

Feature

Configuration

Supported

Numerologies:Normal CP μ=0:SCS=15kHz, 14symbol/slot, 10slot/frame, 1slot/subframe, Normal CP N
μ=1:SCS=30kHz, 14symbol/slot, 20slot/frame, 2slot/subframe, Normal CP Y
μ=2:SCS=60kHz, 14symbol/slot, 40slot/frame, 4slot/subframe, Normal CP N
μ=3:SCS=120kHz, 14symbol/slot, 80slot/frame, 8slot/subframe, Normal CP N
μ=4:SCS=240kHz, 14symbol/slot, 160slot/frame, 16slot/subframe, Normal CP N
Numerologies:Extended CP μ=2:SCS=60kHz, 12symbol/slot, 40slot/frame, 4slot/subframe, Extended CP N

Aerial CUDA-Accelerated RAN Overall PHY Physical Resources

Feature

Supported

Antenna Ports Y
Resource Grid Y
Resource Elements Y
Resource Block Y
Resource Block - Common Resource Block(CRB) Y
Resource Block - Physical Resource Block(PRB) Y
Resource Block - Virtual Resource Block (VRB) Y
Bandwidth Part (BWP) Dynamically adapt the carrier bandwidth and numerology in which a UE operates A bandwidth part is a subset of contiguous common resource blocks for a given numerology μi in bandwidth part i on a given carrier. A UE can be configured with up to four bandwidth parts in UL and DL Y

Aerial CUDA-Accelerated RAN PHY Physical Resources – BWP

Feature

Supported

Bandwidth Part (BWP) Dynamically adapt the carrier bandwidth and numerology in which a UE operates A bandwidth part is a subset of contiguous common resource blocks for a given numerology μi in bandwidth part i on a given carrier A UE can be configured with up to four bandwidth parts in both UL and DL Y
Default Aerial CUDA-Accelerated RAN startup configuration to not use BWP, can be enabled to support BWP on a per carrier basis (while cell OOS) N
Default Aerial CUDA-Accelerated RAN startup configuration to not use BWP, can be enabled to support BWP on a per carrier basis at startup N

Aerial CUDA-Accelerated RAN Overall Carrier Aggregation

Feature

Description

Supported (emulated)

Carrier Aggregation Transmissions in multiple cells can be aggregated to support inter-band and intra-band configurations Y
100MHz Up to 2 cells aggregation(1CC,2CC) Y
Up to 4 cells aggregation(1CC,2CC,3CC, 4CC) Y
Narrowband Carrier Aggregation (ZMhz) Configurable upto 4 component carriers Y

Aerial CUDA-Accelerated RAN PHY Modulation Mapper

Modulation Scheme

Supported

Pi/2 BPSK Y
BPSK Y
QPSK Y
16QAM Y
64QAM Y
256QAM Y

Aerial CUDA-Accelerated RAN PHY Sequence Generation

Feature

Description

Supported

Sequence Generation Pseudo-random sequence generation Generic pseudo-random sequences are defined by a length-31 Gold sequence Y
Low-PAPR sequence generation type 1 Y
Low-PAPR sequence generation type 2 Y

OFDM Baseband Signal Generation (UL DFT-S-OFDM)

Feature

Configuration

Supported

Signal generation for all channels except PRACH & RIM-RS RU support expected
PRACH RU support expected
RIM-RS RU support expected
Uplink waveform Support concurrent UE configuration to use CP-OFDM or DFT-S-OFDM on same cell. DFT-S-OFDM for UL. Some specific parameters:
  • Support for PUSCH and for PUCCH format 3
  • Support 0.5 pi-BPSK for Modulation
  • Support DMRS group hopping
  • Support DMRS sequence hopping
Y

TS 38.211 Channels

Aerial CUDA-Accelerated RAN Physical Overall Channels and Reference Signals

Category

L1 requirement

Supported

Downlink Channels (TX ) PDSCH processing Y
PDCCH processing Y
PBCH processing Y
Downlink signals (TX ) DMRS for PDSCH Y
DMRS for PDCCH Y
DMRS for PBCH Y
PSS, SSS Y
CSI-RS, TRS Y
PT-RS N
Downlink Physical Resources Antenna ports starting with 1000 for PDSCH Y
Antenna ports starting with 2000 for PDCCH Y
Antenna ports starting with 3000 for channel-state information reference signals Y
Antenna ports starting with 4000 for SS/PBCH block transmission Y
Uplink Channels (RX ) PUSCH processing Y
PUCCH processing Y
PRACH processing Y
Uplink signals (RX) DMRS for PUSCH Y
DMRS for PUCCH Y
SRS Y
PT-RS N
Uplink physical Resources Antenna ports starting with 0 for PUSCH and associated demodulation reference signals Y
Antenna ports starting with 1000 for SRS Y
Antenna ports starting with 2000 for PUCCH Y
Antenna port 4000 for PRACH Y

Features

Configuration

Supported

Number of codewords 1 Y
Scrambling Y
Modulation schemes Pi/2-BPSK Y
QPSK Y
16 QAM Y
64 QAM Y
256 QAM Y
PUSCH transform precoding mode Disable Y
Enable Y
Precoding Implemented in UE for UL Y
HARQ process Number of HARQ process = 1 Y
HARQ process Maximum number of HARQ process is 16 Y
Mapping to virtual resource blocks Y
VRB to PRB mapping Type Non-interleaved Y
Interleaved N
Transmission Mode SU-MIMO up to 4 layers Y
MU-MIMO up to 8 layers Y
PUSCH DMRS CDM group without data PUSCH DMRS CDM group without data 1 Y
PUSCH DMRS CDM group without data 2 Y
PUSCH users per TTI 16 Y
Uplink algorithm UL HARQ control Y
UL Channel Estimation LS Y
MRC, MMSE for equalizer Y
IRC, MMSE for equalizer Y
Frequency Offset Correction Y
Rate Matching I_LBRM = 1 (Limited Buffer Rate Matching) Y
I_LBRM = 0 (Limited Buffer Rate Matching) Y

Aerial CUDA-Accelerated RAN Overall Channel - PUCCH (Physical Uplink Control Channel

Format

Configuration

Supported

Format 0 Y
1 Y
2 Y
3 Y
4 N
UCI sched coding, AFC, DFT (Format 1) N
Modulation schemes Pi/2-BPSK, BPSK, QPSK Y
Scheduling Request SR Support needed Y
Group hopping neither Y
disable Y
enable Y
Sequence cyclic shift Zadoff-Chu sequence Y
Intra-slot Frequency hopping/second hop PRB Support Y
Inter-slot Frequency hopping/second hop PRB Support Y
PUCCH over multiple slots Number of slots - 2,4,8 N
Frequency Offset Correction PUCCH format 1, 3 N
Multi-UE support 24 UEs / TTI Y
PUCCH UCI HARQ-ACK Polar codeblock CB size < 359, liftsize = 8 Y

1-Capabilities-TSx211-6-3-3] Aerial CUDA-Accelerated RAN Overall Channel - PRACH(PHY Random Access Channel)

Feature

Configuration

Supported

Format A1 N
A2 N
A3 N
B1 N
B2 N
B3 N
B4 Y
C0 N
C2 N
0 N
1 N
2 N
3 N
Subcarrier Spacing (kHz) 1.25 N
5 N
15 N
30 Y
Sequence cyclic shift Zadoff-Chu sequence Y
Preamble length 839 N
139 Y
Number of PRACH occasions per TTI 4 FDM Y
Contention based Random Access Configurable non-contention based Random Access N

Aerial CUDA-Accelerated RAN Overall PHY - UL Reference Signals

PUSCH

Signal

Configuration

Supported

PUSCH DMRS sequence generation when transform precoding is disabled Y
PUSCH DMRS sequence generation when transform precoding is enabled Neither group, nor sequence hopping is enabled Y
Group hopping is enabled and sequence hopping is disabled Y
Sequence hopping is enabled and group hopping is disabled Y
Demodulation reference signal for PUSCH Mapping to physical resources DM-RS configuration type 1 Y
DM-RS configuration type 2 N
UL-DMRS-max-len=1 Y
UL-DMRS-max-len=2 Y
UL-DMRS-add-pos=0 Y
UL-DMRS-add-pos=1 Y
UL-DMRS-add-pos=2 Y
UL-DMRS-add-pos=3 Y
Phase-tracking reference signals for PUSCH Sequence generation transform precoding is not enabled N
transform precoding is enabled N
Phase-tracking reference signals for PUSCH Mapping to physical resources transform precoding is disabled N
transform precoding is enabled N

PUCCH

Signal

Configuration

Supported

Demodulation reference signal for PUCCH format 1 no intra-slot frequency hopping Y
intra-slot frequency hopping enabled Y
Demodulation reference signal for PUCCH format 2 Y
Demodulation reference signal for PUCCH format 3 (Format 4 not supported) No additional DM-RS, No hopping Y
No Additional DM-RS, hopping Y
Additional DM-RS, No hopping Y
Additional DM-RS, hopping Y

SRS

Signal

Configuration

Supported

Sounding reference signal resource Antenna ports=1, 1OFDM symbols Y
Antenna ports=1, 2OFDM symbols Y
Antenna ports=1, 4OFDM symbols Y
Antenna ports=2, 1OFDM symbpls Y
Antenna ports=2, 2OFDM symbols Y
Antenna ports=2, 4OFDM symbols Y
Antenna ports=4, 1OFDM symbpls Y
Antenna ports=4, 2OFDM symbols Y
Antenna ports=4, 4OFDM symbols Y
Sounding reference signal Sequence generation KTC=2 Y
KTC=4 Y
KTC=8 Y
Sounding reference signal Mapping to physical resources CSRS=0~63 Y
Sounding reference signal slot configuration Indicated by higher layer parameter SRS-Config Y

PTRS

Signal

Configuration

Supported

PTRS N

Aerial CUDA-Accelerated RAN Overall Channel - PDSCH(PHY DL Shared Channel)

Feature

Configuration

Supported

Scrambling Y
Modulation schemes QPSK Y
16 QAM Y
64 QAM Y
256 QAM Y
Transmission Mode 4T4R SU-MIMO up to 4 layers Y
64T64R MU-MIMO up to 16 layers Y
Number of codewords 1 Y
2 N
Number of antenna ports 1000 - 1011 Y
Number of physical antennas 4 Y
64 Y
Beam Forming weights computation BF m2 N
Precoding non-codebook Y
pre-coding weight Y
Type I Single-Panel Codebook N
Type I Multi-Panel Codebook N
Type II Codebook N
Type II Port Selection Codebook N
PDSCH mapping type Type A Y
Type B Y
Resource allocation type Type 0 (4T4R only) Y
Type 1 Y
VRB to PRB mapping Type Non-interleaved Y
Interleaved N
PDSCH DMRS CDM groups without data 1 Y
2 Y
3 N/A
Number PDSCH users per TTI 16 Y
Power Control PDSCH Y
DMRS - PDSCH Y

Aerial CUDA-Accelerated RAN Overall Channel - PDCCH (Physical DL Control Channel)

Feature

Configuration

Supported

Scrambling Up to 2 codewords N
CORESET Normal Y
RMSI CORESET Y
SSB - RMSI CORESET multiplexing pattern Pattern 1 Y
Aggregation Level 1 Y
2 Y
4 Y
8 Y
16 Y
Modulation schemes QPSK Y
Layer mapping Supported Y
Antenna port mapping Supported Y
Mapping to virtual resource blocks Supported Y
Mapping from virtual to physical resource blocks Non-interleaved VRB-to-PRB mapping Y
Polar code Block length up to 128 bits Y
DMRS (Demodulation Reference Signal) m-sequence Y
CCE To REG Mapping Type Non-interleaved Y
Interleaved Y
Number OFDM symbol of CORESET 1 Y
2 Y
3 Y
Power Control PDCCH Y
DMRS-PDCCH Y
DCI format 0_0 NA
0_1 NA
1_0 NA
1_1 NA
2_x NA
Precoding Precoding Matrix Idx based precoding in the DU Y

Aerial CUDA-Accelerated RAN Overall Channel - PBCH (Physical Broadcast Channel)

Configuration

cuBB Tested

Precoding Y
Scrambling SS/PBCH block index Lmax=4 N
SS/PBCH block index Lmax=8 N
SS/PBCH block index Lmax=64 N
Modulation schemes QPSK Y
Mapping to Physical Resources Y
DMRS Support Support Y
DMRS config type Type 1 Y
Type 2 N
DMRS type A Pos Pos2 Y
Pos3 Y
DMRS max length 1 Y
2 Y
DMRS Additional Position Pos0 Y
Pos1 Y
Pos2 Y
Pos3 Y

Aerial CUDA-Accelerated RAN Overall - PHY DL Reference Signals

PDSCH

Feature

Configuration

Supported

Demodulation reference signals for PDSCH Sequence generation Y
Demodulation reference signals for PDSCH Mapping to physical resources DM-RS configuration type 1 Y
DM-RS configuration type 2 N
DL-DMRS-max-len=1 Y
DL-DMRS-max-len=2 Y
DL-DMRS-add-pos=0 Y
DL-DMRS-add-pos=1 Y
DL-DMRS-add-pos=2 Y
DL-DMRS-add-pos=3 Y
Phase-tracking reference signals (PTRS) for PDSCH Mapping to physical resources LPT-RS=1 N
LPT-RS=2 N
LPT-RS=4 N

PDCCH

Feature

Configuration

Supported

Demodulation reference signals for PDCCH Sequence generation Y
Demodulation reference signals for PDCCH Mapping to physical resources Y

PBCH

Feature

Configuration

Supported

Demodulation reference signals for PBCH Sequence generation Y
Demodulation reference signals for PBCH Mapping to physical resources Y
CSI reference signals
CSI reference signals Zero-power Y
non-zero-power Y
CSI reference signals Sequence generation nID equals the higher-layer parameter ScramblingID Y
CSI reference signals Mapping to physical resources Row 1: 1 port, Density = 3, CDMtype = No CDM Y
Row 2: 1 port, Density = 1, 0.5, CDMtype = No CDM Y
Row 3: 2 port, Density = 1, 0.5, CDMtype = FD-CDM2 Y
Row 4: 4 port, Density = 1, CDMtype = FD-CDM2 Y
Row 5: 4 port, Density = 1, CDMtype = FD-CDM2 Y
Row 6: 8 port, Density = 1, CDMtype = FD-CDM2 Y
Row 7: 8 port, Density = 1, CDMtype = FD-CDM2 Y
Row 8: 8 port, Density = 1, CDMtype = CDM4 (FD2, TD2) Y
Row 9: 12 port, Density = 1, CDMtype = FD-CDM2 N
Row 10: 12 port, Density = 1, CDMtype = CDM4 (FD2, TD2) N
Row 11: 16 port, Density = 1, 0.5, CDMtype = FD-CDM2 N
Row 12: 16 port, Density = 1, 0.5, CDMtype = CDM4 (FD2, TD2) N
Row 13: 24 port, Density = 1, 0.5, CDMtype = FD-CDM2 N
Row 14: 24 port, Density = 1, 0.5, CDMtype = CDM4(FD2, TD2) N
Row 15: 24 port, Density = 1, 0.5, CDMtype = CDM8(FD2, TD4) N
Row 16: 32 port, Density = 1, 0.5, CDMtype = FD-CDM2 N
Row 17: 32 port, Density = 1, 0.5, CDMtype = CDM4(FD2, TD2) N
Row 18: 32 port, Density = 1, 0.5, CDMtype = CDM8(FD2, TD4) N

RIM

Feature

Configuration

Supported

RIM reference signal General The first RIM-RS type can be used to convey information N
The second RIM-RS type depends on configuration only N
RIM reference signal Sequence generation N
RIM reference signal Mapping to physical resources N
RIM reference signal RIM-RS configuration Enough Indication is disabled N
Enough Indication is enabled N
Positioning Reference
Positioning reference signal Sequence generation N
Positioning reference signal Mapping to physical resources LPRS = 2, Kcomb = 2 N
LPRS = 4, Kcomb = 2 N
LPRS = 6, Kcomb = 2 N
LPRS = 12, Kcomb = 2 N
LPRS = 4, Kcomb = 4 N
LPRS = 12, Kcomb = 4 N
LPRS = 6, Kcomb = 6 N
LPRS = 12, Kcomb = 6 N
LPRS = 12, Kcomb = 12 N

Synchronization Signals

Feature

Configuration

Supported

SSB numerology 30 kHz Y
SSB precoding supported Y
SSB burst set configuration 2 SS blocks w/ single SSB burst set Y
Synchronization signal generation PSS generation and mapping to physical resources Y
SSS generation and mapping to physical resources Y
SS/PBCH block Mapping of PSS within an SS/PBCH block Y
Mapping of SSS within an SS/PBCH block Y
Mapping of PBCH and DM-RS within an SS/PBCH block Y
Time-frequency structure and time location of an SS/PBCH block Y

TS 38.212 Multiplexing and Channel Coding

Aerial CUDA-Accelerated RAN Overall Multiplexing and Channel Coding

Feature

Configuration

Supported

General Procedures CRC calculation All CRC len supported (6, 11, 16, 24) Y
Code block segmentation and code block CRC attachment
  • Polar coding
  • Low density parity check coding
Y
Transport to physical channel mapping - UL UL-SCH -> PUSCH Y
RACH -> PRACH Y
UCI -> PUCCH,PUSCH Y
Transport to physical channel mapping - DL DL-SCH -> PDSCH Y
BCH -> PBCH Y
PCH -> PDSCH Y
DCI -> PDCCH Y
Channel coding schemes Polar coding Y
Low density parity check coding (LDPC) Y
Channel coding of small block lengths Y
Rate matching Rate matching for Polar code Y
Rate matching for LDPC code Y
Rate matching for channel coding of small block lengths Y
Code block concatenation sequentially concatenating the rate matching outputs for the different code blocks
  • LDPC
  • Polar Coding
Y
uplink transport channels and control information Random access channel Y
Uplink shared channel
  • LDPC graph selection
  • Rate Matching
  • Code block concatenation
  • Data & Control Mulitiplexing
Y
Uplink control information
  • Uplink control information on PUCCH
  • Uplink control information on PUSCH
Y
downlink transport channels and control information Broadcast channel Y
Downlink shared channel and paging channel Y
Downlink control information
  • DCI formats
  • CRC attachment
  • Channel coding
Y
UCI multiplexing on PUCCH support muxing mode as per 38.212 - 6.3.1.1 Y

TS 38.213 Physical Layer Procedures for Control

Aerial CUDA-Accelerated RAN Overall - PHY Control Procedures

UE procedures (Not applicable to base station)

Category

L1 requirement

Supported

Synchronization procedures Cell search NA
Transmission timing adjustments NA
Timing for secondary cell activation / deactivation NA
Radio link monitoring SSB based NA
CSI-RS based NA
Link recovery procedures radio link failure NA
beam failure recovery NA
Uplink power control Physical uplink shared channel NA
Physical uplink control channel NA
Sounding reference signal NA
Physical random access channel NA
Power ramping counter suspention NA
Dual connectivity NA
Power headroom report NA

PHY RACH

Category

L1 requirement

Supported

Type-1 random access procedure Y
Type-2 random access procedure N

UE procedures (Not applicable to base station)

Category

L1 requirement

Supported

HARQ-ACK codebook determination CBG-based HARQ-ACK codebook determination NA
Type-1 HARQ-ACK codebook determination in physical uplink control channel NA
Type-1 HARQ-ACK codebook determination in physical uplink shared channel NA
Type-2 HARQ-ACK codebook determination in physical uplink control channel NA
Type-2 HARQ-ACK codebook determination in physical uplink shared channel NA
Type-3 HARQ-ACK codebook determination NA

UCI reporting on PUSCH

Category

L1 Requirement

Supported

Short block codes for UCI Input: 1 - 11 bits output 32 bits Y
Multiplexing of coded UCI bits to PUSCH CSI part 1, support maximum 48 bit Y
CSI part 1 and CSI part 2, support maximum 48 bit Y
Decoding UCI on PUSCH with PUSCH data (UCI-ON-PUSCH scaling) 0.5/0.65/0.8/1 N
Decoding UCI on PUSCH without PUSCH data (UCI-ON-PUSCH scaling) 0.5/0.65/0.8/1 N
HARQ information length maximum 128 Y
Semi-static offset N
Dynamic offset N

UCI Reporting on PUCCH

Category

L1 Requirement

Supported

UCI reporting on PUCCH PUCCH Resource Sets before RRC connection establishment N
PUCCH Resource Sets for RRC connected UE N
UE procedure for reporting multiple UCI types N
PUCCH repetition procedure N

UE Procedures (Not applicable to base station)

Category

L1 Requirement

Supported

UE procedure for determining physical downlink control channel assignment Type0-PDCCH common search space NA
Type0A-PDCCH common search space NA
Type1-PDCCH common search space NA
Type2-PDCCH common search space NA
Type3-PDCCH common search space NA
UE-specific search space NA

UE Procedure for Receiving Control Information

Category

L1 Requirement

Supported

PDCCH validation for DL SPS and UL grant Type 2 NA
PDCCH validation for DL SPS and UL grant Type 2 NA
PDCCH monitoring indication and dormancy/non-dormancy behaviour for SCells NA
Search space set group switching NA
HARQ-ACK information for PUSCH transmissions NA

UE-Group Common Signaling

Category

L1 Requirement

Supported

UE-group common signalling Slot configuration N
UE procedure for determining slot format N
Interrupted transmission indication N
Cancellation indication N
Group TPC commands for PUCCH/PUSCH N
SRS switching N

Bandwidth Part Operation

Category

L1 Requirement

Supported

BWP Configurable upto 4 Y
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {15, 15} kHz for frequency bands with minimum channel bandwidth 5 MHz or 10 MHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {15, 15} kHz for frequency bands operated with shared spectrum channel access N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {15, 30} kHz for frequency bands with minimum channel bandwidth 5 MHz or 10 MHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {30, 15} kHz for frequency bands with minimum channel bandwidth 5 MHz or 10 MHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {30, 30} kHz for frequency bands with minimum channel bandwidth 5 MHz or 10 MHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {30, 30} kHz for frequency bands operated with shared spectrum channel access N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {30, 15} kHz for frequency bands with minimum channel bandwidth 40MHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {30, 30} kHz for frequency bands with minimum channel bandwidth 40MHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {120, 60} kHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {120, 120} kHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {240, 60} kHz N
Set of resource blocks and slot symbols of CORESET for Type0-PDCCH search space set when {SS/PBCH block, PDCCH} SCS is {240, 120} kHz N
Parameters for PDCCH monitoring occasions for Type0-PDCCH CSS set - SS/PBCH block and CORESET Multiplexing pattern 1 and FR1 N
Parameters for PDCCH monitoring occasions for Type0-PDCCH CSS set - SS/PBCH block and CORESET Multiplexing pattern 1 and FR2 N
PDCCH monitoring occasions for Type0-PDCCH CSS set - SS/PBCH block and CORESET Multiplexing pattern 2 and {SS/PBCH block, PDCCH} SCS {120, 60} kHz N
PDCCH monitoring occasions for Type0-PDCCH CSS set - SS/PBCH block andCORESET Multiplexing pattern 2 and {SS/PBCH block, PDCCH} SCS {240, 120} kHz N
PDCCH monitoring occasions for Type0-PDCCH CSS set - SS/PBCH block and CORESET Multiplexing pattern 3 and {SS/PBCH block, PDCCH} SCS {120, 120} kHz N
Integrated access-backhaul operation N
Dual active protocol stack based handover N

TS 38.214 Physical Layer Procedures for Data

Aerial CUDA-Accelerated RAN Overall PHY Data Procedures

Category

L1 Requirement

Supported

UL PUSCH Procedures
Transmission Scheme Codebook-based Y
Non-codebook-based Y
Resource allocation Type 0 (4T4R only) Y
Type 1 Y
Modulation order, redundancy version and transport block size determination Y
Code block group based PUSCH transmission N
MCS Table Table64QAM Y
Table256QAM Y
Table64QAMLowSE Y
PUSCH mapping type Type A Y
Type B Y
CBG retranmission bitmap Enable N
Disable Y

FH Interfaces

Aerial CUDA-Accelerated RAN Overall 4T4R L1 - L2 Layer Interface Based on SCF FAPI

Feature

Configuration (10.02)

Supported (Emulated)

SCF control interface must support the following messages
Config.request 4T4R Y
Config.response 4T4R Y
Start.request 4T4R Y
Stop.request 4T4R Y
Stop.indication 4T4R Y
Error.indication 4T4R Y
Param.request (cap query) 4T4R Y
Param.response 4T4R Y
SCF data interface includes the following messages
DL_TTI.request 4T4R Y
UL_TTI.request 4T4R Y
UL_DCI.request 4T4R Y
SLOT errors 4T4R Y
TX_Data.request 4T4R Y
Rx_Data.indication 4T4R Y
CRC.indication 4T4R Y
UCI.indication 4T4R Y
SRS.indication 4T4R Y
RACH.indication 4T4R Y

Aerial CUDA-Accelerated RAN Overall PHY FH Interface

Feature

Description

Supported

IOT Profiles Simultaneous support of TDD profile(s) and TDD pattern on single GPU
  • NR TDD IOT Profile 1: NR-TDD-FR1-CAT-A-NoBF
  • NR TDD IOT Profile 2: NR-TDD-FR1-CAT-A-DBF
Y
O-RAN CUS plane features with fronthaul 7.2-x split: [10][11] Simultanous O-RU category support on same GPU/DU
  • CAT-A (precoding supported for PDCSH)
  • CAT-B
Y
Beamforming
  • Predefined beamID based beamforming
Y
IQ compression & bit-width Simultaneous support for
  • Static-bit-width Fixed point IQ (14 bit)
  • BFP IQ Compression (9 bit)
Y
O-DU timing
  • Defined transport delay method
Y
Synchronization
  • G8275.1 (full timing support)
  • LLS-C3 with PTP + SyncE
Y
Transport features
  • eCPRI
  • Application layer fragmentation
  • QoS over fronthaul
Y
Section types
  • Section Type 1 (DL/UL channels)
  • Section Type 3 (PRACH)
  • Multiple sections within a single C-plane message
Y
Digital power scaling
  • UL gain correction
  • DL reference level adjustment
Y
Rx window monitoring, Counters like
  • Data received too early
  • Data received too late
  • Data received on-time
Y
Scale Support for upto 8 peak - 16 avg 100Mhz carriers Y

Measurements

Aerial CUDA-Accelerated RAN Overall PHY Measurements - 4T4R

PUSCH measurements

Measurements

Supported Config

Supported cuBB Tested

RSS 4T4R Y
RSRP 4T4R Y
Pn+I pre-eq (Noise+Interference power) 4T4R Y
Pn+I post-eq (Noise+Interference power) 4T4R Y
SINR pre-eq 4T4R Y
SINR post-eq 4T4R Y
Timing Advance 4T4R Y

PUCCH measurements

Measurements

Supported Config

Supported cuBB Tested

PUCCH Format 0 4T4R Y
PF0 RSS 4T4R Y
PF0 RSRP 4T4R Y
PF0 Pn+i 4T4R Y
PF0 timing advance 4T4R Y
PUCCH Format 1 4T4R Y
PF1 RSS 4T4R Y
PF1 RSRP 4T4R Y
PF1 Pn+i 4T4R Y
PF1 timing advance 4T4R Y
PUCCH Format 2 4T4R Y
PF2 RSS 4T4R Y
PF2 RSRP 4T4R Y
PF2 Pn+i 4T4R Y
PF2 timing advance 4T4R Y
PUCCH Format 3 4T4R Y
PF3 RSS 4T4R Y
PF3 RSRP 4T4R Y
PF3 Pn+i 4T4R Y
PF3 timing advance 4T4R Y
PUCCH Format 4 4T4R N
PF4 RSS 4T4R N
PF4 RSRP 4T4R N
PF4 Pn+i 4T4R N
PF4 timing advance 4T4R N

PRACH measurements

Measurements

Supported Config

Supported cuBB Tested

Pn+i (Noise+Interference power) 4T4R Y
Preamble signal strength 4T4R Y

SRS measurements

Measurements

Supported Config

Supported cuBB Tested

SNR 4T4R Y
Received signal strength 4T4R Y
Timing advance 4T4R Y

All channels measurements

Measurements

Supported Config

Supported cuBB Tested

Both pre-equalization and post-equalization across all channels should be configurable and supported 4T4R N

TS 38.104 (base station radio Tx and Rx) Base Station (BS) Radio Transmission and Reception

Aerial CUDA-Accelerated RAN Overall PHY Performance Conformance

Feature

Configuration

Supported

PUSCH
PUSCH with transform precoding disabled 4T4R Y
PUSCH with transform precoding enabled 4T4R Y
UCI multiplexed on PUSCH 4T4R Y
PUCCH
DTX to ACK probability 4T4R N
Performance requirements for PUCCH format 0 4T4R N
Performance requirements for PUCCH format 1 4T4R N
Performance requirements for PUCCH format 2 4T4R N
Performance requirements for PUCCH format 3 4T4R N
Performance requirements for PUCCH format 4 4T4R N
Performance requirements for multi-slot PUCCH 4T4R N
PRACH
Performance requirements for PRACH PRACH False alarm probability N
PRACH detection requirements N
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