PUSCH#

This module contains classes related to the Physical Uplink Shared Channel, PUSCH.

class aerial.phy5g.pusch.pusch_rx_base.PuschRxPipeline#

A base class for PUSCH receiver pipeline implementations.

abstract __call__(slot, rx_slot, config, **kwargs)#

Abstract method that runs the receiver pipeline.

This method gives the signature that the receiver pipelines should implement.

Parameters:

  • slot (int) – Slot number.

  • rx_slot (Array) – Received slot as an Array.

  • config (List[_SlotConfigT]) – Dynamic slot configuration in this slot. Note that the type of this configuration should be derived from SlotConfig.

  • kwargs (Any)

Returns:

A tuple containing:

  • Array: Transport block CRCs.

  • List[Array]: Transport blocks, one per UE, without CRC.

Return type:

Array, List[Array]

class aerial.phy5g.pusch.pusch_rx.PuschRxPipelineFactory#

Factory for building a PuschRx pipeline.

create(config, cuda_stream, **kwargs)#

Create the pipeline.

Parameters:

  • config (AerialPuschRxConfig) – Pipeline configuration object.

  • cuda_stream (int) – CUDA stream used to run the pipeline.

  • kwargs (Any)

Returns:

A PuschRx pipeline object.

Return type:

PuschRx

class aerial.phy5g.pusch.pusch_rx.PuschRx#

PUSCH receiver pipeline.

This class implements the whole PUSCH reception pipeline from the received OFDM post-FFT symbols to the received transport block (along with CRC check).

__init__(
cell_id,
num_rx_ant,
num_tx_ant,
num_ul_bwp=273,
num_dl_bwp=273,
mu=1,
enable_cfo_correction=0,
enable_to_estimation=0,
enable_pusch_tdi=0,
eq_coeff_algo=1,
enable_per_prg_chest=0,
enable_ul_rx_bf=0,
ldpc_kernel_launch=aerial.pycuphy.types.PuschLdpcKernelLaunch.PUSCH_RX_ENABLE_DRIVER_LDPC_LAUNCH,
cuda_stream=None,
)#

Initialize PuschRx.

Parameters:

  • cell_id (int) – Physical cell ID.

  • num_rx_ant (int) – Number of receive antennas.

  • num_tx_ant (int) – Number of transmit antennas.

  • num_ul_bwp (int) – Number of PRBs in a uplink bandwidth part. Default: 273.

  • num_dl_bwp (int) – Number of PRBs in a downlink bandwidth part. Default: 273.

  • mu (int) – Numerology. Values in [0, 3]. Default: 1.

  • enable_cfo_correction (int) –

    Enable/disable CFO correction:

    • 0: Disable (default).

    • 1: Enable.

  • enable_to_estimation (int) –

    Enable/disable time offset estimation:

    • 0: Disable (default).

    • 1: Enable.

  • enable_pusch_tdi (int) –

    Time domain interpolation on PUSCH.

    • 0: Disable (default).

    • 1: Enable.

  • eq_coeff_algo (int) –

    Algorithm for equalizer coefficient computation.

    • 0 - ZF.

    • 1 - MMSE (default).

    • 2 - MMSE-IRC.

  • enable_per_prg_chest (int) –

    Enable/disable PUSCH per-PRG channel estimation.

    • 0: Disable (default).

    • 1: Enable.

  • enable_ul_rx_bf (int) –

    Enable/disable beamforming for PUSCH.

    • 0: Disable (default).

    • 1: Enable.

  • ldpc_kernel_launch (PuschLdpcKernelLaunch) – LDPC kernel launch method.

  • cuda_stream (int) – The CUDA stream. If not given, one will be created.

Return type:

None

__call__(slot, rx_slot, config, **kwargs)#

Run the receiver pipeline.

Note: This implements the base class abstract method.

Parameters:

  • slot (int) – Slot number.

  • rx_slot (Array) – Received slot as an Array.

  • config (List[PuschConfig]) – Dynamic slot configuration in this slot.

  • kwargs (Any)

Returns:

A tuple containing:

  • Array: Transport block CRCs.

  • List[Array]: Transport blocks, one per UE, without CRC.

Return type:

Array, List[Array]

run(
rx_slot,
slot=0,
pusch_configs=None,
num_ues=1,
num_dmrs_cdm_grps_no_data=2,
dmrs_scrm_id=41,
start_prb=0,
num_prbs=273,
prg_size=1,
num_ul_streams=1,
dmrs_syms=None,
dmrs_max_len=2,
dmrs_add_ln_pos=1,
start_sym=2,
num_symbols=12,
scids=None,
layers=None,
dmrs_ports=None,
rntis=None,
data_scids=None,
mcs_tables=None,
mcs_indices=None,
code_rates=None,
mod_orders=None,
tb_sizes=None,
rvs=None,
ndis=None,
)#

Run PUSCH Rx.

This runs the cuPHY PUSCH receiver pipeline based on the given parameters. Multiple UE groups are supported if the PuschConfig based API is used. Otherwise, the pipeline gets run only for a single UE group sharing the same time-frequency resources, i.e. having the same PRB allocation, and the same start symbol and number of allocated symbols. In this case default values get filled for the parameters that are not given.

Parameters:

  • rx_slot (Array) – A tensor representing the receive slot buffer of the cell.

  • slot (int) – Slot number.

  • pusch_configs (List[PuschConfig]) – List of PUSCH configuration objects, one per UE group. If this argument is given, the rest are ignored. If not given, the other arguments will be used (default values are used for the parameters that are not given). Only one UE group is supported in that case.

  • num_ues (int) – Number of UEs in the UE group.

  • num_dmrs_cdm_grps_no_data (int) – Number of DMRS CDM groups without data [3GPP TS 38.212, sec 7.3.1.1]. Value: 1->3.

  • dmrs_scrm_id (int) – DMRS scrambling ID.

  • start_prb (int) – Start PRB index of the UE group allocation.

  • num_prbs (int) – Number of allocated PRBs for the UE group.

  • prg_size (int) – The Size of PRG in PRB for PUSCH per-PRG channel estimation.

  • nUplinkStreams (int) – The number of active streams for this PUSCH.

  • dmrs_syms (List[int]) – For the UE group, a list of binary numbers each indicating whether the corresponding symbol is a DMRS symbol.

  • dmrs_max_len (int) – The maxLength parameter, value 1 or 2, meaning that DMRS are single-symbol DMRS or single- or double-symbol DMRS.

  • dmrs_add_ln_pos (int) – Number of additional DMRS positions.

  • start_sym (int) – Start OFDM symbol index for the UE group allocation.

  • num_symbols (int) – Number of symbols in the UE group allocation.

  • scids (List[int]) – DMRS sequence initialization for each UE [TS38.211, sec 7.4.1.1.2].

  • layers (List[int]) – Number of layers for each UE.

  • dmrs_ports (List[int]) – DMRS ports for each UE. The format of each entry is in the SCF FAPI format as follows: A bitmap (mask) starting from the LSB where each bit indicates whether the corresponding DMRS port index is used.

  • rntis (List[int])

  • data_scids (List[int]) – Data scrambling IDs for each UE, more precisely dataScramblingIdentityPdsch [TS38.211, sec 7.3.1.1].

  • mcs_tables (List[int]) – MCS table to use for each UE (see TS 38.214).

  • mcs_indices (List[int]) – MCS indices for each UE.

  • code_rates (List[float]) – Code rate, expressed as the number of information bits per 1024 coded bits expressed in 0.1 bit units.

  • mod_orders (List[int]) – Modulation order for each UE.

  • tb_sizes (List[int]) – TB size in bytes for each UE.

  • rvs (List[int]) – Redundancy versions for each UE.

  • ndis (List[int]) – New data indicator per UE.

  • num_ul_streams (int)

Returns:

A tuple containing:

  • Array: Transport block CRCs.

  • List[Array]: Transport blocks, one per UE, without CRC.

Return type:

Array, List[Array]

class aerial.phy5g.pusch.separable_pusch_rx.SeparablePuschRxPipelineFactory#

Factory for building a SeparablePuschRx pipeline.

create(config, cuda_stream, **kwargs)#

Create the pipeline.

Parameters:

  • config (AerialPuschRxConfig) – Pipeline configuration object.

  • cuda_stream (int) – CUDA stream used to run the tool.

  • kwargs (Any)

Returns:

A SeparablePuschRx pipeline object.

Return type:

SeparablePuschRx

class aerial.phy5g.pusch.separable_pusch_rx.SeparablePuschRx#

Separable PUSCH receiver pipeline.

This class implements the whole PUSCH reception pipeline from the received OFDM post-FFT symbols to the received transport block (along with CRC check). As opposed to PuschRx, this class implements the pipeline using separable PUSCH receiver components.

__init__(
num_rx_ant,
enable_pusch_tdi,
eq_coeff_algo,
cuda_stream,
)#

Initialize SeparablePuschRx.

Parameters:

  • num_rx_ant (int) – Number of receive antennas.

  • enable_pusch_tdi (int) –

    Time domain interpolation on PUSCH.

    • 0: Disable (default).

    • 1: Enable.

  • eq_coeff_algo (int) –

    Algorithm for equalizer coefficient computation.

    • 0 - ZF.

    • 1 - MMSE (default).

    • 2 - MMSE-IRC.

  • cuda_stream (int) – The CUDA stream. If not given, one will be created.

Return type:

None

__call__(slot, rx_slot, config, **kwargs)#

Run the receiver pipeline.

Note: This implements the base class abstract method.

Parameters:

  • slot (int) – Slot number.

  • rx_slot (Array) – Received slot as an Array.

  • config (List[PuschConfig]) – Dynamic slot configuration in this slot.

  • kwargs (Any)

Returns:

A tuple containing:

  • Array: Transport block CRCs.

  • List[Array]: Transport blocks, one per UE, without CRC.

Return type:

Array, List[Array]

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