nemo_automodel.components.models.minimax_m3_vl.kernels.msa_backward_sm100
nemo_automodel.components.models.minimax_m3_vl.kernels.msa_backward_sm100
MiniMax M3 main-attention backward kernel for MSA on SM100.
KV-parallel: each CTA walks task rows (8 queries x 16 main heads = one 128-row
tile) bucketed by (batch, index_head, key_block), with K/V TMA-resident per
bucket and Q/dO TMA-loaded per tile (one load warp, 8-row gathers). One mma warp
issues all five tcgen05 GEMMs transposed (S^T, dP^T, dV, dK, dQ^T) over four
128-column TMEM allocations; dV/dK accumulate per bucket segment and are flushed
with fp32 vector atomics, dQ^T per tile with packed bf16 atomics into a
head-pair-interleaved pool that
msa_backward_postprocess_sm100 casts to the bf16 gradient. The task tables come
from msa_task_build_sm100; run_backward is the host entry point.
Module Contents
Classes
Functions
Data
API
In-place 4x4 transpose of four F32x4 fragments across a quad’s 4 lanes.
Lane q holds element (row q, block k) before and (row k, block q) after. c0/c1
are 4-wide lane-bit vectors, so each stage’s slot choice lowers to FSEL, not a branch.
Compile the backward once per process with dynamic token, workspace, and task counts.
The fake tensors describe the head-major views run_backward builds; stride_order[i] is the
rank of mode i, 0 innermost. Returns an executable taking the kernel’s positional arguments
minus the trailing stream.
View a row-major [T, H, ...] tensor as the kernel’s [1, H, T, ...] operand without a copy.
64-bit L2 cache policy: keep the whole line set as evict-last (fraction 1.0).
Return tensor detached, contiguous and on 16-byte-aligned storage, copying only when it is not.
Round two FP32 values to one bf16x2 word, low logical element in the low half.
Round two FP32 values to one f16x2 word, low logical element in the low half.
Run the SM100 main-attention backward on THD-contract tensors of one CUDA device.
Parameters:
BF16 [T, 64, 128] compact queries.
BF16 [W, 4, 128] keys in the 128-aligned workspace, W a positive multiple of 128.
BF16 [W, 4, 128] values in the same workspace.
BF16 [T, 64, 128] output gradient.
FP32 [T, 64] forward log-sum-exp.
BF16 [T, 64, 128] forward output.
Forward-derived task schedule of this call.
Returns: torch.Tensor
BF16 (dq [T, 64, 128], dk_aligned [W, 4, 128], dv_aligned [W, 4, 128]), zero outside the